Mercurial > repos > blastem
comparison vdp.c @ 1154:c83ec07ddbac
Implemented Mode 4 H conter latching
author | Michael Pavone <pavone@retrodev.com> |
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date | Thu, 05 Jan 2017 00:36:23 -0800 |
parents | 2e3ad914bad3 |
children | da6a1f156f24 |
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1153:2e3ad914bad3 | 1154:c83ec07ddbac |
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2138 } | 2138 } |
2139 } | 2139 } |
2140 } | 2140 } |
2141 } | 2141 } |
2142 | 2142 |
2143 static uint16_t get_ext_vcounter(vdp_context *context) | |
2144 { | |
2145 uint16_t line= context->vcounter & 0xFF; | |
2146 if (context->double_res) { | |
2147 line <<= 1; | |
2148 if (line & 0x100) { | |
2149 line |= 1; | |
2150 } | |
2151 } | |
2152 return line << 8; | |
2153 } | |
2154 | |
2155 void vdp_latch_hv(vdp_context *context) | |
2156 { | |
2157 context->hv_latch = context->hslot | get_ext_vcounter(context); | |
2158 } | |
2159 | |
2160 uint16_t vdp_hv_counter_read(vdp_context * context) | |
2161 { | |
2162 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) { | |
2163 return context->hv_latch; | |
2164 } | |
2165 uint16_t hv; | |
2166 if (context->regs[REG_MODE_2] & BIT_MODE_5) { | |
2167 hv = context->hslot; | |
2168 } else { | |
2169 hv = context->hv_latch & 0xFF; | |
2170 } | |
2171 hv |= get_ext_vcounter(context); | |
2172 | |
2173 return hv; | |
2174 } | |
2175 | |
2143 int vdp_control_port_write(vdp_context * context, uint16_t value) | 2176 int vdp_control_port_write(vdp_context * context, uint16_t value) |
2144 { | 2177 { |
2145 //printf("control port write: %X at %d\n", value, context->cycles); | 2178 //printf("control port write: %X at %d\n", value, context->cycles); |
2146 if (context->flags & FLAG_DMA_RUN) { | 2179 if (context->flags & FLAG_DMA_RUN) { |
2147 return -1; | 2180 return -1; |
2182 //Register write | 2215 //Register write |
2183 uint8_t reg = (value >> 8) & 0x1F; | 2216 uint8_t reg = (value >> 8) & 0x1F; |
2184 if (reg < (mode_5 ? VDP_REGS : 0xB)) { | 2217 if (reg < (mode_5 ? VDP_REGS : 0xB)) { |
2185 //printf("register %d set to %X\n", reg, value & 0xFF); | 2218 //printf("register %d set to %X\n", reg, value & 0xFF); |
2186 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) { | 2219 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) { |
2187 context->hv_latch = vdp_hv_counter_read(context); | 2220 vdp_latch_hv(context); |
2188 } | 2221 } |
2189 if (reg == REG_BG_COLOR) { | 2222 if (reg == REG_BG_COLOR) { |
2190 value &= 0x3F; | 2223 value &= 0x3F; |
2191 } | 2224 } |
2192 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) { | 2225 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) { |
2384 context->flags &= ~(FLAG_PENDING | FLAG_READ_FETCHED); | 2417 context->flags &= ~(FLAG_PENDING | FLAG_READ_FETCHED); |
2385 context->flags2 &= ~FLAG2_BYTE_PENDING; | 2418 context->flags2 &= ~FLAG2_BYTE_PENDING; |
2386 | 2419 |
2387 context->cd = VRAM_READ8; | 2420 context->cd = VRAM_READ8; |
2388 return context->prefetch; | 2421 return context->prefetch; |
2389 } | |
2390 | |
2391 uint16_t vdp_hv_counter_read(vdp_context * context) | |
2392 { | |
2393 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) { | |
2394 return context->hv_latch; | |
2395 } | |
2396 uint32_t line= context->vcounter & 0xFF; | |
2397 uint32_t linecyc = context->hslot; | |
2398 linecyc &= 0xFF; | |
2399 if (context->double_res) { | |
2400 line <<= 1; | |
2401 if (line & 0x100) { | |
2402 line |= 1; | |
2403 } | |
2404 } | |
2405 return (line << 8) | linecyc; | |
2406 } | 2422 } |
2407 | 2423 |
2408 uint16_t vdp_test_port_read(vdp_context * context) | 2424 uint16_t vdp_test_port_read(vdp_context * context) |
2409 { | 2425 { |
2410 //TODO: Find out what actually gets returned here | 2426 //TODO: Find out what actually gets returned here |