Mercurial > repos > blastem
comparison vdp.c @ 328:bf7ed23efa40
Fewer magic numbers in the VDP core for the win
author | Mike Pavone <pavone@retrodev.com> |
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date | Mon, 13 May 2013 21:36:33 -0700 |
parents | 1b00258b1f29 |
children | fd5f6577db9b |
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327:1b00258b1f29 | 328:bf7ed23efa40 |
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33 | 33 |
34 #define SCROLL_BUFFER_SIZE 32 | 34 #define SCROLL_BUFFER_SIZE 32 |
35 #define SCROLL_BUFFER_DRAW 16 | 35 #define SCROLL_BUFFER_DRAW 16 |
36 | 36 |
37 #define FIFO_SIZE 4 | 37 #define FIFO_SIZE 4 |
38 | |
39 #define VINT_SLOTS_H40 (21+16+10) //21 slots before HSYNC, 16 during, 10 after TODO: deal with clock switching during HSYNC | |
40 #define VINT_SLOTS_H32 (33+20+7) //33 slots before HSYNC, 20 during, 7 after TODO: confirm final number | |
41 #define MCLKS_SLOT_H40 16 | |
42 #define MCLKS_SLOT_H32 20 | |
38 | 43 |
39 void init_vdp_context(vdp_context * context) | 44 void init_vdp_context(vdp_context * context) |
40 { | 45 { |
41 memset(context, 0, sizeof(*context)); | 46 memset(context, 0, sizeof(*context)); |
42 context->vdpmem = malloc(VRAM_SIZE); | 47 context->vdpmem = malloc(VRAM_SIZE); |
1114 } else { | 1119 } else { |
1115 context->flags2 |= FLAG2_HINT_PENDING; | 1120 context->flags2 |= FLAG2_HINT_PENDING; |
1116 context->hint_counter = context->regs[REG_HINT]; | 1121 context->hint_counter = context->regs[REG_HINT]; |
1117 } | 1122 } |
1118 } else if(line == active_lines) { | 1123 } else if(line == active_lines) { |
1119 uint32_t intcyc = context->latched_mode & BIT_H40 ? (148 + 40) * 4 : (132 + 28) * 5;; | 1124 uint32_t intcyc = context->latched_mode & BIT_H40 ? VINT_SLOTS_H40 * MCLKS_SLOT_H40 : VINT_SLOTS_H32 * MCLKS_SLOT_H32; |
1120 if (linecyc == intcyc) { | 1125 if (linecyc == intcyc) { |
1121 context->flags2 |= FLAG2_VINT_PENDING; | 1126 context->flags2 |= FLAG2_VINT_PENDING; |
1122 } | 1127 } |
1123 } | 1128 } |
1124 if (line < active_lines && context->regs[REG_MODE_2] & DISPLAY_ENABLE) { | 1129 if (line < active_lines && context->regs[REG_MODE_2] & DISPLAY_ENABLE) { |
1127 line = (line - 1) & 0xFF; | 1132 line = (line - 1) & 0xFF; |
1128 | 1133 |
1129 //Convert to slot number | 1134 //Convert to slot number |
1130 if (context->latched_mode & BIT_H40){ | 1135 if (context->latched_mode & BIT_H40){ |
1131 //TODO: Deal with nasty clock switching during HBLANK | 1136 //TODO: Deal with nasty clock switching during HBLANK |
1132 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; | 1137 uint32_t clock_inc = MCLKS_LINE-linecyc < MCLKS_SLOT_H40 ? MCLKS_LINE-linecyc : MCLKS_SLOT_H40; |
1133 linecyc = linecyc/16; | 1138 linecyc = linecyc/MCLKS_SLOT_H40; |
1134 vdp_h40(line, linecyc, context); | 1139 vdp_h40(line, linecyc, context); |
1135 context->cycles += clock_inc; | 1140 context->cycles += clock_inc; |
1136 } else { | 1141 } else { |
1137 linecyc = linecyc/20; | 1142 linecyc = linecyc/MCLKS_SLOT_H32; |
1138 vdp_h32(line, linecyc, context); | 1143 vdp_h32(line, linecyc, context); |
1139 context->cycles += 20; | 1144 context->cycles += MCLKS_SLOT_H32; |
1140 } | 1145 } |
1141 } else { | 1146 } else { |
1142 if (!is_refresh(context)) { | 1147 if (!is_refresh(context)) { |
1143 external_slot(context); | 1148 external_slot(context); |
1144 } | 1149 } |
1145 if (line < active_lines) { | 1150 if (line < active_lines) { |
1146 check_render_bg(context, line); | 1151 check_render_bg(context, line); |
1147 } | 1152 } |
1148 if (context->latched_mode & BIT_H40){ | 1153 if (context->latched_mode & BIT_H40){ |
1149 uint32_t clock_inc = MCLKS_LINE-linecyc < 16 ? MCLKS_LINE-linecyc : 16; | 1154 uint32_t clock_inc = MCLKS_LINE-linecyc < MCLKS_SLOT_H40 ? MCLKS_LINE-linecyc : MCLKS_SLOT_H40; |
1150 //TODO: Deal with nasty clock switching during HBLANK | 1155 //TODO: Deal with nasty clock switching during HBLANK |
1151 context->cycles += clock_inc; | 1156 context->cycles += clock_inc; |
1152 } else { | 1157 } else { |
1153 context->cycles += 20; | 1158 context->cycles += MCLKS_SLOT_H32; |
1154 } | 1159 } |
1155 } | 1160 } |
1156 } | 1161 } |
1157 } | 1162 } |
1158 | 1163 |
1408 return context->cycles; | 1413 return context->cycles; |
1409 } | 1414 } |
1410 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; | 1415 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
1411 uint32_t vcycle = MCLKS_LINE * active_lines; | 1416 uint32_t vcycle = MCLKS_LINE * active_lines; |
1412 if (context->latched_mode & BIT_H40) { | 1417 if (context->latched_mode & BIT_H40) { |
1413 vcycle += (148 + 40) * 4; | 1418 vcycle += VINT_SLOTS_H40 * MCLKS_SLOT_H40; |
1414 } else { | 1419 } else { |
1415 vcycle += (132 + 28) * 5; | 1420 vcycle += VINT_SLOTS_H32 * MCLKS_SLOT_H32; |
1416 } | 1421 } |
1417 if (vcycle < context->cycles) { | 1422 if (vcycle < context->cycles) { |
1418 return 0xFFFFFFFF; | 1423 return 0xFFFFFFFF; |
1419 } | 1424 } |
1420 return vcycle; | 1425 return vcycle; |