Mercurial > repos > blastem
comparison vdp.c @ 472:93dc0382fd70
Fix VSRAM reads
author | Mike Pavone <pavone@retrodev.com> |
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date | Sun, 15 Sep 2013 22:43:01 -0700 |
parents | f065769836e8 |
children | 1358045c0bdd |
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471:f065769836e8 | 472:93dc0382fd70 |
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1581 } | 1581 } |
1582 uint16_t value = 0; | 1582 uint16_t value = 0; |
1583 switch (context->cd & 0xF) | 1583 switch (context->cd & 0xF) |
1584 { | 1584 { |
1585 case VRAM_READ: | 1585 case VRAM_READ: |
1586 value = context->vdpmem[context->address] << 8; | 1586 value = context->vdpmem[context->address & 0xFFFE] << 8; |
1587 context->flags &= ~FLAG_UNUSED_SLOT; | 1587 context->flags &= ~FLAG_UNUSED_SLOT; |
1588 context->flags2 |= FLAG2_READ_PENDING; | 1588 context->flags2 |= FLAG2_READ_PENDING; |
1589 while (!(context->flags & FLAG_UNUSED_SLOT)) { | 1589 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
1590 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); | 1590 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
1591 } | 1591 } |
1592 value |= context->vdpmem[context->address ^ 1]; | 1592 value |= context->vdpmem[context->address | 1]; |
1593 break; | 1593 break; |
1594 case CRAM_READ: | 1594 case CRAM_READ: |
1595 value = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS; | 1595 value = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS; |
1596 value |= context->fifo[context->fifo_write].value & ~CRAM_BITS; | 1596 value |= context->fifo[context->fifo_write].value & ~CRAM_BITS; |
1597 break; | 1597 break; |
1598 case VSRAM_READ: | 1598 case VSRAM_READ: |
1599 if (((context->address / 2) & 63) < VSRAM_SIZE) { | 1599 if (((context->address / 2) & 63) < VSRAM_SIZE) { |
1600 value = context->vsram[context->address & 63] & VSRAM_BITS; | 1600 value = context->vsram[(context->address / 2) & 63] & VSRAM_BITS; |
1601 value |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; | 1601 value |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; |
1602 } | 1602 } |
1603 break; | 1603 break; |
1604 } | 1604 } |
1605 context->address += context->regs[REG_AUTOINC]; | 1605 context->address += context->regs[REG_AUTOINC]; |