Mercurial > repos > blastem
comparison vdp.c @ 1639:93518786f882
Implemented left column blank register bit in mode 5
author | Michael Pavone <pavone@retrodev.com> |
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date | Thu, 15 Nov 2018 22:21:09 -0800 |
parents | f27142c48567 |
children | 3602f3b20072 |
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1638:f27142c48567 | 1639:93518786f882 |
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1327 plane_a = context->tmp_buf_a + (plane_a_off & SCROLL_BUFFER_MASK); | 1327 plane_a = context->tmp_buf_a + (plane_a_off & SCROLL_BUFFER_MASK); |
1328 plane_b = context->tmp_buf_b + (plane_b_off & SCROLL_BUFFER_MASK); | 1328 plane_b = context->tmp_buf_b + (plane_b_off & SCROLL_BUFFER_MASK); |
1329 uint8_t pixel = context->regs[REG_BG_COLOR]; | 1329 uint8_t pixel = context->regs[REG_BG_COLOR]; |
1330 uint32_t *colors = context->colors; | 1330 uint32_t *colors = context->colors; |
1331 src = DBG_SRC_BG; | 1331 src = DBG_SRC_BG; |
1332 if (*plane_b & 0xF) { | 1332 uint8_t intensity = 0; |
1333 pixel = *plane_b; | 1333 if (col || !(context->regs[REG_MODE_1] & BIT_COL0_MASK) || i >= 8) { |
1334 src = DBG_SRC_B; | 1334 if (*plane_b & 0xF) { |
1335 } | 1335 pixel = *plane_b; |
1336 uint8_t intensity = *plane_b & BUF_BIT_PRIORITY; | 1336 src = DBG_SRC_B; |
1337 if (*plane_a & 0xF && (*plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { | 1337 } |
1338 pixel = *plane_a; | 1338 intensity = *plane_b & BUF_BIT_PRIORITY; |
1339 src = a_src; | 1339 if (*plane_a & 0xF && (*plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
1340 } | 1340 pixel = *plane_a; |
1341 intensity |= *plane_a & BUF_BIT_PRIORITY; | 1341 src = a_src; |
1342 if (*sprite_buf & 0xF && (*sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { | 1342 } |
1343 if ((*sprite_buf & 0x3F) == 0x3E) { | 1343 intensity |= *plane_a & BUF_BIT_PRIORITY; |
1344 intensity += BUF_BIT_PRIORITY; | 1344 if (*sprite_buf & 0xF && (*sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
1345 } else if ((*sprite_buf & 0x3F) == 0x3F) { | 1345 if ((*sprite_buf & 0x3F) == 0x3E) { |
1346 intensity = 0; | 1346 intensity += BUF_BIT_PRIORITY; |
1347 } else { | 1347 } else if ((*sprite_buf & 0x3F) == 0x3F) { |
1348 pixel = *sprite_buf; | 1348 intensity = 0; |
1349 src = DBG_SRC_S; | |
1350 if ((pixel & 0xF) == 0xE) { | |
1351 intensity = BUF_BIT_PRIORITY; | |
1352 } else { | 1349 } else { |
1353 intensity |= pixel & BUF_BIT_PRIORITY; | 1350 pixel = *sprite_buf; |
1351 src = DBG_SRC_S; | |
1352 if ((pixel & 0xF) == 0xE) { | |
1353 intensity = BUF_BIT_PRIORITY; | |
1354 } else { | |
1355 intensity |= pixel & BUF_BIT_PRIORITY; | |
1356 } | |
1354 } | 1357 } |
1355 } | 1358 } |
1356 } | 1359 } |
1357 if (output_disabled) { | 1360 if (output_disabled) { |
1358 pixel = 0x3F; | 1361 pixel = 0x3F; |
1403 uint8_t pixel = context->regs[REG_BG_COLOR]; | 1406 uint8_t pixel = context->regs[REG_BG_COLOR]; |
1404 src = DBG_SRC_BG; | 1407 src = DBG_SRC_BG; |
1405 if (output_disabled) { | 1408 if (output_disabled) { |
1406 pixel = 0x3F; | 1409 pixel = 0x3F; |
1407 } else { | 1410 } else { |
1408 if (*plane_b & 0xF) { | 1411 if (col || !(context->regs[REG_MODE_1] & BIT_COL0_MASK) || i >= 8) { |
1409 pixel = *plane_b; | 1412 if (*plane_b & 0xF) { |
1410 src = DBG_SRC_B; | 1413 pixel = *plane_b; |
1411 } | 1414 src = DBG_SRC_B; |
1412 if (*plane_a & 0xF && (*plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { | 1415 } |
1413 pixel = *plane_a; | 1416 if (*plane_a & 0xF && (*plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
1414 src = a_src; | 1417 pixel = *plane_a; |
1415 } | 1418 src = a_src; |
1416 if (*sprite_buf & 0xF && (*sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { | 1419 } |
1417 pixel = *sprite_buf; | 1420 if (*sprite_buf & 0xF && (*sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
1418 src = DBG_SRC_S; | 1421 pixel = *sprite_buf; |
1422 src = DBG_SRC_S; | |
1423 } | |
1419 } | 1424 } |
1420 } | 1425 } |
1421 //TODO: Simulate CRAM corruption from bus fight | 1426 //TODO: Simulate CRAM corruption from bus fight |
1422 switch (test_layer) | 1427 switch (test_layer) |
1423 { | 1428 { |