comparison z80inst.c @ 206:807ca611b561

Add support for IY bit instructions to decoder
author Mike Pavone <pavone@retrodev.com>
date Wed, 23 Jan 2013 21:54:58 -0800
parents 19b323614309
children 4d4559b04c59
comparison
equal deleted inserted replaced
205:19b323614309 206:807ca611b561
1119 NOP2, 1119 NOP2,
1120 NOP2, 1120 NOP2,
1121 NOP2 1121 NOP2
1122 }; 1122 };
1123 1123
1124 #define SHIFT_BLOCK_IY(op) \
1125 {op, Z80_B, Z80_IY_DISPLACE | Z80_DIR, 0, 0},\
1126 {op, Z80_C, Z80_IY_DISPLACE | Z80_DIR, 0, 0},\
1127 {op, Z80_D, Z80_IY_DISPLACE | Z80_DIR, 0, 0},\
1128 {op, Z80_E, Z80_IY_DISPLACE | Z80_DIR, 0, 0},\
1129 {op, Z80_H, Z80_IY_DISPLACE | Z80_DIR, 0, 0},\
1130 {op, Z80_L, Z80_IY_DISPLACE | Z80_DIR, 0, 0},\
1131 {op, Z80_UNUSED, Z80_IY_DISPLACE | Z80_DIR, 0, 0},\
1132 {op, Z80_A, Z80_IY_DISPLACE | Z80_DIR, 0, 0}
1133
1134 #define BIT_BLOCK_IY(bit) \
1135 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1136 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1137 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1138 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1139 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1140 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1141 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1142 {Z80_BIT, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit}
1143
1144 #define BIT_BLOCK_IY_REG(op, bit) \
1145 {op, Z80_B, Z80_IY_DISPLACE | Z80_DIR, 0, bit},\
1146 {op, Z80_C, Z80_IY_DISPLACE | Z80_DIR, 0, bit},\
1147 {op, Z80_D, Z80_IY_DISPLACE | Z80_DIR, 0, bit},\
1148 {op, Z80_E, Z80_IY_DISPLACE | Z80_DIR, 0, bit},\
1149 {op, Z80_H, Z80_IY_DISPLACE | Z80_DIR, 0, bit},\
1150 {op, Z80_L, Z80_IY_DISPLACE | Z80_DIR, 0, bit},\
1151 {op, Z80_USE_IMMED, Z80_IY_DISPLACE, 0, bit},\
1152 {op, Z80_A, Z80_IY_DISPLACE | Z80_DIR, 0, bit}
1153
1154 z80inst z80_tbl_iy_bit[256] = {
1155 //0
1156 SHIFT_BLOCK_IY(Z80_RLC),
1157 SHIFT_BLOCK_IY(Z80_RRC),
1158 //1
1159 SHIFT_BLOCK_IY(Z80_RL),
1160 SHIFT_BLOCK_IY(Z80_RR),
1161 //2
1162 SHIFT_BLOCK_IY(Z80_SLA),
1163 SHIFT_BLOCK_IY(Z80_SRA),
1164 //3
1165 SHIFT_BLOCK_IY(Z80_SLL),
1166 SHIFT_BLOCK_IY(Z80_SRL),
1167 //4
1168 BIT_BLOCK_IY(0),
1169 BIT_BLOCK_IY(1),
1170 //5
1171 BIT_BLOCK_IY(2),
1172 BIT_BLOCK_IY(3),
1173 //6
1174 BIT_BLOCK_IY(4),
1175 BIT_BLOCK_IY(5),
1176 //7
1177 BIT_BLOCK_IY(6),
1178 BIT_BLOCK_IY(7),
1179 //8
1180 BIT_BLOCK_IY_REG(Z80_RES, 0),
1181 BIT_BLOCK_IY_REG(Z80_RES, 1),
1182 //9
1183 BIT_BLOCK_IY_REG(Z80_RES, 2),
1184 BIT_BLOCK_IY_REG(Z80_RES, 3),
1185 //A
1186 BIT_BLOCK_IY_REG(Z80_RES, 4),
1187 BIT_BLOCK_IY_REG(Z80_RES, 5),
1188 //B
1189 BIT_BLOCK_IY_REG(Z80_RES, 6),
1190 BIT_BLOCK_IY_REG(Z80_RES, 7),
1191 //C
1192 BIT_BLOCK_IY_REG(Z80_SET, 0),
1193 BIT_BLOCK_IY_REG(Z80_SET, 1),
1194 //D
1195 BIT_BLOCK_IY_REG(Z80_SET, 2),
1196 BIT_BLOCK_IY_REG(Z80_SET, 3),
1197 //E
1198 BIT_BLOCK_IY_REG(Z80_SET, 4),
1199 BIT_BLOCK_IY_REG(Z80_SET, 5),
1200 //F
1201 BIT_BLOCK_IY_REG(Z80_SET, 6),
1202 BIT_BLOCK_IY_REG(Z80_SET, 7),
1203 };
1204
1124 uint8_t * z80_decode(uint8_t * istream, z80inst * decoded) 1205 uint8_t * z80_decode(uint8_t * istream, z80inst * decoded)
1125 { 1206 {
1126 uint8_t tmp; 1207 uint8_t tmp;
1127 if (*istream == 0xCB) { 1208 if (*istream == 0xCB) {
1128 istream++; 1209 istream++;
1148 memcpy(decoded, z80_tbl_extd + *istream-0x40, sizeof(z80inst)); 1229 memcpy(decoded, z80_tbl_extd + *istream-0x40, sizeof(z80inst));
1149 } 1230 }
1150 } else if (*istream == 0xFD) { 1231 } else if (*istream == 0xFD) {
1151 istream++; 1232 istream++;
1152 if (*istream == 0xCB) { 1233 if (*istream == 0xCB) {
1234 tmp = *(++istream);
1235 istream++;
1236 memcpy(decoded, z80_tbl_iy_bit + *istream, sizeof(z80inst));
1237 decoded->ea_reg = tmp;
1153 } else { 1238 } else {
1154 memcpy(decoded, z80_tbl_iy + *istream, sizeof(z80inst)); 1239 memcpy(decoded, z80_tbl_iy + *istream, sizeof(z80inst));
1155 if ((decoded->addr_mode & 0x1F) == Z80_IY_DISPLACE) { 1240 if ((decoded->addr_mode & 0x1F) == Z80_IY_DISPLACE) {
1156 decoded->ea_reg = *(++istream); 1241 decoded->ea_reg = *(++istream);
1157 } 1242 }