Mercurial > repos > blastem
comparison vdp.c @ 151:6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
author | Mike Pavone <pavone@retrodev.com> |
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date | Thu, 03 Jan 2013 22:07:40 -0800 |
parents | 139e5dcd6aa3 |
children | 8b846bcff6a2 |
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150:3e68e517cc01 | 151:6b593ea0ed90 |
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203 context->flags |= FLAG_DMA_PROG; | 203 context->flags |= FLAG_DMA_PROG; |
204 } | 204 } |
205 break; | 205 break; |
206 case CRAM_WRITE: | 206 case CRAM_WRITE: |
207 context->cram[(context->address/2) & (CRAM_SIZE-1)] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | 207 context->cram[(context->address/2) & (CRAM_SIZE-1)] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
208 //printf("CRAM DMA | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->cycles); | |
208 break; | 209 break; |
209 case VSRAM_WRITE: | 210 case VSRAM_WRITE: |
210 if (((context->address/2) & 63) < VSRAM_SIZE) { | 211 if (((context->address/2) & 63) < VSRAM_SIZE) { |
211 context->vsram[(context->address/2) & 63] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | 212 context->vsram[(context->address/2) & 63] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
212 } | 213 } |
308 //skip auto-increment and removal of entry from fifo | 309 //skip auto-increment and removal of entry from fifo |
309 return; | 310 return; |
310 } | 311 } |
311 break; | 312 break; |
312 case CRAM_WRITE: | 313 case CRAM_WRITE: |
313 //printf("CRAM Write: %X to %X\n", start->value, context->address); | 314 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
314 context->cram[(start->address/2) & (CRAM_SIZE-1)] = start->value; | 315 context->cram[(start->address/2) & (CRAM_SIZE-1)] = start->value; |
315 break; | 316 break; |
316 case VSRAM_WRITE: | 317 case VSRAM_WRITE: |
317 if (((start->address/2) & 63) < VSRAM_SIZE) { | 318 if (((start->address/2) & 63) < VSRAM_SIZE) { |
318 //printf("VSRAM Write: %X to %X\n", start->value, context->address); | 319 //printf("VSRAM Write: %X to %X\n", start->value, context->address); |
1045 //Register write | 1046 //Register write |
1046 uint8_t reg = (value >> 8) & 0x1F; | 1047 uint8_t reg = (value >> 8) & 0x1F; |
1047 if (reg < VDP_REGS) { | 1048 if (reg < VDP_REGS) { |
1048 //printf("register %d set to %X\n", reg, value & 0xFF); | 1049 //printf("register %d set to %X\n", reg, value & 0xFF); |
1049 context->regs[reg] = value; | 1050 context->regs[reg] = value; |
1050 /*if (reg == REG_MODE_2) { | 1051 if (reg == REG_MODE_2) { |
1051 printf("Display is now %s\n", (context->regs[REG_MODE_2] & DISPLAY_ENABLE) ? "enabled" : "disabled"); | 1052 //printf("Display is now %s\n", (context->regs[REG_MODE_2] & DISPLAY_ENABLE) ? "enabled" : "disabled"); |
1052 }*/ | 1053 } |
1053 } | 1054 } |
1054 } else { | 1055 } else { |
1055 context->flags |= FLAG_PENDING; | 1056 context->flags |= FLAG_PENDING; |
1056 context->address = (context->address &0xC000) | (value & 0x3FFF); | 1057 context->address = (context->address &0xC000) | (value & 0x3FFF); |
1057 context->cd = (context->cd &0x3C) | (value >> 14); | 1058 context->cd = (context->cd &0x3C) | (value >> 14); |