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comparison backend_x86.c @ 658:6aa29ac33f1a

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Use call_args and call_args_abi inside gen_mem_fun
author Michael Pavone <pavone@retrodev.com>
date Thu, 01 Jan 2015 20:21:20 -0800
parents 9d6fed6501ba
children 30ccf56842d6
comparison
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657:92ce5ea5ffc9 658:6aa29ac33f1a
89 if (memmap[chunk].flags & MMAP_FUNC_NULL) { 89 if (memmap[chunk].flags & MMAP_FUNC_NULL) {
90 cmp_irdisp(code, 0, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, SZ_PTR); 90 cmp_irdisp(code, 0, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, SZ_PTR);
91 code_ptr not_null = code->cur + 1; 91 code_ptr not_null = code->cur + 1;
92 jcc(code, CC_NZ, code->cur + 2); 92 jcc(code, CC_NZ, code->cur + 2);
93 call(code, opts->save_context); 93 call(code, opts->save_context);
94 #ifdef X86_64
95 if (is_write) { 94 if (is_write) {
96 if (opts->scratch2 != RDI) { 95 call_args_abi(code, cfun, 3, opts->scratch2, opts->context_reg, opts->scratch1);
97 mov_rr(code, opts->scratch2, RDI, opts->address_size); 96 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
98 }
99 mov_rr(code, opts->scratch1, RDX, size);
100 } else { 97 } else {
101 push_r(code, opts->context_reg); 98 push_r(code, opts->context_reg);
102 mov_rr(code, opts->scratch1, RDI, opts->address_size); 99 call_args_abi(code, cfun, 2, opts->scratch1, opts->context_reg);
103 }
104 test_ir(code, 8, RSP, opts->address_size);
105 code_ptr adjust_rsp = code->cur + 1;
106 jcc(code, CC_NZ, code->cur + 2);
107 call(code, cfun);
108 code_ptr no_adjust = code->cur + 1;
109 jmp(code, code->cur + 2);
110 *adjust_rsp = code->cur - (adjust_rsp + 1);
111 sub_ir(code, 8, RSP, SZ_PTR);
112 call(code, cfun);
113 add_ir(code, 8, RSP, SZ_PTR);
114 *no_adjust = code->cur - (no_adjust + 1);
115 #else
116 if (is_write) {
117 push_r(code, opts->scratch1);
118 } else {
119 push_r(code, opts->context_reg);//save opts->context_reg for later
120 }
121 push_r(code, opts->context_reg);
122 push_r(code, is_write ? opts->scratch2 : opts->scratch1);
123 call(code, cfun);
124 add_ir(code, is_write ? 12 : 8, RSP, opts->address_size);
125 #endif
126 if (is_write) {
127 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
128 } else {
129 pop_r(code, opts->context_reg); 100 pop_r(code, opts->context_reg);
130 mov_rr(code, RAX, opts->scratch1, size); 101 mov_rr(code, RAX, opts->scratch1, size);
131 } 102 }
132 jmp(code, opts->load_context); 103 jmp(code, opts->load_context);
133 104
204 shr_ir(code, opts->ram_flags_shift, opts->scratch1, opts->address_size); 175 shr_ir(code, opts->ram_flags_shift, opts->scratch1, opts->address_size);
205 bt_rrdisp(code, opts->scratch1, opts->context_reg, opts->ram_flags_off, opts->address_size); 176 bt_rrdisp(code, opts->scratch1, opts->context_reg, opts->ram_flags_off, opts->address_size);
206 code_ptr not_code = code->cur + 1; 177 code_ptr not_code = code->cur + 1;
207 jcc(code, CC_NC, code->cur + 2); 178 jcc(code, CC_NC, code->cur + 2);
208 call(code, opts->save_context); 179 call(code, opts->save_context);
209 #ifdef X86_32 180 call_args(code, opts->handle_code_write, 2, opts->scratch2, opts->context_reg);
210 push_r(code, opts->context_reg);
211 push_r(code, opts->scratch2);
212 #else
213 if (opts->scratch2 != RDI) {
214 mov_rr(code, opts->scratch2, RDI, opts->address_size);
215 }
216 #endif
217 call(code, opts->handle_code_write);
218 #ifdef X86_32
219 add_ir(code, 8, RSP, SZ_D);
220 #endif
221 mov_rr(code, RAX, opts->context_reg, SZ_PTR); 181 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
222 call(code, opts->load_context); 182 call(code, opts->load_context);
223 *not_code = code->cur - (not_code+1); 183 *not_code = code->cur - (not_code+1);
224 } 184 }
225 retn(code); 185 retn(code);
226 } else if (cfun) { 186 } else if (cfun) {
227 call(code, opts->save_context); 187 call(code, opts->save_context);
228 #ifdef X86_64
229 if (is_write) { 188 if (is_write) {
230 if (opts->scratch2 != RDI) { 189 call_args_abi(code, cfun, 3, opts->scratch2, opts->context_reg, opts->scratch1);
231 mov_rr(code, opts->scratch2, RDI, opts->address_size); 190 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
232 }
233 mov_rr(code, opts->scratch1, RDX, size);
234 } else { 191 } else {
235 push_r(code, opts->context_reg); 192 push_r(code, opts->context_reg);
236 mov_rr(code, opts->scratch1, RDI, opts->address_size); 193 call_args_abi(code, cfun, 2, opts->scratch1, opts->context_reg);
237 }
238 test_ir(code, 8, RSP, SZ_D);
239 code_ptr adjust_rsp = code->cur + 1;
240 jcc(code, CC_NZ, code->cur + 2);
241 call(code, cfun);
242 code_ptr no_adjust = code->cur + 1;
243 jmp(code, code->cur + 2);
244 *adjust_rsp = code->cur - (adjust_rsp + 1);
245 sub_ir(code, 8, RSP, SZ_PTR);
246 call(code, cfun);
247 add_ir(code, 8, RSP, SZ_PTR);
248 *no_adjust = code->cur - (no_adjust+1);
249 #else
250 if (is_write) {
251 push_r(code, opts->scratch1);
252 } else {
253 push_r(code, opts->context_reg);//save opts->context_reg for later
254 }
255 push_r(code, opts->context_reg);
256 push_r(code, is_write ? opts->scratch2 : opts->scratch1);
257 call(code, cfun);
258 add_ir(code, is_write ? 12 : 8, RSP, SZ_D);
259 #endif
260 if (is_write) {
261 mov_rr(code, RAX, opts->context_reg, SZ_PTR);
262 } else {
263 pop_r(code, opts->context_reg); 194 pop_r(code, opts->context_reg);
264 mov_rr(code, RAX, opts->scratch1, size); 195 mov_rr(code, RAX, opts->scratch1, size);
265 } 196 }
266 jmp(code, opts->load_context); 197 jmp(code, opts->load_context);
267 } else { 198 } else {