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Restore reset of refresh counter after DMA since its removal caused some regressions
author Michael Pavone <pavone@retrodev.com>
date Wed, 29 Nov 2023 22:56:36 -0800
parents 03e6ac327ba0
children 767ec72acca7
comparison
equal deleted inserted replaced
2390:9264c847ceb7 2391:664c3e749428
703 gen_update_refresh_free_access(context); 703 gen_update_refresh_free_access(context);
704 704
705 sync_components(context, 0); 705 sync_components(context, 0);
706 vdp_context *v_context = gen->vdp; 706 vdp_context *v_context = gen->vdp;
707 uint32_t before_cycle = v_context->cycles; 707 uint32_t before_cycle = v_context->cycles;
708 uint8_t did_dma = 0;
708 if (vdp_port < 0x10) { 709 if (vdp_port < 0x10) {
709 int blocked; 710 int blocked;
710 if (vdp_port < 4) { 711 if (vdp_port < 4) {
711 while (vdp_data_port_write(v_context, value) < 0) { 712 while (vdp_data_port_write(v_context, value) < 0) {
712 while(v_context->flags & FLAG_DMA_RUN) { 713 while(v_context->flags & FLAG_DMA_RUN) {
714 did_dma = 1;
713 vdp_run_dma_done(v_context, gen->frame_end); 715 vdp_run_dma_done(v_context, gen->frame_end);
714 if (v_context->cycles >= gen->frame_end) { 716 if (v_context->cycles >= gen->frame_end) {
715 uint32_t cycle_diff = v_context->cycles - context->current_cycle; 717 uint32_t cycle_diff = v_context->cycles - context->current_cycle;
716 uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K; 718 uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K;
717 if (m68k_cycle_diff < cycle_diff) { 719 if (m68k_cycle_diff < cycle_diff) {
730 before_cycle = v_context->cycles; 732 before_cycle = v_context->cycles;
731 blocked = vdp_control_port_write(v_context, value, context->current_cycle); 733 blocked = vdp_control_port_write(v_context, value, context->current_cycle);
732 if (blocked) { 734 if (blocked) {
733 while (blocked) { 735 while (blocked) {
734 while(v_context->flags & FLAG_DMA_RUN) { 736 while(v_context->flags & FLAG_DMA_RUN) {
737 did_dma = 1;
735 vdp_run_dma_done(v_context, gen->frame_end); 738 vdp_run_dma_done(v_context, gen->frame_end);
736 if (v_context->cycles >= gen->frame_end) { 739 if (v_context->cycles >= gen->frame_end) {
737 uint32_t cycle_diff = v_context->cycles - context->current_cycle; 740 uint32_t cycle_diff = v_context->cycles - context->current_cycle;
738 uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K; 741 uint32_t m68k_cycle_diff = (cycle_diff / MCLKS_PER_68K) * MCLKS_PER_68K;
739 if (m68k_cycle_diff < cycle_diff) { 742 if (m68k_cycle_diff < cycle_diff) {
777 psg_write(gen->psg, value); 780 psg_write(gen->psg, value);
778 } else { 781 } else {
779 vdp_test_port_write(gen->vdp, value); 782 vdp_test_port_write(gen->vdp, value);
780 } 783 }
781 784
782 //refresh may have happened while we were waiting on the VDP, 785 if (did_dma) {
783 //so advance refresh_counter but don't add any delays 786 gen->refresh_counter = 0;
784 gen_update_refresh_no_wait(context); 787 gen->last_sync_cycle = context->current_cycle;
788 } else {
789 //refresh may have happened while we were waiting on the VDP,
790 //so advance refresh_counter but don't add any delays
791 gen_update_refresh_no_wait(context);
792 }
785 return context; 793 return context;
786 } 794 }
787 795
788 static m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value) 796 static m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value)
789 { 797 {