Mercurial > repos > blastem
comparison backend_x86.c @ 750:59b499f6b24f
Fix handling of address mask in gen_mem_fun
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 22 Jun 2015 09:22:18 -0700 |
parents | 7f96bd1cb1be |
children | e1dc98f7ed9f |
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749:6f439a197f61 | 750:59b499f6b24f |
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53 check_cycles(opts); | 53 check_cycles(opts); |
54 cycles(opts, opts->bus_cycles); | 54 cycles(opts, opts->bus_cycles); |
55 if (after_inc) { | 55 if (after_inc) { |
56 *after_inc = code->cur; | 56 *after_inc = code->cur; |
57 } | 57 } |
58 if (opts->address_size == SZ_D && opts->address_mask < 0xFFFFFFFF) { | |
59 and_ir(code, opts->address_mask, opts->scratch1, SZ_D); | |
60 } | |
61 code_ptr lb_jcc = NULL, ub_jcc = NULL; | |
62 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8; | 58 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8; |
63 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1; | 59 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1; |
60 if (opts->address_size == SZ_D && opts->address_mask != 0xFFFFFFFF) { | |
61 and_ir(code, opts->address_mask, adr_reg, SZ_D); | |
62 } | |
63 code_ptr lb_jcc = NULL, ub_jcc = NULL; | |
64 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ; | 64 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ; |
65 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B; | 65 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B; |
66 uint32_t ram_flags_off = opts->ram_flags_off; | 66 uint32_t ram_flags_off = opts->ram_flags_off; |
67 for (uint32_t chunk = 0; chunk < num_chunks; chunk++) | 67 for (uint32_t chunk = 0; chunk < num_chunks; chunk++) |
68 { | 68 { |