Mercurial > repos > blastem

comparison cpu_dsl.py @ 2442:52cfc7b14dd2

Find changesets by keywords (author, files, the commit message), revision number or hash, or revset expression.
Sugar for some basic conditionals in CPU DSL
author Michael Pavone <pavone@retrodev.com>
date Sun, 11 Feb 2024 20:41:28 -0800
parents 4435abe5db5e
children 461fffc226e0
comparison
equal deleted inserted replaced
2441:4435abe5db5e 2442:52cfc7b14dd2
17 '>>': 'lsr', 17 '>>': 'lsr',
18 '&': 'and', 18 '&': 'and',
19 '|': 'or', 19 '|': 'or',
20 '^': 'xor' 20 '^': 'xor'
21 } 21 }
22 compareOps = {'>=U', '=', '!='}
22 class Block: 23 class Block:
23 def addOp(self, op): 24 def addOp(self, op):
24 pass 25 pass
25 26
26 def processLine(self, parts): 27 def processLine(self, parts):
27 if parts[0] == 'switch': 28 if parts[0] == 'switch':
28 o = Switch(self, parts[1]) 29 o = Switch(self, parts[1])
29 self.addOp(o) 30 self.addOp(o)
30 return o 31 return o
31 elif parts[0] == 'if': 32 elif parts[0] == 'if':
32 o = If(self, parts[1]) 33 if len(parts) == 4 and parts[2] in compareOps:
34 self.addOp(NormalOp(['cmp', parts[3], parts[1]]))
35 cond = parts[2]
36 else:
37 cond = parts[1]
38 o = If(self, cond)
33 self.addOp(o) 39 self.addOp(o)
34 return o 40 return o
35 elif parts[0] == 'end': 41 elif parts[0] == 'end':
36 raise Exception('end is only allowed inside a switch or if block') 42 raise Exception('end is only allowed inside a switch or if block')
37 else: 43 else: