Mercurial > repos > blastem
comparison vdp.c @ 1427:4e5797b3935a
WIP - New savestate format
author | Michael Pavone <pavone@retrodev.com> |
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date | Sun, 06 Aug 2017 00:06:36 -0700 |
parents | 2b34469e3f81 |
children | 2540c05520f2 |
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1426:957325c990d5 | 1427:4e5797b3935a |
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2994 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); | 2994 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
2995 if (context->cd & 0x20) { | 2995 if (context->cd & 0x20) { |
2996 // | 2996 // |
2997 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { | 2997 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { |
2998 //DMA copy or 68K -> VDP, transfer starts immediately | 2998 //DMA copy or 68K -> VDP, transfer starts immediately |
2999 context->dma_cd = context->cd; | |
3000 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot); | 2999 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot); |
3001 if (!(context->regs[REG_DMASRC_H] & 0x80)) { | 3000 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
3002 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); | 3001 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); |
3003 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately | 3002 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately |
3004 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test | 3003 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test |
3524 context->flags2 &= ~FLAG2_HINT_PENDING; | 3523 context->flags2 &= ~FLAG2_HINT_PENDING; |
3525 } | 3524 } |
3526 } | 3525 } |
3527 } | 3526 } |
3528 | 3527 |
3528 void vdp_serialize(vdp_context *context, serialize_buffer *buf) | |
3529 { | |
3530 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing | |
3531 save_buffer8(buf, context->vdpmem, VRAM_SIZE); | |
3532 save_buffer16(buf, context->cram, CRAM_SIZE); | |
3533 save_buffer16(buf, context->vsram, VSRAM_SIZE); | |
3534 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); | |
3535 for (int i = 0; i <= REG_DMASRC_H; i++) | |
3536 { | |
3537 save_int8(buf, context->regs[i]); | |
3538 } | |
3539 save_int32(buf, context->address); | |
3540 save_int32(buf, context->serial_address); | |
3541 save_int8(buf, context->cd); | |
3542 uint8_t fifo_size; | |
3543 if (context->fifo_read < 0) { | |
3544 fifo_size = 0; | |
3545 } else if (context->fifo_write > context->fifo_read) { | |
3546 fifo_size = context->fifo_write - context->fifo_read; | |
3547 } else { | |
3548 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read; | |
3549 } | |
3550 save_int8(buf, fifo_size); | |
3551 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++) | |
3552 { | |
3553 fifo_entry *entry = context->fifo + cur; | |
3554 cur = (cur + 1) & (FIFO_SIZE - 1); | |
3555 save_int32(buf, entry->cycle); | |
3556 save_int32(buf, entry->address); | |
3557 save_int16(buf, entry->value); | |
3558 save_int8(buf, entry->cd); | |
3559 save_int8(buf, entry->partial); | |
3560 } | |
3561 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg | |
3562 save_int16(buf, context->flags2 << 8 | context->flags); | |
3563 save_int32(buf, context->frame); | |
3564 save_int16(buf, context->vcounter); | |
3565 save_int8(buf, context->hslot); | |
3566 save_int16(buf, context->hv_latch); | |
3567 save_int8(buf, context->state); | |
3568 save_int16(buf, context->hscroll_a); | |
3569 save_int16(buf, context->hscroll_b); | |
3570 save_int16(buf, context->vscroll_latch[0]); | |
3571 save_int16(buf, context->vscroll_latch[1]); | |
3572 save_int16(buf, context->col_1); | |
3573 save_int16(buf, context->col_2); | |
3574 save_int16(buf, context->test_port); | |
3575 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); | |
3576 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); | |
3577 save_int8(buf, context->buf_a_off); | |
3578 save_int8(buf, context->buf_b_off); | |
3579 //FIXME: Sprite rendering state is currently a mess | |
3580 save_int8(buf, context->sprite_index); | |
3581 save_int8(buf, context->sprite_draws); | |
3582 save_int8(buf, context->slot_counter); | |
3583 save_int8(buf, context->cur_slot); | |
3584 for (int i = 0; i < MAX_DRAWS; i++) | |
3585 { | |
3586 sprite_draw *draw = context->sprite_draw_list + i; | |
3587 save_int16(buf, draw->address); | |
3588 save_int16(buf, draw->x_pos); | |
3589 save_int8(buf, draw->pal_priority); | |
3590 save_int8(buf, draw->h_flip); | |
3591 } | |
3592 for (int i = 0; i < MAX_SPRITES_LINE; i++) | |
3593 { | |
3594 sprite_info *info = context->sprite_info_list + i; | |
3595 save_int8(buf, info->size); | |
3596 save_int8(buf, info->index); | |
3597 save_int16(buf, info->y); | |
3598 } | |
3599 save_buffer8(buf, context->linebuf, LINEBUF_SIZE); | |
3600 | |
3601 save_int32(buf, context->cycles); | |
3602 save_int32(buf, context->pending_vint_start); | |
3603 save_int32(buf, context->pending_hint_start); | |
3604 } | |
3605 | |
3606 void vdp_deserialize(deserialize_buffer *buf, void *vcontext) | |
3607 { | |
3608 vdp_context *context = vcontext; | |
3609 uint8_t vramk = load_int8(buf); | |
3610 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE); | |
3611 if ((vramk * 1024) > VRAM_SIZE) { | |
3612 buf->cur_pos += (vramk * 1024) - VRAM_SIZE; | |
3613 } | |
3614 load_buffer16(buf, context->cram, CRAM_SIZE); | |
3615 load_buffer16(buf, context->vsram, VSRAM_SIZE); | |
3616 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); | |
3617 for (int i = 0; i <= REG_DMASRC_H; i++) | |
3618 { | |
3619 context->regs[i] = load_int8(buf); | |
3620 } | |
3621 context->address = load_int32(buf); | |
3622 context->serial_address = load_int32(buf); | |
3623 context->cd = load_int8(buf); | |
3624 uint8_t fifo_size = load_int8(buf); | |
3625 if (fifo_size > FIFO_SIZE) { | |
3626 fatal_error("Invalid fifo size %d", fifo_size); | |
3627 } | |
3628 if (fifo_size) { | |
3629 context->fifo_read = 0; | |
3630 context->fifo_write = fifo_size & (FIFO_SIZE - 1); | |
3631 for (int i = 0; i < fifo_size; i++) | |
3632 { | |
3633 fifo_entry *entry = context->fifo + i; | |
3634 entry->cycle = load_int32(buf); | |
3635 entry->address = load_int32(buf); | |
3636 entry->value = load_int16(buf); | |
3637 entry->cd = load_int8(buf); | |
3638 entry->partial = load_int8(buf); | |
3639 } | |
3640 } else { | |
3641 context->fifo_read = -1; | |
3642 context->fifo_write = 0; | |
3643 } | |
3644 uint16_t flags = load_int16(buf); | |
3645 context->flags2 = flags >> 8; | |
3646 context->flags = flags; | |
3647 context->frame = load_int32(buf); | |
3648 context->vcounter = load_int16(buf); | |
3649 context->hslot = load_int8(buf); | |
3650 context->hv_latch = load_int16(buf); | |
3651 context->state = load_int8(buf); | |
3652 context->hscroll_a = load_int16(buf); | |
3653 context->hscroll_b = load_int16(buf); | |
3654 context->vscroll_latch[0] = load_int16(buf); | |
3655 context->vscroll_latch[1] = load_int16(buf); | |
3656 context->col_1 = load_int16(buf); | |
3657 context->col_2 = load_int16(buf); | |
3658 context->test_port = load_int16(buf); | |
3659 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); | |
3660 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); | |
3661 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK; | |
3662 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK; | |
3663 context->sprite_index = load_int8(buf); | |
3664 context->sprite_draws = load_int8(buf); | |
3665 context->slot_counter = load_int8(buf); | |
3666 context->cur_slot = load_int8(buf); | |
3667 for (int i = 0; i < MAX_DRAWS; i++) | |
3668 { | |
3669 sprite_draw *draw = context->sprite_draw_list + i; | |
3670 draw->address = load_int16(buf); | |
3671 draw->x_pos = load_int16(buf); | |
3672 draw->pal_priority = load_int8(buf); | |
3673 draw->h_flip = load_int8(buf); | |
3674 } | |
3675 for (int i = 0; i < MAX_SPRITES_LINE; i++) | |
3676 { | |
3677 sprite_info *info = context->sprite_info_list + i; | |
3678 info->size = load_int8(buf); | |
3679 info->index = load_int8(buf); | |
3680 info->y = load_int16(buf); | |
3681 } | |
3682 load_buffer8(buf, context->linebuf, LINEBUF_SIZE); | |
3683 | |
3684 context->cycles = load_int32(buf); | |
3685 context->pending_vint_start = load_int32(buf); | |
3686 context->pending_hint_start = load_int32(buf); | |
3687 update_video_params(context); | |
3688 } |