Mercurial > repos > blastem
comparison backend_x86.c @ 1109:4bc27caa6e20
Fix a subtle bug in interrupt handling introduced with the move to a single cycle register in the Z80 core. Fixes regression in Puyo Puyo 2
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Wed, 14 Dec 2016 23:26:12 -0800 |
parents | fc125af5e4f1 |
children | fe8c79f82c22 |
comparison
equal
deleted
inserted
replaced
1108:87114df913ec | 1109:4bc27caa6e20 |
---|---|
11 } | 11 } |
12 | 12 |
13 void check_cycles_int(cpu_options *opts, uint32_t address) | 13 void check_cycles_int(cpu_options *opts, uint32_t address) |
14 { | 14 { |
15 code_info *code = &opts->code; | 15 code_info *code = &opts->code; |
16 uint8_t cc; | |
16 if (opts->limit < 0) { | 17 if (opts->limit < 0) { |
17 or_rr(code, opts->cycles, opts->cycles, SZ_D); | 18 cmp_ir(code, 1, opts->cycles, SZ_D); |
19 cc = CC_NS; | |
18 } else { | 20 } else { |
19 cmp_rr(code, opts->cycles, opts->limit, SZ_D); | 21 cmp_rr(code, opts->cycles, opts->limit, SZ_D); |
22 cc = CC_A; | |
20 } | 23 } |
21 code_ptr jmp_off = code->cur+1; | 24 code_ptr jmp_off = code->cur+1; |
22 jcc(code, CC_NS, jmp_off+1); | 25 jcc(code, cc, jmp_off+1); |
23 mov_ir(code, address, opts->scratch1, SZ_D); | 26 mov_ir(code, address, opts->scratch1, SZ_D); |
24 call(code, opts->handle_cycle_limit_int); | 27 call(code, opts->handle_cycle_limit_int); |
25 *jmp_off = code->cur - (jmp_off+1); | 28 *jmp_off = code->cur - (jmp_off+1); |
26 } | 29 } |
27 | 30 |
28 void check_cycles(cpu_options * opts) | 31 void check_cycles(cpu_options * opts) |
29 { | 32 { |
30 code_info *code = &opts->code; | 33 code_info *code = &opts->code; |
34 uint8_t cc; | |
31 if (opts->limit < 0) { | 35 if (opts->limit < 0) { |
32 or_rr(code, opts->cycles, opts->cycles, SZ_D); | 36 cmp_ir(code, 1, opts->cycles, SZ_D); |
37 cc = CC_NS; | |
33 } else { | 38 } else { |
34 cmp_rr(code, opts->cycles, opts->limit, SZ_D); | 39 cmp_rr(code, opts->cycles, opts->limit, SZ_D); |
40 cc = CC_A; | |
35 } | 41 } |
36 check_alloc_code(code, MAX_INST_LEN*2); | 42 check_alloc_code(code, MAX_INST_LEN*2); |
37 code_ptr jmp_off = code->cur+1; | 43 code_ptr jmp_off = code->cur+1; |
38 jcc(code, CC_NS, jmp_off+1); | 44 jcc(code, cc, jmp_off+1); |
39 call(code, opts->handle_cycle_limit); | 45 call(code, opts->handle_cycle_limit); |
40 *jmp_off = code->cur - (jmp_off+1); | 46 *jmp_off = code->cur - (jmp_off+1); |
41 } | 47 } |
42 | 48 |
43 void log_address(cpu_options *opts, uint32_t address, char * format) | 49 void log_address(cpu_options *opts, uint32_t address, char * format) |