Mercurial > repos > blastem
comparison genesis.c @ 1104:4224980a5f84
Fix the previous WIP commit. Quick tests suggests things are no more broken than before now.
author | Michael Pavone <pavone@retrodev.com> |
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date | Fri, 09 Dec 2016 18:39:44 -0800 |
parents | 22e87b739ad6 |
children | 27ea21b10361 |
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1103:22e87b739ad6 | 1104:4224980a5f84 |
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21 | 21 |
22 //TODO: Figure out the exact value for this | 22 //TODO: Figure out the exact value for this |
23 #define LINES_NTSC 262 | 23 #define LINES_NTSC 262 |
24 #define LINES_PAL 312 | 24 #define LINES_PAL 312 |
25 | 25 |
26 #define MAX_SOUND_CYCLES 100000 | 26 #define MAX_SOUND_CYCLES 100000 |
27 | |
28 uint16_t *cart; | |
29 uint16_t *ram; | |
30 uint8_t z80_ram[Z80_RAM_BYTES]; | |
31 | 27 |
32 uint16_t read_dma_value(uint32_t address) | 28 uint16_t read_dma_value(uint32_t address) |
33 { | 29 { |
34 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do multiply by 2 | 30 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do multiply by 2 |
35 uint16_t *ptr = get_native_pointer(address*2, (void **)genesis->m68k->mem_pointers, &genesis->m68k->options->gen); | 31 uint16_t *ptr = get_native_pointer(address*2, (void **)genesis->m68k->mem_pointers, &genesis->m68k->options->gen); |
459 //Access to Z80 memory incurs a one 68K cycle wait state | 455 //Access to Z80 memory incurs a one 68K cycle wait state |
460 context->current_cycle += MCLKS_PER_68K; | 456 context->current_cycle += MCLKS_PER_68K; |
461 if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { | 457 if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { |
462 location &= 0x7FFF; | 458 location &= 0x7FFF; |
463 if (location < 0x4000) { | 459 if (location < 0x4000) { |
464 z80_ram[location & 0x1FFF] = value; | 460 gen->zram[location & 0x1FFF] = value; |
465 #ifndef NO_Z80 | 461 #ifndef NO_Z80 |
466 z80_handle_code_write(location & 0x1FFF, gen->z80); | 462 z80_handle_code_write(location & 0x1FFF, gen->z80); |
467 #endif | 463 #endif |
468 } else if (location < 0x6000) { | 464 } else if (location < 0x6000) { |
469 sync_sound(gen, context->current_cycle); | 465 sync_sound(gen, context->current_cycle); |
580 //Access to Z80 memory incurs a one 68K cycle wait state | 576 //Access to Z80 memory incurs a one 68K cycle wait state |
581 context->current_cycle += MCLKS_PER_68K; | 577 context->current_cycle += MCLKS_PER_68K; |
582 if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { | 578 if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { |
583 location &= 0x7FFF; | 579 location &= 0x7FFF; |
584 if (location < 0x4000) { | 580 if (location < 0x4000) { |
585 value = z80_ram[location & 0x1FFF]; | 581 value = gen->zram[location & 0x1FFF]; |
586 } else if (location < 0x6000) { | 582 } else if (location < 0x6000) { |
587 sync_sound(gen, context->current_cycle); | 583 sync_sound(gen, context->current_cycle); |
588 value = ym_read_status(gen->ym); | 584 value = ym_read_status(gen->ym); |
589 } else { | 585 } else { |
590 value = 0xFF; | 586 value = 0xFF; |
716 | 712 |
717 location &= 0x7FFF; | 713 location &= 0x7FFF; |
718 uint32_t address = context->bank_reg << 15 | location; | 714 uint32_t address = context->bank_reg << 15 | location; |
719 if (address >= 0xE00000) { | 715 if (address >= 0xE00000) { |
720 address &= 0xFFFF; | 716 address &= 0xFFFF; |
721 ((uint8_t *)ram)[address ^ 1] = value; | 717 ((uint8_t *)gen->work_ram)[address ^ 1] = value; |
722 } else if (address >= 0xC00000) { | 718 } else if (address >= 0xC00000) { |
723 z80_vdp_port_write(location & 0xFF, context, value); | 719 z80_vdp_port_write(location & 0xFF, context, value); |
724 } else { | 720 } else { |
725 fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address); | 721 fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address); |
726 } | 722 } |
815 z80_assert_reset(gen->z80, 0); | 811 z80_assert_reset(gen->z80, 0); |
816 #endif | 812 #endif |
817 | 813 |
818 gen->z80->system = gen; | 814 gen->z80->system = gen; |
819 gen->z80->mem_pointers[0] = gen->zram; | 815 gen->z80->mem_pointers[0] = gen->zram; |
820 gen->z80->mem_pointers[1] = gen->z80->mem_pointers[2] = (uint8_t *)cart; | 816 gen->z80->mem_pointers[1] = gen->z80->mem_pointers[2] = (uint8_t *)main_rom; |
821 | 817 |
822 gen->cart = main_rom; | 818 gen->cart = main_rom; |
823 gen->lock_on = lock_on; | 819 gen->lock_on = lock_on; |
824 gen->work_ram = calloc(2, RAM_WORDS); | 820 gen->work_ram = calloc(2, RAM_WORDS); |
825 gen->zram = z80_ram; | 821 gen->zram = calloc(1, Z80_RAM_BYTES); |
826 setup_io_devices(config, rom, gen); | 822 setup_io_devices(config, rom, gen); |
827 | 823 |
828 gen->save_type = rom->save_type; | 824 gen->save_type = rom->save_type; |
829 gen->save_type = rom->save_type; | 825 gen->save_type = rom->save_type; |
830 if (gen->save_type != SAVE_NONE) { | 826 if (gen->save_type != SAVE_NONE) { |
892 } | 888 } |
893 adjust_int_cycle(gen->m68k, gen->vdp); | 889 adjust_int_cycle(gen->m68k, gen->vdp); |
894 start_68k_context(gen->m68k, pc); | 890 start_68k_context(gen->m68k, pc); |
895 } else { | 891 } else { |
896 if (debugger) { | 892 if (debugger) { |
897 uint32_t address = cart[2] << 16 | cart[3]; | 893 uint32_t address = gen->cart[2] << 16 | gen->cart[3]; |
898 insert_breakpoint(gen->m68k, address, debugger); | 894 insert_breakpoint(gen->m68k, address, debugger); |
899 } | 895 } |
900 m68k_reset(gen->m68k); | 896 m68k_reset(gen->m68k); |
901 } | 897 } |
902 } | 898 } |
916 static tern_node *rom_db; | 912 static tern_node *rom_db; |
917 if (!rom_db) { | 913 if (!rom_db) { |
918 rom_db = load_rom_db(); | 914 rom_db = load_rom_db(); |
919 } | 915 } |
920 *info_out = configure_rom(rom_db, rom, rom_size, lock_on, lock_on_size, base_map, sizeof(base_map)/sizeof(base_map[0])); | 916 *info_out = configure_rom(rom_db, rom, rom_size, lock_on, lock_on_size, base_map, sizeof(base_map)/sizeof(base_map[0])); |
921 #ifndef BIG_ENDIAN | 917 #ifndef BLASTEM_BIG_ENDIAN |
922 byteswap_rom(rom, rom_size); | 918 byteswap_rom(rom_size, rom); |
923 if (lock_on) { | 919 if (lock_on) { |
924 byteswap_rom(lock_on, lock_on_size); | 920 byteswap_rom(lock_on_size, lock_on); |
925 } | 921 } |
926 #endif | 922 #endif |
927 char *m68k_divider = tern_find_path(config, "clocks\0m68k_divider\0").ptrval; | 923 char *m68k_divider = tern_find_path(config, "clocks\0m68k_divider\0").ptrval; |
928 if (!m68k_divider) { | 924 if (!m68k_divider) { |
929 m68k_divider = "7"; | 925 m68k_divider = "7"; |