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Properly handle dbcc, rtr and rte in the debugger next command
author Mike Pavone <pavone@retrodev.com>
date Sun, 09 Feb 2014 10:29:29 -0800
parents 7f54f1773e84
children 775802dab98f
comparison
equal deleted inserted replaced
516:7f54f1773e84 517:3fc1d145493c
1463 break; 1463 break;
1464 } 1464 }
1465 printf(format, param, value); 1465 printf(format, param, value);
1466 break; 1466 break;
1467 case 'n': 1467 case 'n':
1468 //TODO: Deal with dbcc, rtr and rte
1469 if (inst.op == M68K_RTS) { 1468 if (inst.op == M68K_RTS) {
1470 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1); 1469 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1);
1470 } else if (inst.op == M68K_RTE || inst.op == M68K_RTR) {
1471 after = (read_dma_value((context->aregs[7]+2)/2) << 16) | read_dma_value((context->aregs[7]+2)/2 + 1);
1471 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) { 1472 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) {
1472 if (inst.extra.cond = COND_TRUE) { 1473 if (inst.extra.cond == COND_TRUE) {
1473 after = inst.address + 2 + inst.src.params.immed; 1474 after = inst.address + 2 + inst.src.params.immed;
1474 } else { 1475 } else {
1475 branch_f = after; 1476 branch_f = after;
1476 branch_t = inst.address + 2 + inst.src.params.immed; 1477 branch_t = inst.address + 2 + inst.src.params.immed;
1477 insert_breakpoint(context, branch_t, (uint8_t *)debugger); 1478 insert_breakpoint(context, branch_t, (uint8_t *)debugger);
1479 }
1480 } else if(inst.op == M68K_DBCC) {
1481 if (inst.extra.cond == COND_FALSE) {
1482 if (context->dregs[inst.dst.params.regs.pri] & 0xFFFF) {
1483 after = inst.address + 2 + inst.src.params.immed;
1484 }
1485 } else if (inst.extra.cond != COND_TRUE) {
1486 branch_t = after;
1487 branch_f = inst.address + 2 + inst.src.params.immed;
1478 } 1488 }
1479 } else if(inst.op == M68K_JMP) { 1489 } else if(inst.op == M68K_JMP) {
1480 switch(inst.src.addr_mode) 1490 switch(inst.src.addr_mode)
1481 { 1491 {
1482 case MODE_AREG_INDIRECT: 1492 case MODE_AREG_INDIRECT: