Mercurial > repos > blastem
comparison svp.cpu @ 1613:2d9e8a7b8ba2
Initial commit of CPU DSL and a WIP SVP implementation written in that DSL
author | Michael Pavone <pavone@retrodev.com> |
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date | Tue, 18 Sep 2018 09:06:42 -0700 |
parents | |
children | c9639139aedf |
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1612:28ec17387be5 | 1613:2d9e8a7b8ba2 |
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1 info | |
2 prefix svp_ | |
3 opcode_size 16 | |
4 body svp_run_op | |
5 | |
6 regs | |
7 internal 16 scratch1 x y scratch2 st pad pc | |
8 a 32 | |
9 stack 16 stack0 stack1 stack2 stack3 stack4 stack5 | |
10 stackidx 8 | |
11 p 32 | |
12 external 16 pm0 pm1 pm2 xst pm4 ext5 pmc | |
13 pointers0 8 r0 r1 r2 r3 | |
14 pointers1 8 r4 r5 r6 r7 | |
15 iram 16 1024 | |
16 ram0 16 256 | |
17 ram1 16 256 | |
18 zflag 8 | |
19 nflag 8 | |
20 rpl 16 | |
21 | |
22 flags | |
23 register st | |
24 Z 13 zero zflag | |
25 N 15 sign nflag | |
26 R 0-2 none rpl | |
27 | |
28 svp_pop | |
29 mov stack.stackidx dst | |
30 add 1 stackidx stackidx | |
31 switch stackidx | |
32 case 6 | |
33 mov 0 stackidx | |
34 end | |
35 | |
36 svp_push | |
37 arg src 16 | |
38 add -1 stackidx stackidx | |
39 switch stackidx | |
40 case -1 | |
41 mov 5 stackidx | |
42 end | |
43 mov src stack.stackidx | |
44 | |
45 svp_ram_read | |
46 arg mode 16 | |
47 arg banki 16 | |
48 arg regi 16 | |
49 local idx 16 | |
50 | |
51 switch banki | |
52 case 0 | |
53 meta bank ram0 | |
54 meta reg pointers0.regi | |
55 | |
56 default | |
57 meta bank ram1 | |
58 meta reg pointers1.regi | |
59 end | |
60 | |
61 mov reg idx | |
62 switch mode | |
63 case 0 | |
64 meta modestr "" | |
65 | |
66 case 1 | |
67 meta modestr +! | |
68 add 1 reg reg | |
69 | |
70 case 2 | |
71 #loop decremenet | |
72 meta modestr - | |
73 mov reg tmp | |
74 switch rpl | |
75 case 0 | |
76 sub 1 reg reg | |
77 | |
78 default | |
79 lsl 1 rpl rpl | |
80 sub 1 rpl rpl | |
81 local mask 16 | |
82 not rpl mask | |
83 and reg mask reg | |
84 sub 1 tmp tmp | |
85 and rpl tmp tmp | |
86 or rpl reg reg | |
87 | |
88 end | |
89 | |
90 case 3 | |
91 #loop increment | |
92 meta modestr + | |
93 | |
94 and 7 st rpl | |
95 switch rpl | |
96 case 0 | |
97 sub 1 reg reg | |
98 | |
99 default | |
100 mov reg tmp | |
101 lsl 1 rpl rpl | |
102 sub 1 rpl rpl | |
103 local mask 16 | |
104 not rpl mask | |
105 and reg mask reg | |
106 add 1 tmp tmp | |
107 and rpl tmp tmp | |
108 or rpl reg reg | |
109 | |
110 end | |
111 end | |
112 | |
113 and 255 idx idx | |
114 meta val bank.idx | |
115 | |
116 svp_read_ext | |
117 arg regidxr 16 | |
118 switch regidxr | |
119 case 7 | |
120 meta val a | |
121 | |
122 default | |
123 #TODO: PMAR stuff | |
124 meta val external.regidxr | |
125 end | |
126 | |
127 svp_write_ext | |
128 arg regidxw 16 | |
129 switch regidxw | |
130 case 7 | |
131 and 0xFFFF0000 a a | |
132 or src a a | |
133 | |
134 default | |
135 #TODO: PMAR stuff | |
136 mov src external.regidxw | |
137 end | |
138 | |
139 svp_alu_op | |
140 arg P 16 | |
141 arg param 32 | |
142 | |
143 switch P | |
144 case 1 | |
145 dis "sub %s" name | |
146 sub param a a | |
147 | |
148 case 3 | |
149 dis "cmp %s" name | |
150 cmp param a | |
151 | |
152 case 4 | |
153 dis "add %s" name | |
154 add param a a | |
155 | |
156 case 5 | |
157 dis "and %s" name | |
158 and param a a | |
159 | |
160 case 6 | |
161 dis "or %s" name | |
162 or param a a | |
163 | |
164 case 7 | |
165 dis "eor %s" name | |
166 xor param a a | |
167 end | |
168 update_flags ZN | |
169 | |
170 svp_check_cond | |
171 arg fval 16 | |
172 arg cond 16 | |
173 local invert 8 | |
174 switch cond | |
175 case 0 | |
176 meta flag 1 | |
177 | |
178 case 5 | |
179 meta flag zflag | |
180 | |
181 case 7 | |
182 meta flag nflag | |
183 | |
184 default | |
185 meta flag 0 | |
186 end | |
187 switch fval | |
188 case 0 | |
189 lnot flag invert | |
190 meta istrue invert | |
191 | |
192 default | |
193 meta istrue flag | |
194 end | |
195 | |
196 PPP0000000000000 alu_n1 | |
197 invalid P 0 | |
198 invalid P 2 | |
199 meta name "-" | |
200 svp_alu_op P 0xFFFF0000 | |
201 | |
202 PPP0000000000RRR alu_r | |
203 invalid P 0 | |
204 invalid P 2 | |
205 local tmp 32 | |
206 lsl internal.R 16 tmp | |
207 meta name internal.R | |
208 svp_alu_op P tmp | |
209 | |
210 PPP0000000000011 alu_a | |
211 invalid P 0 | |
212 invalid P 2 | |
213 svp_alu_op P a | |
214 | |
215 PPP0000000000101 alu_stack | |
216 invalid P 0 | |
217 invalid P 2 | |
218 local tmp 32 | |
219 meta dst tmp | |
220 svp_pop | |
221 meta name "st" | |
222 svp_alu_op P tmp | |
223 | |
224 PPP0000000000111 alu_p | |
225 invalid P 0 | |
226 invalid P 2 | |
227 meta name p | |
228 svp_alu_op P p | |
229 | |
230 PPP0000000001RRR alu_ext | |
231 invalid P 0 | |
232 invalid P 2 | |
233 local tmp 32 | |
234 svp_read_ext R | |
235 lsl val 16 tmp | |
236 meta name val | |
237 svp_alu_op P tmp | |
238 | |
239 PPP0001B000MMRR alu_ram | |
240 invalid P 0 | |
241 invalid P 2 | |
242 svp_ram_read M B R | |
243 local tmp 32 | |
244 lsl val 16 tmp | |
245 | |
246 switch P | |
247 case 1 | |
248 dis "sub (%s%s)" reg modestr | |
249 sub tmp a a | |
250 | |
251 case 3 | |
252 dis "cmp (%s%s)" reg modestr | |
253 cmp tmp a | |
254 | |
255 case 4 | |
256 dis "add (%s%s)" reg modestr | |
257 add tmp a a | |
258 | |
259 case 5 | |
260 dis "and (%s%s)" reg modestr | |
261 and tmp a a | |
262 | |
263 case 6 | |
264 dis "or (%s%s)" reg modestr | |
265 or tmp a a | |
266 | |
267 case 7 | |
268 dis "eor (%s%s)" reg modestr | |
269 xor tmp a a | |
270 end | |
271 | |
272 update_flags ZN | |
273 | |
274 PPP0000000001111 alu_al | |
275 invalid P 0 | |
276 invalid P 2 | |
277 local tmp 32 | |
278 lsl a 16 tmp | |
279 | |
280 meta name al | |
281 svp_alu_op P tmp | |
282 | |
283 1001000FCCCC0OOO cond_mod | |
284 svp_check_cond F C | |
285 switch istrue | |
286 case 0 | |
287 | |
288 default | |
289 switch O | |
290 case 2 | |
291 asr a 1 a | |
292 update_flags ZN | |
293 | |
294 case 3 | |
295 lsl a 1 a | |
296 update_flags ZN | |
297 | |
298 case 6 | |
299 neg a a | |
300 update_flags ZN | |
301 | |
302 case 7 | |
303 abs a a | |
304 update_flags N | |
305 end | |
306 | |
307 000000000DDD0SSS ld_int_int | |
308 dis "ld %s, %s" internal.D internal.S | |
309 mov internal.S internal.D | |
310 | |
311 000000000DDD0101 ld_int_st | |
312 dis "ld %s, st" internal.D | |
313 meta dst internal.D | |
314 svp_pop | |
315 | |
316 0000000000110101 ld_a_st | |
317 dis "ld a, st" | |
318 local tmp 32 | |
319 meta dst tmp | |
320 svp_pop | |
321 lsl tmp 16 tmp | |
322 and 0xFFFF a a | |
323 or tmp a a | |
324 | |
325 0000000001110101 ld_p_st | |
326 dis "ld p, st" | |
327 local tmp 32 | |
328 meta dst tmp | |
329 svp_pop | |
330 lsl tmp 16 tmp | |
331 and 0xFFFF p p | |
332 or tmp p p | |
333 | |
334 0000000001010SSS ld_st_int | |
335 dis "ld st, %s" internal.S | |
336 svp_push internal.S | |
337 | |
338 0000000001010011 ld_st_a | |
339 dis "ld st, a" | |
340 local tmp 32 | |
341 lsr a 16 tmp | |
342 svp_push tmp | |
343 | |
344 0000000001010111 ld_st_p | |
345 dis "ld st, p" | |
346 local tmp 32 | |
347 lsr p 16 tmp | |
348 svp_push tmp | |
349 | |
350 0000000000000000 ld_n1_n1 | |
351 #nop? | |
352 dis "ld -, -" | |
353 | |
354 0000000000000SSS ld_n1_int | |
355 #nop? | |
356 dis "nop??" | |
357 | |
358 0000000000110111 ld_a_p | |
359 dis "ld a, p" | |
360 mov p a | |
361 | |
362 0000000001110011 ld_p_a | |
363 dis "ld p, a" | |
364 mov a p | |
365 | |
366 0000000000110011 ld_a_a | |
367 dis "ld a, a" | |
368 mov a a | |
369 | |
370 0000000001110111 ld_p_p | |
371 dis "ld p, p" | |
372 mov p p | |
373 | |
374 000000000DDD0111 ld_int_p | |
375 local tmp 32 | |
376 lsr p 16 tmp | |
377 mov tmp internal.D | |
378 dis "ld %s, p" internal.D | |
379 | |
380 000000000DDD0111 ld_int_a | |
381 local tmp 32 | |
382 lsr a 16 tmp | |
383 mov tmp internal.D | |
384 dis "ld %s, a" internal.D | |
385 | |
386 0000000001110SSS ld_p_int | |
387 local tmp 32 | |
388 lsl internal.S 16 tmp | |
389 mov tmp p | |
390 dis "ld p, %s" internal.S | |
391 | |
392 0000000000110SSS ld_a_int | |
393 local tmp 32 | |
394 lsl internal.S 16 tmp | |
395 mov tmp a | |
396 dis "ld a, %s" internal.S | |
397 | |
398 000000000DDD0000 ld_int_n1 | |
399 dis "ld %s, -" internal.D | |
400 mov 0xFFFF internal.D | |
401 | |
402 0000000000110000 ld_a_n1 | |
403 dis "ld a, -" | |
404 and 0xFFFF a a | |
405 or 0xFFFF0000 a a | |
406 | |
407 0000000001110000 ld_p_n1 | |
408 dis "ld p, -" | |
409 and 0xFFFF p p | |
410 or 0xFFFF0000 p p | |
411 | |
412 000000000DDD1SSS ld_int_ext | |
413 svp_read_ext S | |
414 dis "ld %s, %s" internal.D val | |
415 mov val internal.D | |
416 | |
417 0000000000111SSS ld_a_ext | |
418 svp_read_ext S | |
419 dis "ld a, %s" val | |
420 local tmp 32 | |
421 lsl val 16 tmp | |
422 and 0xFFFF a a | |
423 or tmp a a | |
424 | |
425 0000000001111SSS ld_p_ext | |
426 svp_read_ext S | |
427 dis "ld p, %s" val | |
428 local tmp 32 | |
429 lsl val 16 tmp | |
430 and 0xFFFF p p | |
431 or tmp p p | |
432 | |
433 000000001DDD0SSS ld_ext_int | |
434 meta src internal.S | |
435 svp_write_ext D | |
436 switch D | |
437 case 7 | |
438 dis "ld al, %s" src | |
439 | |
440 default | |
441 dis "ld %s, %s" external.D src | |
442 end | |
443 | |
444 000000001DDD0011 ld_ext_a | |
445 local tmp 32 | |
446 lsr a 16 tmp | |
447 meta src tmp | |
448 svp_write_ext D | |
449 switch D | |
450 case 7 | |
451 dis "ld al, a" | |
452 | |
453 default | |
454 dis "ld %s, a" external.D | |
455 end | |
456 | |
457 000000001DDD0111 ld_ext_p | |
458 local tmp 32 | |
459 lsr p 16 tmp | |
460 meta src tmp | |
461 svp_write_ext D | |
462 switch D | |
463 case 7 | |
464 dis "ld al, p" | |
465 | |
466 default | |
467 dis "ld %s, p" external.D | |
468 end | |
469 | |
470 | |
471 000000001DDD1SSS ld_ext_ext | |
472 svp_read_ext S | |
473 meta src val | |
474 svp_write_ext D | |
475 switch D | |
476 case 7 | |
477 dis "ld al, %s" src | |
478 default | |
479 dis "ld %s, %s" external.D src | |
480 end | |
481 | |
482 0000001B0DDDMMPP ld_int_ram | |
483 svp_ram_read M B P | |
484 dis "ld %s, (%s%s)" internal.D reg modestr | |
485 mov val internal.D | |
486 | |
487 0000001B0011MMPP ld_a_ram | |
488 svp_ram_read M B P | |
489 dis "ld a, (%s%s)" reg modestr | |
490 local tmp 32 | |
491 lsl val 16 tmp | |
492 and 0xFFFF a a | |
493 or tmp a a | |
494 | |
495 0000001B0111MMPP ld_p_ram | |
496 svp_ram_read M B P | |
497 dis "ld p, (%s%s)" reg modestr | |
498 local tmp 32 | |
499 lsl val 16 tmp | |
500 and 0xFFFF p p | |
501 or tmp p p | |
502 | |
503 0000001B0101MMPP ld_st_ram | |
504 svp_ram_read M B P | |
505 dis "ld st, (%s%s)" reg modestr | |
506 svp_push val | |
507 | |
508 0100100FCCCC0000 call_cond | |
509 svp_check_cond F C | |
510 svp_op_fetch | |
511 switch istrue | |
512 case 0 | |
513 | |
514 default | |
515 svp_push pc | |
516 mov scratch1 pc | |
517 end | |
518 | |
519 0100110FCCCC0000 bra_cond | |
520 svp_check_cond F C | |
521 svp_op_fetch | |
522 switch istrue | |
523 case 0 | |
524 | |
525 default | |
526 mov scratch1 pc | |
527 end | |
528 | |
529 svp_op_fetch | |
530 cycles 1 | |
531 cmp 1024 pc | |
532 | |
533 if >=U | |
534 mov pc scratch1 | |
535 add scratch1 scratch1 scratch1 | |
536 ocall read_16 | |
537 | |
538 else | |
539 mov iram.pc scratch1 | |
540 end | |
541 add 1 pc pc | |
542 | |
543 svp_run_op | |
544 svp_op_fetch | |
545 dispatch scratch1 |