Mercurial > repos > blastem
comparison vdp.c @ 1906:2d462aa78349
Make VDP VSRAM capacity respect model selection
author | Michael Pavone <pavone@retrodev.com> |
---|---|
date | Thu, 27 Feb 2020 18:38:15 -0800 |
parents | 789746b1a1b3 |
children | 2c742812bcbb |
comparison
equal
deleted
inserted
replaced
1905:1ec6931d0a49 | 1906:2d462aa78349 |
---|---|
142 context->top_offset = border_top - context->border_top; | 142 context->top_offset = border_top - context->border_top; |
143 } | 143 } |
144 | 144 |
145 static uint8_t color_map_init_done; | 145 static uint8_t color_map_init_done; |
146 | 146 |
147 vdp_context *init_vdp_context(uint8_t region_pal) | 147 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram) |
148 { | 148 { |
149 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE); | 149 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE); |
150 if (headless) { | 150 if (headless) { |
151 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(uint32_t)); | 151 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(uint32_t)); |
152 context->output_pitch = LINEBUF_SIZE * sizeof(uint32_t); | 152 context->output_pitch = LINEBUF_SIZE * sizeof(uint32_t); |
156 } | 156 } |
157 context->sprite_draws = MAX_SPRITES_LINE; | 157 context->sprite_draws = MAX_SPRITES_LINE; |
158 context->fifo_write = 0; | 158 context->fifo_write = 0; |
159 context->fifo_read = -1; | 159 context->fifo_read = -1; |
160 context->regs[REG_HINT] = context->hint_counter = 0xFF; | 160 context->regs[REG_HINT] = context->hint_counter = 0xFF; |
161 context->vsram_size = has_max_vsram ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE; | |
161 | 162 |
162 if (!color_map_init_done) { | 163 if (!color_map_init_done) { |
163 uint8_t b,g,r; | 164 uint8_t b,g,r; |
164 for (uint16_t color = 0; color < (1 << 12); color++) { | 165 for (uint16_t color = 0; color < (1 << 12); color++) { |
165 if (color & FBUF_SHADOW) { | 166 if (color & FBUF_SHADOW) { |
936 write_cram(context, start->address, start->partial ? context->fifo[context->fifo_write].value : start->value); | 937 write_cram(context, start->address, start->partial ? context->fifo[context->fifo_write].value : start->value); |
937 } | 938 } |
938 break; | 939 break; |
939 } | 940 } |
940 case VSRAM_WRITE: | 941 case VSRAM_WRITE: |
941 if (((start->address/2) & 63) < VSRAM_SIZE) { | 942 if (((start->address/2) & 63) < context->vsram_size) { |
942 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles); | 943 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles); |
943 if (start->partial == 3) { | 944 if (start->partial == 3) { |
944 if (start->address & 1) { | 945 if (start->address & 1) { |
945 context->vsram[(start->address/2) & 63] &= 0xFF; | 946 context->vsram[(start->address/2) & 63] &= 0xFF; |
946 context->vsram[(start->address/2) & 63] |= start->value << 8; | 947 context->vsram[(start->address/2) & 63] |= start->value << 8; |
1010 //Should this happen after the prefetch or after the read? | 1011 //Should this happen after the prefetch or after the read? |
1011 increment_address(context); | 1012 increment_address(context); |
1012 break; | 1013 break; |
1013 case VSRAM_READ: { | 1014 case VSRAM_READ: { |
1014 uint16_t address = (context->address /2) & 63; | 1015 uint16_t address = (context->address /2) & 63; |
1015 if (address >= VSRAM_SIZE) { | 1016 if (address >= context->vsram_size) { |
1016 address = 0; | 1017 address = 0; |
1017 } | 1018 } |
1018 context->prefetch = context->vsram[address] & VSRAM_BITS; | 1019 context->prefetch = context->vsram[address] & VSRAM_BITS; |
1019 context->prefetch |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; | 1020 context->prefetch |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; |
1020 context->flags |= FLAG_READ_FETCHED; | 1021 context->flags |= FLAG_READ_FETCHED; |
4230 context->flags2 &= ~FLAG2_HINT_PENDING; | 4231 context->flags2 &= ~FLAG2_HINT_PENDING; |
4231 } | 4232 } |
4232 } | 4233 } |
4233 } | 4234 } |
4234 | 4235 |
4235 #define VDP_STATE_VERSION 1 | 4236 #define VDP_STATE_VERSION 2 |
4236 void vdp_serialize(vdp_context *context, serialize_buffer *buf) | 4237 void vdp_serialize(vdp_context *context, serialize_buffer *buf) |
4237 { | 4238 { |
4238 save_int8(buf, VDP_STATE_VERSION); | 4239 save_int8(buf, VDP_STATE_VERSION); |
4239 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing | 4240 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing |
4240 save_buffer8(buf, context->vdpmem, VRAM_SIZE); | 4241 save_buffer8(buf, context->vdpmem, VRAM_SIZE); |
4241 save_buffer16(buf, context->cram, CRAM_SIZE); | 4242 save_buffer16(buf, context->cram, CRAM_SIZE); |
4242 save_buffer16(buf, context->vsram, VSRAM_SIZE); | 4243 save_buffer16(buf, context->vsram, MAX_VSRAM_SIZE); |
4243 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); | 4244 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4244 for (int i = 0; i <= REG_DMASRC_H; i++) | 4245 for (int i = 0; i <= REG_DMASRC_H; i++) |
4245 { | 4246 { |
4246 save_int8(buf, context->regs[i]); | 4247 save_int8(buf, context->regs[i]); |
4247 } | 4248 } |
4335 load_buffer16(buf, context->cram, CRAM_SIZE); | 4336 load_buffer16(buf, context->cram, CRAM_SIZE); |
4336 for (int i = 0; i < CRAM_SIZE; i++) | 4337 for (int i = 0; i < CRAM_SIZE; i++) |
4337 { | 4338 { |
4338 update_color_map(context, i, context->cram[i]); | 4339 update_color_map(context, i, context->cram[i]); |
4339 } | 4340 } |
4340 load_buffer16(buf, context->vsram, VSRAM_SIZE); | 4341 load_buffer16(buf, context->vsram, version > 1 ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE); |
4341 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); | 4342 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4342 for (int i = 0; i <= REG_DMASRC_H; i++) | 4343 for (int i = 0; i <= REG_DMASRC_H; i++) |
4343 { | 4344 { |
4344 context->regs[i] = load_int8(buf); | 4345 context->regs[i] = load_int8(buf); |
4345 } | 4346 } |