Mercurial > repos > blastem
comparison blastem.c @ 717:22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
author | Michael Pavone <pavone@retrodev.com> |
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date | Tue, 19 May 2015 23:23:53 -0700 |
parents | 72ab94527a8a |
children | eaba6789f316 |
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716:b707a8ddc202 | 717:22dbdf50d33c |
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123 return 0; | 123 return 0; |
124 } | 124 } |
125 | 125 |
126 void adjust_int_cycle(m68k_context * context, vdp_context * v_context) | 126 void adjust_int_cycle(m68k_context * context, vdp_context * v_context) |
127 { | 127 { |
128 //static int old_int_cycle = CYCLE_NEVER; | |
128 genesis_context *gen = context->system; | 129 genesis_context *gen = context->system; |
129 if (context->sync_cycle - context->current_cycle > gen->max_cycles) { | 130 if (context->sync_cycle - context->current_cycle > gen->max_cycles) { |
130 context->sync_cycle = context->current_cycle + gen->max_cycles; | 131 context->sync_cycle = context->current_cycle + gen->max_cycles; |
131 } | 132 } |
132 context->int_cycle = CYCLE_NEVER; | 133 context->int_cycle = CYCLE_NEVER; |
145 | 146 |
146 } | 147 } |
147 } | 148 } |
148 } | 149 } |
149 } | 150 } |
151 /*if (context->int_cycle != old_int_cycle) { | |
152 printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->current_cycle, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter); | |
153 old_int_cycle = context->int_cycle; | |
154 }*/ | |
150 | 155 |
151 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle; | 156 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle; |
152 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n", | 157 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n", |
153 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), | 158 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), |
154 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/ | 159 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/ |
240 } | 245 } |
241 gen->frame_end = vdp_cycles_to_frame_end(v_context); | 246 gen->frame_end = vdp_cycles_to_frame_end(v_context); |
242 context->sync_cycle = gen->frame_end; | 247 context->sync_cycle = gen->frame_end; |
243 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot); | 248 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot); |
244 if (context->int_ack) { | 249 if (context->int_ack) { |
250 printf("acknowledging %d @ %d:%d, vcounter: %d, hslot: %d\n", context->int_ack, context->current_cycle, v_context->cycles, v_context->vcounter, v_context->hslot); | |
245 vdp_int_ack(v_context, context->int_ack); | 251 vdp_int_ack(v_context, context->int_ack); |
246 context->int_ack = 0; | 252 context->int_ack = 0; |
247 } | 253 } |
248 adjust_int_cycle(context, v_context); | 254 adjust_int_cycle(context, v_context); |
249 if (address) { | 255 if (address) { |