Mercurial > repos > blastem
comparison z80_to_x86.c @ 275:1a7d0a964ad2
Implement shift instructions (untested)
author | Mike Pavone <pavone@retrodev.com> |
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date | Fri, 03 May 2013 18:49:48 -0700 |
parents | be2b845d3e94 |
children | 765e132edd71 |
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274:be2b845d3e94 | 275:1a7d0a964ad2 |
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12 #define ZCYCLES RBP | 12 #define ZCYCLES RBP |
13 #define ZLIMIT RDI | 13 #define ZLIMIT RDI |
14 #define SCRATCH1 R13 | 14 #define SCRATCH1 R13 |
15 #define SCRATCH2 R14 | 15 #define SCRATCH2 R14 |
16 #define CONTEXT RSI | 16 #define CONTEXT RSI |
17 | |
18 //#define DO_DEBUG_PRINT | |
17 | 19 |
18 #ifdef DO_DEBUG_PRINT | 20 #ifdef DO_DEBUG_PRINT |
19 #define dprintf printf | 21 #define dprintf printf |
20 #else | 22 #else |
21 #define dprintf | 23 #define dprintf |
906 case Z80_IM: | 908 case Z80_IM: |
907 dst = zcycles(dst, 4); | 909 dst = zcycles(dst, 4); |
908 dst = mov_irdisp8(dst, inst->immed, CONTEXT, offsetof(z80_context, im), SZ_B); | 910 dst = mov_irdisp8(dst, inst->immed, CONTEXT, offsetof(z80_context, im), SZ_B); |
909 break; | 911 break; |
910 case Z80_RLC: | 912 case Z80_RLC: |
911 cycles = inst->immed == 1 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); | 913 cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
912 dst = zcycles(dst, cycles); | 914 dst = zcycles(dst, cycles); |
913 if (inst->reg == Z80_UNUSED) { | 915 if (inst->reg == Z80_UNUSED) { |
914 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); | 916 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); |
915 dst = zcycles(dst, 1); | 917 dst = zcycles(dst, 1); |
916 } else { | 918 } else { |
929 } else { | 931 } else { |
930 dst = z80_save_reg(dst, inst, opts); | 932 dst = z80_save_reg(dst, inst, opts); |
931 } | 933 } |
932 break; | 934 break; |
933 case Z80_RL: | 935 case Z80_RL: |
934 cycles = inst->immed == 1 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); | 936 cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
935 dst = zcycles(dst, cycles); | 937 dst = zcycles(dst, cycles); |
936 if (inst->reg == Z80_UNUSED) { | 938 if (inst->reg == Z80_UNUSED) { |
937 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); | 939 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); |
938 dst = zcycles(dst, 1); | 940 dst = zcycles(dst, 1); |
939 } else { | 941 } else { |
953 } else { | 955 } else { |
954 dst = z80_save_reg(dst, inst, opts); | 956 dst = z80_save_reg(dst, inst, opts); |
955 } | 957 } |
956 break; | 958 break; |
957 case Z80_RRC: | 959 case Z80_RRC: |
958 cycles = inst->immed == 1 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); | 960 cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
959 dst = zcycles(dst, cycles); | 961 dst = zcycles(dst, cycles); |
960 if (inst->reg == Z80_UNUSED) { | 962 if (inst->reg == Z80_UNUSED) { |
961 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); | 963 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); |
962 dst = zcycles(dst, 1); | 964 dst = zcycles(dst, 1); |
963 } else { | 965 } else { |
976 } else { | 978 } else { |
977 dst = z80_save_reg(dst, inst, opts); | 979 dst = z80_save_reg(dst, inst, opts); |
978 } | 980 } |
979 break; | 981 break; |
980 case Z80_RR: | 982 case Z80_RR: |
981 cycles = inst->immed == 1 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); | 983 cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
982 dst = zcycles(dst, cycles); | 984 dst = zcycles(dst, cycles); |
983 if (inst->reg == Z80_UNUSED) { | 985 if (inst->reg == Z80_UNUSED) { |
984 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); | 986 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); |
985 dst = zcycles(dst, 1); | 987 dst = zcycles(dst, 1); |
986 } else { | 988 } else { |
999 dst = z80_save_result(dst, inst); | 1001 dst = z80_save_result(dst, inst); |
1000 } else { | 1002 } else { |
1001 dst = z80_save_reg(dst, inst, opts); | 1003 dst = z80_save_reg(dst, inst, opts); |
1002 } | 1004 } |
1003 break; | 1005 break; |
1004 /*case Z80_SLA: | 1006 case Z80_SLA: |
1007 case Z80_SLL: | |
1008 cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; | |
1009 dst = zcycles(dst, cycles); | |
1010 if (inst->reg == Z80_UNUSED) { | |
1011 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); | |
1012 dst = zcycles(dst, 1); | |
1013 } else { | |
1014 dst = translate_z80_reg(inst, &dst_op, dst, opts); | |
1015 } | |
1016 dst = shl_ir(dst, 1, dst_op.base, SZ_B); | |
1017 dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B); | |
1018 //TODO: Implement half-carry flag | |
1019 dst = cmp_ir(dst, 0, dst_op.base, SZ_B); | |
1020 dst = setcc_rdisp8(dst, CC_P, CONTEXT, zf_off(ZF_PV)); | |
1021 dst = setcc_rdisp8(dst, CC_Z, CONTEXT, zf_off(ZF_Z)); | |
1022 dst = setcc_rdisp8(dst, CC_S, CONTEXT, zf_off(ZF_S)); | |
1023 if (inst->reg == Z80_UNUSED) { | |
1024 dst = z80_save_result(dst, inst); | |
1025 } else { | |
1026 dst = z80_save_reg(dst, inst, opts); | |
1027 } | |
1028 break; | |
1005 case Z80_SRA: | 1029 case Z80_SRA: |
1006 case Z80_SLL: | 1030 cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
1031 dst = zcycles(dst, cycles); | |
1032 if (inst->reg == Z80_UNUSED) { | |
1033 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); | |
1034 dst = zcycles(dst, 1); | |
1035 } else { | |
1036 dst = translate_z80_reg(inst, &dst_op, dst, opts); | |
1037 } | |
1038 dst = sar_ir(dst, 1, dst_op.base, SZ_B); | |
1039 dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B); | |
1040 //TODO: Implement half-carry flag | |
1041 dst = cmp_ir(dst, 0, dst_op.base, SZ_B); | |
1042 dst = setcc_rdisp8(dst, CC_P, CONTEXT, zf_off(ZF_PV)); | |
1043 dst = setcc_rdisp8(dst, CC_Z, CONTEXT, zf_off(ZF_Z)); | |
1044 dst = setcc_rdisp8(dst, CC_S, CONTEXT, zf_off(ZF_S)); | |
1045 if (inst->reg == Z80_UNUSED) { | |
1046 dst = z80_save_result(dst, inst); | |
1047 } else { | |
1048 dst = z80_save_reg(dst, inst, opts); | |
1049 } | |
1050 break; | |
1007 case Z80_SRL: | 1051 case Z80_SRL: |
1008 case Z80_RLD: | 1052 cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
1053 dst = zcycles(dst, cycles); | |
1054 if (inst->reg == Z80_UNUSED) { | |
1055 dst = translate_z80_ea(inst, &dst_op, dst, opts, READ, MODIFY); | |
1056 dst = zcycles(dst, 1); | |
1057 } else { | |
1058 dst = translate_z80_reg(inst, &dst_op, dst, opts); | |
1059 } | |
1060 dst = shr_ir(dst, 1, dst_op.base, SZ_B); | |
1061 dst = mov_irdisp8(dst, 0, CONTEXT, zf_off(ZF_N), SZ_B); | |
1062 //TODO: Implement half-carry flag | |
1063 dst = cmp_ir(dst, 0, dst_op.base, SZ_B); | |
1064 dst = setcc_rdisp8(dst, CC_P, CONTEXT, zf_off(ZF_PV)); | |
1065 dst = setcc_rdisp8(dst, CC_Z, CONTEXT, zf_off(ZF_Z)); | |
1066 dst = setcc_rdisp8(dst, CC_S, CONTEXT, zf_off(ZF_S)); | |
1067 if (inst->reg == Z80_UNUSED) { | |
1068 dst = z80_save_result(dst, inst); | |
1069 } else { | |
1070 dst = z80_save_reg(dst, inst, opts); | |
1071 } | |
1072 /*case Z80_RLD: | |
1009 case Z80_RRD:*/ | 1073 case Z80_RRD:*/ |
1010 case Z80_BIT: | 1074 case Z80_BIT: |
1011 cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; | 1075 cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
1012 dst = zcycles(dst, cycles); | 1076 dst = zcycles(dst, cycles); |
1013 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); | 1077 dst = translate_z80_ea(inst, &src_op, dst, opts, READ, DONT_MODIFY); |