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comparison m68k_core.c @ 1212:191ac490fb3d

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Implement extra read and fix movem timing generally
author Michael Pavone <pavone@retrodev.com>
date Sun, 29 Jan 2017 00:15:18 -0800
parents 8f14767661fa
children afa3d0a227ae
comparison
equal deleted inserted replaced
1211:bb41c821d6d9 1212:191ac490fb3d
459 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { 459 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
460 native_to_areg(opts, opts->gen.scratch2, inst->dst.params.regs.pri); 460 native_to_areg(opts, opts->gen.scratch2, inst->dst.params.regs.pri);
461 } 461 }
462 } else { 462 } else {
463 //mem to reg 463 //mem to reg
464 early_cycles = 4; 464 early_cycles = 8; //includes prefetch
465 switch (inst->src.addr_mode) 465 switch (inst->src.addr_mode)
466 { 466 {
467 case MODE_AREG_INDIRECT: 467 case MODE_AREG_INDIRECT:
468 case MODE_AREG_POSTINC: 468 case MODE_AREG_POSTINC:
469 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); 469 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1);
518 } 518 }
519 } 519 }
520 if (inst->src.addr_mode == MODE_AREG_POSTINC) { 520 if (inst->src.addr_mode == MODE_AREG_POSTINC) {
521 native_to_areg(opts, opts->gen.scratch1, inst->src.params.regs.pri); 521 native_to_areg(opts, opts->gen.scratch1, inst->src.params.regs.pri);
522 } 522 }
523 } 523 //Extra read
524 //prefetch 524 call(code, opts->read_16);
525 cycles(&opts->gen, 4); 525 }
526 } 526 }
527 527
528 static void translate_m68k_nop(m68k_options *opts, m68kinst *inst) 528 static void translate_m68k_nop(m68k_options *opts, m68kinst *inst)
529 { 529 {
530 cycles(&opts->gen, BUS); 530 cycles(&opts->gen, BUS);