Mercurial > repos > blastem
comparison z80_to_x86.c @ 335:14a937097c2b
Some Z80 interrupt fixes
author | Mike Pavone <pavone@retrodev.com> |
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date | Tue, 14 May 2013 21:59:56 -0700 |
parents | 684e71e9f0d0 |
children | c42fae88d346 |
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334:4c91470e1a53 | 335:14a937097c2b |
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891 dst = mov_rdisp8r(dst, CONTEXT, offsetof(z80_context, sync_cycle), ZLIMIT, SZ_D); | 891 dst = mov_rdisp8r(dst, CONTEXT, offsetof(z80_context, sync_cycle), ZLIMIT, SZ_D); |
892 break; | 892 break; |
893 case Z80_EI: | 893 case Z80_EI: |
894 //TODO: Implement interrupt enable latency of 1 instruction afer EI | 894 //TODO: Implement interrupt enable latency of 1 instruction afer EI |
895 dst = zcycles(dst, 4); | 895 dst = zcycles(dst, 4); |
896 dst = mov_rrdisp8(dst, ZCYCLES, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); | |
896 dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff1), SZ_B); | 897 dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff1), SZ_B); |
897 dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff2), SZ_B); | 898 dst = mov_irdisp8(dst, 1, CONTEXT, offsetof(z80_context, iff2), SZ_B); |
899 //interrupt enable has a one-instruction latency, minimum instruction duration is 4 cycles | |
900 dst = add_irdisp8(dst, 4, CONTEXT, offsetof(z80_context, int_enable_cycle), SZ_D); | |
898 dst = call(dst, (uint8_t *)z80_do_sync); | 901 dst = call(dst, (uint8_t *)z80_do_sync); |
899 break; | 902 break; |
900 case Z80_IM: | 903 case Z80_IM: |
901 dst = zcycles(dst, 4); | 904 dst = zcycles(dst, 4); |
902 dst = mov_irdisp8(dst, inst->immed, CONTEXT, offsetof(z80_context, im), SZ_B); | 905 dst = mov_irdisp8(dst, inst->immed, CONTEXT, offsetof(z80_context, im), SZ_B); |