Mercurial > repos > blastem
comparison vdp.c @ 771:0565b2c1a034
Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
author | Michael Pavone <pavone@retrodev.com> |
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date | Fri, 17 Jul 2015 08:49:23 -0700 |
parents | 483f7e7926a6 |
children | ac65086c031e |
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770:a3b90f746dcf | 771:0565b2c1a034 |
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908 for (int32_t i = 0; i < 16; i ++) { | 908 for (int32_t i = 0; i < 16; i ++) { |
909 *(dst++) = context->colors[line / 3 + (col - 34) * 0x20]; | 909 *(dst++) = context->colors[line / 3 + (col - 34) * 0x20]; |
910 } | 910 } |
911 } | 911 } |
912 } else { | 912 } else { |
913 uint32_t cell = (line / 8) * (context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32) + col; | 913 uint32_t base = (context->debug - 3) * 0x200; |
914 uint32_t address = cell * 32 + (line % 8) * 4; | 914 uint32_t cell = base + (line / 8) * (context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32) + col; |
915 uint32_t address = (cell * 32 + (line % 8) * 4) & 0xFFFF; | |
915 for (int32_t i = 0; i < 4; i ++) { | 916 for (int32_t i = 0; i < 4; i ++) { |
916 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; | 917 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; |
917 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; | 918 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; |
918 address++; | 919 address++; |
919 } | 920 } |
920 cell++; | 921 cell++; |
921 address = cell * 32 + (line % 8) * 4; | 922 address = (cell * 32 + (line % 8) * 4) & 0xFFFF; |
922 for (int32_t i = 0; i < 4; i ++) { | 923 for (int32_t i = 0; i < 4; i ++) { |
923 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; | 924 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; |
924 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; | 925 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; |
925 address++; | 926 address++; |
926 } | 927 } |
1737 } | 1738 } |
1738 fifo_entry * cur = context->fifo + context->fifo_write; | 1739 fifo_entry * cur = context->fifo + context->fifo_write; |
1739 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; | 1740 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
1740 cur->address = context->address; | 1741 cur->address = context->address; |
1741 cur->value = value; | 1742 cur->value = value; |
1742 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80) { | 1743 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80 && (context->regs[REG_MODE_2] & BIT_DMA_ENABLE)) { |
1743 context->flags |= FLAG_DMA_RUN; | 1744 context->flags |= FLAG_DMA_RUN; |
1744 } | 1745 } |
1745 cur->cd = context->cd; | 1746 cur->cd = context->cd; |
1746 cur->partial = 0; | 1747 cur->partial = 0; |
1747 if (context->fifo_read < 0) { | 1748 if (context->fifo_read < 0) { |