Mercurial > repos > blastem
comparison z80_to_x86.c @ 737:043393b79e28
Fixes for the 32-bit build accidentally introduced a bug into the 64-bit build, this commit fixes the regression
author | Michael Pavone <pavone@retrodev.com> |
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date | Tue, 26 May 2015 20:00:50 -0700 |
parents | 539d12fa6a4d |
children | 7306b3967c51 |
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736:535e97bad27f | 737:043393b79e28 |
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1458 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; | 1458 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
1459 cycles(&opts->gen, num_cycles); | 1459 cycles(&opts->gen, num_cycles); |
1460 uint8_t bit; | 1460 uint8_t bit; |
1461 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { | 1461 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
1462 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; | 1462 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
1463 src_op.mode = MODE_REG_DIRECT; | |
1463 size = SZ_W; | 1464 size = SZ_W; |
1464 bit = inst->immed + 8; | 1465 bit = inst->immed + 8; |
1465 } else { | 1466 } else { |
1466 size = SZ_B; | 1467 size = SZ_B; |
1467 bit = inst->immed; | 1468 bit = inst->immed; |
1495 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; | 1496 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
1496 cycles(&opts->gen, num_cycles); | 1497 cycles(&opts->gen, num_cycles); |
1497 uint8_t bit; | 1498 uint8_t bit; |
1498 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { | 1499 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
1499 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; | 1500 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
1501 src_op.mode = MODE_REG_DIRECT; | |
1500 size = SZ_W; | 1502 size = SZ_W; |
1501 bit = inst->immed + 8; | 1503 bit = inst->immed + 8; |
1502 } else { | 1504 } else { |
1503 size = SZ_B; | 1505 size = SZ_B; |
1504 bit = inst->immed; | 1506 bit = inst->immed; |
1561 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; | 1563 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
1562 cycles(&opts->gen, num_cycles); | 1564 cycles(&opts->gen, num_cycles); |
1563 uint8_t bit; | 1565 uint8_t bit; |
1564 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { | 1566 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
1565 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; | 1567 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
1568 src_op.mode = MODE_REG_DIRECT; | |
1566 size = SZ_W; | 1569 size = SZ_W; |
1567 bit = inst->immed + 8; | 1570 bit = inst->immed + 8; |
1568 } else { | 1571 } else { |
1569 size = SZ_B; | 1572 size = SZ_B; |
1570 bit = inst->immed; | 1573 bit = inst->immed; |