Mercurial > repos > blastem
annotate z80_to_x86.c @ 734:e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 25 May 2015 17:08:56 -0700 |
parents | 0835cd3dfc36 |
children | 539d12fa6a4d |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "z80inst.h" |
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7 #include "z80_to_x86.h" |
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8 #include "gen_x86.h" |
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9 #include "mem.h" |
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10 #include <stdio.h> |
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11 #include <stdlib.h> |
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12 #include <stddef.h> |
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13 #include <string.h> |
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14 |
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15 #define MODE_UNUSED (MODE_IMMED-1) |
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16 |
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17 //#define DO_DEBUG_PRINT |
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18 |
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19 #ifdef DO_DEBUG_PRINT |
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20 #define dprintf printf |
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21 #else |
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22 #define dprintf |
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23 #endif |
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24 |
652 | 25 uint32_t zbreakpoint_patch(z80_context * context, uint16_t address, code_ptr dst); |
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26 void z80_handle_deferred(z80_context * context); |
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27 |
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28 uint8_t z80_size(z80inst * inst) |
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29 { |
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30 uint8_t reg = (inst->reg & 0x1F); |
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31 if (reg != Z80_UNUSED && reg != Z80_USE_IMMED) { |
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32 return reg < Z80_BC ? SZ_B : SZ_W; |
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33 } |
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34 //TODO: Handle any necessary special cases |
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35 return SZ_B; |
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36 } |
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37 |
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38 uint8_t zf_off(uint8_t flag) |
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39 { |
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40 return offsetof(z80_context, flags) + flag; |
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41 } |
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42 |
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43 uint8_t zaf_off(uint8_t flag) |
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44 { |
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45 return offsetof(z80_context, alt_flags) + flag; |
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46 } |
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47 |
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48 uint8_t zr_off(uint8_t reg) |
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49 { |
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50 if (reg > Z80_A) { |
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51 reg = z80_low_reg(reg); |
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52 } |
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53 return offsetof(z80_context, regs) + reg; |
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54 } |
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55 |
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56 uint8_t zar_off(uint8_t reg) |
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57 { |
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58 if (reg > Z80_A) { |
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59 reg = z80_low_reg(reg); |
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60 } |
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61 return offsetof(z80_context, alt_regs) + reg; |
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62 } |
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63 |
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64 void zreg_to_native(z80_options *opts, uint8_t reg, uint8_t native_reg) |
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65 { |
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66 if (opts->regs[reg] >= 0) { |
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67 mov_rr(&opts->gen.code, opts->regs[reg], native_reg, reg > Z80_A ? SZ_W : SZ_B); |
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68 } else { |
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69 mov_rdispr(&opts->gen.code, opts->gen.context_reg, zr_off(reg), native_reg, reg > Z80_A ? SZ_W : SZ_B); |
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70 } |
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71 } |
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72 |
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73 void native_to_zreg(z80_options *opts, uint8_t native_reg, uint8_t reg) |
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74 { |
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75 if (opts->regs[reg] >= 0) { |
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76 mov_rr(&opts->gen.code, native_reg, opts->regs[reg], reg > Z80_A ? SZ_W : SZ_B); |
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77 } else { |
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78 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, zr_off(reg), reg > Z80_A ? SZ_W : SZ_B); |
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79 } |
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80 } |
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81 |
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82 void translate_z80_reg(z80inst * inst, host_ea * ea, z80_options * opts) |
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83 { |
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84 code_info *code = &opts->gen.code; |
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85 if (inst->reg == Z80_USE_IMMED) { |
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86 ea->mode = MODE_IMMED; |
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87 ea->disp = inst->immed; |
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88 } else if ((inst->reg & 0x1F) == Z80_UNUSED) { |
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89 ea->mode = MODE_UNUSED; |
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90 } else { |
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91 ea->mode = MODE_REG_DIRECT; |
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92 if (inst->reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
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93 if ((inst->addr_mode & 0x1F) == Z80_REG && inst->ea_reg == Z80_IYL) { |
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94 mov_rr(code, opts->regs[Z80_IY], opts->gen.scratch1, SZ_W); |
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95 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
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96 ea->base = opts->gen.scratch1; |
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97 } else { |
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98 ea->base = opts->regs[Z80_IYL]; |
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99 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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100 } |
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101 } else if(opts->regs[inst->reg] >= 0) { |
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102 ea->base = opts->regs[inst->reg]; |
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103 if (ea->base >= AH && ea->base <= BH) { |
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104 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
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105 uint8_t other_reg = opts->regs[inst->ea_reg]; |
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106 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
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107 //we can't mix an *H reg with a register that requires the REX prefix |
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108 ea->base = opts->regs[z80_low_reg(inst->reg)]; |
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109 ror_ir(code, 8, ea->base, SZ_W); |
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110 } |
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111 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { |
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112 //temp regs require REX prefix too |
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113 ea->base = opts->regs[z80_low_reg(inst->reg)]; |
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114 ror_ir(code, 8, ea->base, SZ_W); |
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115 } |
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116 } |
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117 } else { |
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118 ea->mode = MODE_REG_DISPLACE8; |
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119 ea->base = opts->gen.context_reg; |
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120 ea->disp = zr_off(inst->reg); |
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121 } |
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122 } |
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123 } |
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124 |
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125 void z80_save_reg(z80inst * inst, z80_options * opts) |
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126 { |
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127 code_info *code = &opts->gen.code; |
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128 if (inst->reg == Z80_USE_IMMED || inst->reg == Z80_UNUSED) { |
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129 return; |
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130 } |
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131 if (inst->reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
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132 if ((inst->addr_mode & 0x1F) == Z80_REG && inst->ea_reg == Z80_IYL) { |
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133 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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134 mov_rr(code, opts->gen.scratch1, opts->regs[Z80_IYL], SZ_B); |
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135 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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136 } else { |
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137 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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138 } |
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139 } else if (opts->regs[inst->reg] >= AH && opts->regs[inst->reg] <= BH) { |
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140 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
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141 uint8_t other_reg = opts->regs[inst->ea_reg]; |
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142 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
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143 //we can't mix an *H reg with a register that requires the REX prefix |
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144 ror_ir(code, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W); |
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145 } |
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146 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { |
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147 //temp regs require REX prefix too |
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148 ror_ir(code, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W); |
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149 } |
213
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150 } |
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151 } |
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152 |
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153 void translate_z80_ea(z80inst * inst, host_ea * ea, z80_options * opts, uint8_t read, uint8_t modify) |
213
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154 { |
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155 code_info *code = &opts->gen.code; |
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156 uint8_t size, areg; |
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157 int8_t reg; |
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158 ea->mode = MODE_REG_DIRECT; |
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159 areg = read ? opts->gen.scratch1 : opts->gen.scratch2; |
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160 switch(inst->addr_mode & 0x1F) |
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161 { |
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162 case Z80_REG: |
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163 if (inst->ea_reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
312
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164 if (inst->reg == Z80_IYL) { |
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165 mov_rr(code, opts->regs[Z80_IY], opts->gen.scratch1, SZ_W); |
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166 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
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167 ea->base = opts->gen.scratch1; |
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168 } else { |
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169 ea->base = opts->regs[Z80_IYL]; |
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170 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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171 } |
651
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Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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172 } else if(opts->regs[inst->ea_reg] >= 0) { |
213
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173 ea->base = opts->regs[inst->ea_reg]; |
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174 if (ea->base >= AH && ea->base <= BH && inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED) { |
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175 uint8_t other_reg = opts->regs[inst->reg]; |
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176 #ifdef X86_64 |
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177 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
267
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178 //we can't mix an *H reg with a register that requires the REX prefix |
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179 ea->base = opts->regs[z80_low_reg(inst->ea_reg)]; |
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180 ror_ir(code, 8, ea->base, SZ_W); |
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181 } |
666
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182 #endif |
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183 } |
651
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Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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184 } else { |
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|
185 ea->mode = MODE_REG_DISPLACE8; |
659
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|
186 ea->base = opts->gen.context_reg; |
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187 ea->disp = zr_off(inst->ea_reg); |
213
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188 } |
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189 break; |
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190 case Z80_REG_INDIRECT: |
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191 zreg_to_native(opts, inst->ea_reg, areg); |
213
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192 size = z80_size(inst); |
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193 if (read) { |
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194 if (modify) { |
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195 //push_r(code, opts->gen.scratch1); |
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196 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
213
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197 } |
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198 if (size == SZ_B) { |
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199 call(code, opts->read_8); |
213
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200 } else { |
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201 call(code, opts->read_16); |
213
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202 } |
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203 if (modify) { |
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204 //pop_r(code, opts->gen.scratch2); |
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205 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, scratch1), opts->gen.scratch2, SZ_W); |
213
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206 } |
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207 } |
590
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208 ea->base = opts->gen.scratch1; |
213
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209 break; |
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210 case Z80_IMMED: |
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211 ea->mode = MODE_IMMED; |
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212 ea->disp = inst->immed; |
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213 break; |
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214 case Z80_IMMED_INDIRECT: |
591
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215 mov_ir(code, inst->immed, areg, SZ_W); |
213
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216 size = z80_size(inst); |
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217 if (read) { |
277
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218 /*if (modify) { |
591
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219 push_r(code, opts->gen.scratch1); |
277
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220 }*/ |
213
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221 if (size == SZ_B) { |
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222 call(code, opts->read_8); |
213
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223 } else { |
593
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224 call(code, opts->read_16); |
213
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225 } |
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226 if (modify) { |
591
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227 //pop_r(code, opts->gen.scratch2); |
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228 mov_ir(code, inst->immed, opts->gen.scratch2, SZ_W); |
213
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229 } |
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230 } |
590
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231 ea->base = opts->gen.scratch1; |
213
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232 break; |
235
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213
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233 case Z80_IX_DISPLACE: |
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234 case Z80_IY_DISPLACE: |
731
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235 zreg_to_native(opts, (inst->addr_mode & 0x1F) == Z80_IX_DISPLACE ? Z80_IX : Z80_IY, areg); |
591
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236 add_ir(code, inst->ea_reg & 0x80 ? inst->ea_reg - 256 : inst->ea_reg, areg, SZ_W); |
213
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237 size = z80_size(inst); |
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238 if (read) { |
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239 if (modify) { |
591
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240 //push_r(code, opts->gen.scratch1); |
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241 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
213
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242 } |
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243 if (size == SZ_B) { |
593
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244 call(code, opts->read_8); |
213
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245 } else { |
593
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246 call(code, opts->read_16); |
213
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247 } |
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248 if (modify) { |
591
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249 //pop_r(code, opts->gen.scratch2); |
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250 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, scratch1), opts->gen.scratch2, SZ_W); |
213
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251 } |
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252 } |
590
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253 ea->base = opts->gen.scratch1; |
213
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254 break; |
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255 case Z80_UNUSED: |
235
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256 ea->mode = MODE_UNUSED; |
213
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257 break; |
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258 default: |
300
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299
diff
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|
259 fprintf(stderr, "Unrecognized Z80 addressing mode %d\n", inst->addr_mode & 0x1F); |
213
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260 exit(1); |
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261 } |
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262 } |
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263 |
591
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264 void z80_save_ea(code_info *code, z80inst * inst, z80_options * opts) |
213
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|
265 { |
267
1788e3f29c28
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266
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|
266 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
731
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267 if (inst->ea_reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
312
cf7ecda060c7
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311
diff
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|
268 if (inst->reg == Z80_IYL) { |
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269 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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270 mov_rr(code, opts->gen.scratch1, opts->regs[Z80_IYL], SZ_B); |
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271 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
312
cf7ecda060c7
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311
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|
272 } else { |
591
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|
273 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
312
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|
274 } |
267
1788e3f29c28
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275 } else if (inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
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276 uint8_t other_reg = opts->regs[inst->reg]; |
666
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In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
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|
277 #ifdef X86_64 |
269
3c054d977175
Fix IX/IY displace modes. Fix check for registers requiring REX.
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268
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|
278 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
267
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279 //we can't mix an *H reg with a register that requires the REX prefix |
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|
280 ror_ir(code, 8, opts->regs[z80_low_reg(inst->ea_reg)], SZ_W); |
267
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281 } |
666
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|
282 #endif |
267
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|
283 } |
213
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284 } |
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285 } |
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286 |
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287 void z80_save_result(z80_options *opts, z80inst * inst) |
213
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|
288 { |
253
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289 switch(inst->addr_mode & 0x1f) |
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290 { |
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291 case Z80_REG_INDIRECT: |
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292 case Z80_IMMED_INDIRECT: |
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293 case Z80_IX_DISPLACE: |
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294 case Z80_IY_DISPLACE: |
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295 if (z80_size(inst) == SZ_B) { |
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|
296 call(&opts->gen.code, opts->write_8); |
253
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297 } else { |
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298 call(&opts->gen.code, opts->write_16_lowfirst); |
253
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299 } |
213
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300 } |
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301 } |
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|
302 |
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303 enum { |
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304 DONT_READ=0, |
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305 READ |
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306 }; |
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307 |
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308 enum { |
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309 DONT_MODIFY=0, |
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310 MODIFY |
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311 }; |
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312 |
235
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313 void z80_print_regs_exit(z80_context * context) |
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314 { |
505
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315 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\nSP: %X\n\nIM: %d, IFF1: %d, IFF2: %d\n", |
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316 context->regs[Z80_A], context->regs[Z80_B], context->regs[Z80_C], |
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317 context->regs[Z80_D], context->regs[Z80_E], |
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318 (context->regs[Z80_H] << 8) | context->regs[Z80_L], |
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319 (context->regs[Z80_IXH] << 8) | context->regs[Z80_IXL], |
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320 (context->regs[Z80_IYH] << 8) | context->regs[Z80_IYL], |
243
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321 context->sp, context->im, context->iff1, context->iff2); |
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322 puts("--Alternate Regs--"); |
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323 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\n", |
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324 context->alt_regs[Z80_A], context->alt_regs[Z80_B], context->alt_regs[Z80_C], |
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325 context->alt_regs[Z80_D], context->alt_regs[Z80_E], |
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326 (context->alt_regs[Z80_H] << 8) | context->alt_regs[Z80_L], |
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327 (context->alt_regs[Z80_IXH] << 8) | context->alt_regs[Z80_IXL], |
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328 (context->alt_regs[Z80_IYH] << 8) | context->alt_regs[Z80_IYL]); |
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329 exit(0); |
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330 } |
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331 |
652 | 332 void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, uint8_t interp) |
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333 { |
591
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334 uint32_t num_cycles; |
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335 host_ea src_op, dst_op; |
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336 uint8_t size; |
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337 z80_options *opts = context->options; |
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338 uint8_t * start = opts->gen.code.cur; |
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339 code_info *code = &opts->gen.code; |
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340 if (!interp) { |
652 | 341 check_cycles_int(&opts->gen, address); |
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342 if (context->breakpoint_flags[address / sizeof(uint8_t)] & (1 << (address % sizeof(uint8_t)))) { |
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343 zbreakpoint_patch(context, address, start); |
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344 } |
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345 //log_address(&opts->gen, address, "Z80: %X @ %d\n"); |
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346 } |
213
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347 switch(inst->op) |
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348 { |
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349 case Z80_LD: |
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350 size = z80_size(inst); |
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351 switch (inst->addr_mode & 0x1F) |
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352 { |
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353 case Z80_REG: |
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354 case Z80_REG_INDIRECT: |
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355 num_cycles = size == SZ_B ? 4 : 6; |
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356 if (inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) { |
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357 num_cycles += 4; |
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358 } |
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359 if (inst->reg == Z80_I || inst->ea_reg == Z80_I) { |
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360 num_cycles += 5; |
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361 } |
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362 break; |
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363 case Z80_IMMED: |
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364 num_cycles = size == SZ_B ? 7 : 10; |
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365 break; |
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366 case Z80_IMMED_INDIRECT: |
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367 num_cycles = 10; |
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368 break; |
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369 case Z80_IX_DISPLACE: |
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370 case Z80_IY_DISPLACE: |
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371 num_cycles = 16; |
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372 break; |
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373 } |
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374 if ((inst->reg >= Z80_IXL && inst->reg <= Z80_IYH) || inst->reg == Z80_IX || inst->reg == Z80_IY) { |
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375 num_cycles += 4; |
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376 } |
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377 cycles(&opts->gen, num_cycles); |
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378 if (inst->addr_mode & Z80_DIR) { |
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379 translate_z80_ea(inst, &dst_op, opts, DONT_READ, MODIFY); |
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380 translate_z80_reg(inst, &src_op, opts); |
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381 } else { |
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382 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
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383 translate_z80_reg(inst, &dst_op, opts); |
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384 } |
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385 if (src_op.mode == MODE_REG_DIRECT) { |
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386 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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387 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, size); |
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388 } else { |
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389 mov_rr(code, src_op.base, dst_op.base, size); |
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390 } |
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391 } else if(src_op.mode == MODE_IMMED) { |
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392 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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393 mov_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, size); |
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394 } else { |
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395 mov_ir(code, src_op.disp, dst_op.base, size); |
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396 } |
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397 } else { |
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398 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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399 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, size); |
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400 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, size); |
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401 } else { |
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402 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, size); |
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403 } |
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404 } |
651
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Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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644
diff
changeset
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405 if (inst->ea_reg == Z80_I && inst->addr_mode == Z80_REG) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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644
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changeset
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406 //ld a, i sets some flags |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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407 //TODO: Implement half-carry flag |
652 | 408 cmp_ir(code, 0, dst_op.base, SZ_B); |
409 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); | |
410 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); | |
411 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B);; | |
659
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412 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, iff2), opts->gen.scratch1, SZ_B); |
652 | 413 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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414 } |
591
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415 z80_save_reg(inst, opts); |
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416 z80_save_ea(code, inst, opts); |
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417 if (inst->addr_mode & Z80_DIR) { |
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418 z80_save_result(opts, inst); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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419 } |
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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420 break; |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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421 case Z80_PUSH: |
591
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422 cycles(&opts->gen, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 9 : 5); |
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423 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
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424 if (inst->reg == Z80_AF) { |
729
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Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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425 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
591
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426 shl_ir(code, 8, opts->gen.scratch1, SZ_W); |
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427 mov_rdispr(code, opts->gen.context_reg, zf_off(ZF_S), opts->gen.scratch1, SZ_B); |
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428 shl_ir(code, 1, opts->gen.scratch1, SZ_B); |
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429 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_Z), opts->gen.scratch1, SZ_B); |
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430 shl_ir(code, 2, opts->gen.scratch1, SZ_B); |
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431 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_H), opts->gen.scratch1, SZ_B); |
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432 shl_ir(code, 2, opts->gen.scratch1, SZ_B); |
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433 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_PV), opts->gen.scratch1, SZ_B); |
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434 shl_ir(code, 1, opts->gen.scratch1, SZ_B); |
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435 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_N), opts->gen.scratch1, SZ_B); |
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436 shl_ir(code, 1, opts->gen.scratch1, SZ_B); |
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437 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_C), opts->gen.scratch1, SZ_B); |
235
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438 } else { |
731
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439 zreg_to_native(opts, inst->reg, opts->gen.scratch1); |
235
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440 } |
591
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441 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
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442 call(code, opts->write_16_highfirst); |
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443 //no call to save_z80_reg needed since there's no chance we'll use the only |
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444 //the upper half of a register pair |
213
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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445 break; |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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446 case Z80_POP: |
591
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447 cycles(&opts->gen, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 8 : 4); |
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448 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
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449 call(code, opts->read_16); |
591
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450 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
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451 if (inst->reg == Z80_AF) { |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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452 |
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453 bt_ir(code, 0, opts->gen.scratch1, SZ_W); |
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454 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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455 bt_ir(code, 1, opts->gen.scratch1, SZ_W); |
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456 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_N)); |
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457 bt_ir(code, 2, opts->gen.scratch1, SZ_W); |
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458 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_PV)); |
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459 bt_ir(code, 4, opts->gen.scratch1, SZ_W); |
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460 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
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461 bt_ir(code, 6, opts->gen.scratch1, SZ_W); |
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462 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_Z)); |
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463 bt_ir(code, 7, opts->gen.scratch1, SZ_W); |
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464 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_S)); |
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465 shr_ir(code, 8, opts->gen.scratch1, SZ_W); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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466 native_to_zreg(opts, opts->gen.scratch1, Z80_A); |
235
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467 } else { |
731
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468 native_to_zreg(opts, opts->gen.scratch1, inst->reg); |
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469 } |
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470 //no call to save_z80_reg needed since there's no chance we'll use the only |
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471 //the upper half of a register pair |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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472 break; |
241
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473 case Z80_EX: |
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474 if (inst->addr_mode == Z80_REG || inst->reg == Z80_HL) { |
591
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475 num_cycles = 4; |
241
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476 } else { |
591
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477 num_cycles = 8; |
241
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478 } |
591
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479 cycles(&opts->gen, num_cycles); |
241
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480 if (inst->addr_mode == Z80_REG) { |
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481 if(inst->reg == Z80_AF) { |
729
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482 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
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483 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_A), opts->gen.scratch2, SZ_B); |
591
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484 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_A), SZ_B); |
729
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485 native_to_zreg(opts, opts->gen.scratch2, Z80_A); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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486 |
241
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487 //Flags are currently word aligned, so we can move |
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488 //them efficiently a word at a time |
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489 for (int f = ZF_C; f < ZF_NUM; f+=2) { |
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490 mov_rdispr(code, opts->gen.context_reg, zf_off(f), opts->gen.scratch1, SZ_W); |
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491 mov_rdispr(code, opts->gen.context_reg, zaf_off(f), opts->gen.scratch2, SZ_W); |
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492 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zaf_off(f), SZ_W); |
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493 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(f), SZ_W); |
241
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494 } |
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495 } else { |
729
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496 if (opts->regs[Z80_DE] >= 0 && opts->regs[Z80_HL] >= 0) { |
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497 xchg_rr(code, opts->regs[Z80_DE], opts->regs[Z80_HL], SZ_W); |
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498 } else { |
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499 zreg_to_native(opts, Z80_DE, opts->gen.scratch1); |
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500 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
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changeset
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501 native_to_zreg(opts, opts->gen.scratch1, Z80_HL); |
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changeset
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502 native_to_zreg(opts, opts->gen.scratch2, Z80_DE); |
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Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
503 } |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
504 } |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
505 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
506 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
507 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
508 if (opts->regs[inst->reg] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
509 xchg_rr(code, opts->regs[inst->reg], opts->gen.scratch1, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
510 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
511 zreg_to_native(opts, inst->reg, opts->gen.scratch2); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
512 xchg_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
513 native_to_zreg(opts, opts->gen.scratch2, inst->reg); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
514 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
515 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
516 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
517 cycles(&opts->gen, 1); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
518 uint8_t high_reg = z80_high_reg(inst->reg); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
519 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
520 add_ir(code, 1, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
521 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
522 if (opts->regs[inst->reg] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
523 //even though some of the upper halves can be used directly |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
524 //the limitations on mixing *H regs with the REX prefix |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
525 //prevent us from taking advantage of it |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
526 uint8_t use_reg = opts->regs[inst->reg]; |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
527 ror_ir(code, 8, use_reg, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
528 xchg_rr(code, use_reg, opts->gen.scratch1, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
529 //restore reg to normal rotation |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
530 ror_ir(code, 8, use_reg, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
531 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
532 zreg_to_native(opts, high_reg, opts->gen.scratch2); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
533 xchg_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
534 native_to_zreg(opts, opts->gen.scratch2, high_reg); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
535 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
536 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
537 add_ir(code, 1, opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
538 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
539 cycles(&opts->gen, 2); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
540 } |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
541 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
542 case Z80_EXX: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
543 cycles(&opts->gen, 4); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
544 zreg_to_native(opts, Z80_BC, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
545 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_BC), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
546 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
547 native_to_zreg(opts, opts->gen.scratch2, Z80_BC); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
548 |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
549 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
550 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_HL), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
551 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
552 native_to_zreg(opts, opts->gen.scratch2, Z80_HL); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
553 |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
554 zreg_to_native(opts, Z80_DE, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
555 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_DE), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
556 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
557 native_to_zreg(opts, opts->gen.scratch2, Z80_DE); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
558 break; |
272 | 559 case Z80_LDI: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
560 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
561 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
562 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
563 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
564 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
565 cycles(&opts->gen, 2); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
566 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
567 add_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
568 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
569 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
570 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
571 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
572 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
573 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
574 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
575 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
576 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
577 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
578 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
579 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
580 } |
272 | 581 //TODO: Implement half-carry |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
582 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
583 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
272 | 584 break; |
585 } | |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
586 case Z80_LDIR: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
587 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
588 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
589 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
590 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
591 call(code, opts->write_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
592 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
593 add_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
594 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
595 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
596 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
597 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
598 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
599 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
600 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
601 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
602 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
603 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
604 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
605 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
606 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
607 uint8_t * cont = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
608 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
609 cycles(&opts->gen, 7); |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
610 //TODO: Figure out what the flag state should be here |
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
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259
diff
changeset
|
611 //TODO: Figure out whether an interrupt can interrupt this |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
612 jmp(code, start); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
613 *cont = code->cur - (cont + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
614 cycles(&opts->gen, 2); |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
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259
diff
changeset
|
615 //TODO: Implement half-carry |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
616 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
617 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
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259
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|
618 break; |
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Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
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|
619 } |
273 | 620 case Z80_LDD: { |
591
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
621 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
622 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
623 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
624 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
625 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
626 cycles(&opts->gen, 2); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
627 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
628 sub_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
629 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
630 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
631 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
632 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
633 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
634 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
635 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
636 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
637 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
638 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
639 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
640 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
641 } |
273 | 642 //TODO: Implement half-carry |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
643 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
644 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
273 | 645 break; |
646 } | |
647 case Z80_LDDR: { | |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
648 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
649 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
650 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
651 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
652 call(code, opts->write_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
653 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
654 sub_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
655 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
656 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
657 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
658 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
659 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
660 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
661 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
662 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
663 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
664 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
665 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
666 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
667 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
668 uint8_t * cont = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
669 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
670 cycles(&opts->gen, 7); |
273 | 671 //TODO: Figure out what the flag state should be here |
672 //TODO: Figure out whether an interrupt can interrupt this | |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
673 jmp(code, start); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
674 *cont = code->cur - (cont + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
675 cycles(&opts->gen, 2); |
273 | 676 //TODO: Implement half-carry |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
677 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
678 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
273 | 679 break; |
680 } | |
681 /*case Z80_CPI: | |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
682 case Z80_CPIR: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
683 case Z80_CPD: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
684 case Z80_CPDR: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
685 break;*/ |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
686 case Z80_ADD: |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
687 num_cycles = 4; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
688 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
689 num_cycles += 12; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
690 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
691 num_cycles += 3; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
692 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
693 num_cycles += 4; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
694 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
695 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
696 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
697 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
698 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
699 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
700 add_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
701 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
702 add_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
703 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
704 add_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
705 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
706 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
707 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
708 add_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
709 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
710 add_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
711 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
712 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
713 add_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
714 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
715 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
716 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
717 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
718 //TODO: Implement half-carry flag |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
719 if (z80_size(inst) == SZ_B) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
720 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
721 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
722 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
723 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
724 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
725 z80_save_ea(code, inst, opts); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
726 break; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
727 case Z80_ADC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
728 num_cycles = 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
729 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
730 num_cycles += 12; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
731 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
732 num_cycles += 3; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
733 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
734 num_cycles += 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
735 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
736 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
737 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
738 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
739 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
740 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
741 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
742 adc_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
743 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
744 adc_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
745 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
746 adc_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
747 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
748 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
749 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
750 adc_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
751 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
752 adc_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
753 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
754 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
755 adc_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
756 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
757 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
758 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
759 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
760 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
761 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
762 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
763 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
764 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
765 z80_save_ea(code, inst, opts); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
766 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
767 case Z80_SUB: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
768 num_cycles = 4; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
769 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
770 num_cycles += 12; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
771 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
772 num_cycles += 3; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
773 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
774 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
775 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
776 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
777 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
778 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
779 sub_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
780 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
781 sub_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
782 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
783 sub_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
784 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
785 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
786 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
787 sub_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
788 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
789 sub_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
790 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
791 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
792 sub_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
793 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
794 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
795 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
796 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
797 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
798 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
799 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
800 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
801 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
802 z80_save_ea(code, inst, opts); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
803 break; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
804 case Z80_SBC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
805 num_cycles = 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
806 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
807 num_cycles += 12; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
808 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
809 num_cycles += 3; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
810 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
811 num_cycles += 4; |
248
9c7a3db7bcd0
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812 } |
591
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diff
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|
813 cycles(&opts->gen, num_cycles); |
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diff
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|
814 translate_z80_reg(inst, &dst_op, opts); |
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Get Z80 core back into compileable state
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diff
changeset
|
815 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
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590
diff
changeset
|
816 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
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More bugfixes for the 32-bit build of the Z80 core
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parents:
729
diff
changeset
|
817 if (dst_op.mode == MODE_REG_DIRECT) { |
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729
diff
changeset
|
818 if (src_op.mode == MODE_REG_DIRECT) { |
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Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
819 sbb_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
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729
diff
changeset
|
820 } else if (src_op.mode == MODE_IMMED) { |
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729
diff
changeset
|
821 sbb_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
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More bugfixes for the 32-bit build of the Z80 core
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|
822 } else { |
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changeset
|
823 sbb_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
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|
824 } |
248
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247
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|
825 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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parents:
729
diff
changeset
|
826 if (src_op.mode == MODE_REG_DIRECT) { |
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diff
changeset
|
827 sbb_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
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changeset
|
828 } else if (src_op.mode == MODE_IMMED) { |
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changeset
|
829 sbb_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
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diff
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|
830 } else { |
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More bugfixes for the 32-bit build of the Z80 core
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changeset
|
831 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
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changeset
|
832 sbb_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
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|
833 } |
248
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|
834 } |
591
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590
diff
changeset
|
835 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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Get Z80 core back into compileable state
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diff
changeset
|
836 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
248
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|
837 //TODO: Implement half-carry flag |
591
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Get Z80 core back into compileable state
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diff
changeset
|
838 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
839 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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Get Z80 core back into compileable state
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diff
changeset
|
840 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
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Get Z80 core back into compileable state
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diff
changeset
|
841 z80_save_reg(inst, opts); |
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diff
changeset
|
842 z80_save_ea(code, inst, opts); |
248
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|
843 break; |
213
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
844 case Z80_AND: |
591
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diff
changeset
|
845 num_cycles = 4; |
236
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235
diff
changeset
|
846 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
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diff
changeset
|
847 num_cycles += 12; |
236
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diff
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|
848 } else if(inst->addr_mode == Z80_IMMED) { |
591
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diff
changeset
|
849 num_cycles += 3; |
236
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|
850 } else if(z80_size(inst) == SZ_W) { |
591
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diff
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|
851 num_cycles += 4; |
236
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|
852 } |
591
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diff
changeset
|
853 cycles(&opts->gen, num_cycles); |
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diff
changeset
|
854 translate_z80_reg(inst, &dst_op, opts); |
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Get Z80 core back into compileable state
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diff
changeset
|
855 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
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diff
changeset
|
856 if (src_op.mode == MODE_REG_DIRECT) { |
591
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diff
changeset
|
857 and_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
858 } else if (src_op.mode == MODE_IMMED) { |
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diff
changeset
|
859 and_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
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diff
changeset
|
860 } else { |
730
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Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
861 and_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
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diff
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|
862 } |
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diff
changeset
|
863 //TODO: Cleanup flags |
591
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diff
changeset
|
864 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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diff
changeset
|
865 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
236
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diff
changeset
|
866 //TODO: Implement half-carry flag |
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diff
changeset
|
867 if (z80_size(inst) == SZ_B) { |
591
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diff
changeset
|
868 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
869 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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Get Z80 core back into compileable state
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diff
changeset
|
870 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
236
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diff
changeset
|
871 } |
591
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diff
changeset
|
872 z80_save_reg(inst, opts); |
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diff
changeset
|
873 z80_save_ea(code, inst, opts); |
236
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235
diff
changeset
|
874 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
875 case Z80_OR: |
591
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diff
changeset
|
876 num_cycles = 4; |
236
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diff
changeset
|
877 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
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diff
changeset
|
878 num_cycles += 12; |
236
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235
diff
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|
879 } else if(inst->addr_mode == Z80_IMMED) { |
591
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Get Z80 core back into compileable state
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diff
changeset
|
880 num_cycles += 3; |
236
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diff
changeset
|
881 } else if(z80_size(inst) == SZ_W) { |
591
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Get Z80 core back into compileable state
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parents:
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diff
changeset
|
882 num_cycles += 4; |
236
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235
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|
883 } |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
884 cycles(&opts->gen, num_cycles); |
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Get Z80 core back into compileable state
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590
diff
changeset
|
885 translate_z80_reg(inst, &dst_op, opts); |
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Get Z80 core back into compileable state
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590
diff
changeset
|
886 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
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diff
changeset
|
887 if (src_op.mode == MODE_REG_DIRECT) { |
591
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diff
changeset
|
888 or_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
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More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
889 } else if (src_op.mode == MODE_IMMED) { |
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Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
890 or_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
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diff
changeset
|
891 } else { |
730
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diff
changeset
|
892 or_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
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235
diff
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|
893 } |
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235
diff
changeset
|
894 //TODO: Cleanup flags |
591
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diff
changeset
|
895 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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Get Z80 core back into compileable state
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diff
changeset
|
896 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
236
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diff
changeset
|
897 //TODO: Implement half-carry flag |
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diff
changeset
|
898 if (z80_size(inst) == SZ_B) { |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
899 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
900 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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diff
changeset
|
901 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
236
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diff
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|
902 } |
591
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590
diff
changeset
|
903 z80_save_reg(inst, opts); |
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diff
changeset
|
904 z80_save_ea(code, inst, opts); |
236
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235
diff
changeset
|
905 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
906 case Z80_XOR: |
591
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diff
changeset
|
907 num_cycles = 4; |
236
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|
908 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
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diff
changeset
|
909 num_cycles += 12; |
236
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235
diff
changeset
|
910 } else if(inst->addr_mode == Z80_IMMED) { |
591
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diff
changeset
|
911 num_cycles += 3; |
236
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235
diff
changeset
|
912 } else if(z80_size(inst) == SZ_W) { |
591
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diff
changeset
|
913 num_cycles += 4; |
236
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235
diff
changeset
|
914 } |
591
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Get Z80 core back into compileable state
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diff
changeset
|
915 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
916 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
917 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
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Mike Pavone <pavone@retrodev.com>
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235
diff
changeset
|
918 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
919 xor_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
920 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
921 xor_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
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235
diff
changeset
|
922 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
923 xor_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
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235
diff
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|
924 } |
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Implement more Z80 instructions (untested)
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235
diff
changeset
|
925 //TODO: Cleanup flags |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
926 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
927 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
236
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235
diff
changeset
|
928 //TODO: Implement half-carry flag |
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235
diff
changeset
|
929 if (z80_size(inst) == SZ_B) { |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
930 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
931 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
932 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
236
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Mike Pavone <pavone@retrodev.com>
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235
diff
changeset
|
933 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
934 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
935 z80_save_ea(code, inst, opts); |
236
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235
diff
changeset
|
936 break; |
242 | 937 case Z80_CP: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
938 num_cycles = 4; |
242 | 939 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
940 num_cycles += 12; |
242 | 941 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
942 num_cycles += 3; |
242 | 943 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
944 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
945 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
946 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
242 | 947 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
948 cmp_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
949 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
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Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
950 cmp_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
242 | 951 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
952 cmp_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
242 | 953 } |
591
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
954 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
955 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
956 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
242 | 957 //TODO: Implement half-carry flag |
591
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
958 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
959 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
960 z80_save_reg(inst, opts); |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
961 z80_save_ea(code, inst, opts); |
242 | 962 break; |
213
4d4559b04c59
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
963 case Z80_INC: |
591
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parents:
590
diff
changeset
|
964 num_cycles = 4; |
213
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
965 if (inst->reg == Z80_IX || inst->reg == Z80_IY) { |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
966 num_cycles += 6; |
213
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
967 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
968 num_cycles += 2; |
213
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
969 } else if(inst->reg == Z80_IXH || inst->reg == Z80_IXL || inst->reg == Z80_IYH || inst->reg == Z80_IYL || inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
970 num_cycles += 4; |
213
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
971 } |
591
966b46c68942
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parents:
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diff
changeset
|
972 cycles(&opts->gen, num_cycles); |
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Get Z80 core back into compileable state
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590
diff
changeset
|
973 translate_z80_reg(inst, &dst_op, opts); |
213
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
974 if (dst_op.mode == MODE_UNUSED) { |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
975 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
213
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
976 } |
730
38e9bee03749
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parents:
729
diff
changeset
|
977 if (dst_op.mode == MODE_REG_DIRECT) { |
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Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
978 add_ir(code, 1, dst_op.base, z80_size(inst)); |
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diff
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|
979 } else { |
38e9bee03749
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diff
changeset
|
980 add_irdisp(code, 1, dst_op.base, dst_op.disp, z80_size(inst)); |
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729
diff
changeset
|
981 } |
213
4d4559b04c59
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
982 if (z80_size(inst) == SZ_B) { |
591
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590
diff
changeset
|
983 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
984 //TODO: Implement half-carry flag |
591
966b46c68942
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parents:
590
diff
changeset
|
985 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
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|
986 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
987 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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parents:
diff
changeset
|
988 } |
591
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
989 z80_save_reg(inst, opts); |
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diff
changeset
|
990 z80_save_ea(code, inst, opts); |
593
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Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
991 z80_save_result(opts, inst); |
213
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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parents:
diff
changeset
|
992 break; |
236
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235
diff
changeset
|
993 case Z80_DEC: |
591
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Get Z80 core back into compileable state
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diff
changeset
|
994 num_cycles = 4; |
236
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235
diff
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|
995 if (inst->reg == Z80_IX || inst->reg == Z80_IY) { |
591
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diff
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|
996 num_cycles += 6; |
236
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diff
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|
997 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
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diff
changeset
|
998 num_cycles += 2; |
236
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235
diff
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|
999 } else if(inst->reg == Z80_IXH || inst->reg == Z80_IXL || inst->reg == Z80_IYH || inst->reg == Z80_IYL || inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
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diff
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|
1000 num_cycles += 4; |
236
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|
1001 } |
591
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diff
changeset
|
1002 cycles(&opts->gen, num_cycles); |
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Get Z80 core back into compileable state
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diff
changeset
|
1003 translate_z80_reg(inst, &dst_op, opts); |
236
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235
diff
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|
1004 if (dst_op.mode == MODE_UNUSED) { |
591
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diff
changeset
|
1005 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
236
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|
1006 } |
730
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diff
changeset
|
1007 if (dst_op.mode == MODE_REG_DIRECT) { |
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diff
changeset
|
1008 sub_ir(code, 1, dst_op.base, z80_size(inst)); |
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diff
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|
1009 } else { |
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changeset
|
1010 sub_irdisp(code, 1, dst_op.base, dst_op.disp, z80_size(inst)); |
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|
1011 } |
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|
1012 |
236
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|
1013 if (z80_size(inst) == SZ_B) { |
591
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changeset
|
1014 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
236
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|
1015 //TODO: Implement half-carry flag |
591
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|
1016 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
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diff
changeset
|
1017 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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|
1018 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
236
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|
1019 } |
591
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diff
changeset
|
1020 z80_save_reg(inst, opts); |
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diff
changeset
|
1021 z80_save_ea(code, inst, opts); |
593
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592
diff
changeset
|
1022 z80_save_result(opts, inst); |
213
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changeset
|
1023 break; |
274
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273
diff
changeset
|
1024 //case Z80_DAA: |
213
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changeset
|
1025 case Z80_CPL: |
591
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diff
changeset
|
1026 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1027 not_r(code, opts->regs[Z80_A], SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1028 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1029 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1030 break; |
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1031 case Z80_NEG: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1032 cycles(&opts->gen, 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1033 neg_r(code, opts->regs[Z80_A], SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1034 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1035 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1036 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1037 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1038 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1039 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1040 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1041 case Z80_CCF: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1042 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1043 xor_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1044 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
257 | 1045 //TODO: Implement half-carry flag |
1046 break; | |
1047 case Z80_SCF: | |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1048 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1049 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1050 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
257 | 1051 //TODO: Implement half-carry flag |
1052 break; | |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1053 case Z80_NOP: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1054 if (inst->immed == 42) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1055 call(code, opts->gen.save_context); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1056 call_args(code, (code_ptr)z80_print_regs_exit, 1, opts->gen.context_reg); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1057 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1058 cycles(&opts->gen, 4 * inst->immed); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1059 } |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1060 break; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1061 case Z80_HALT: { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1062 code_ptr loop_top = code->cur; |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1063 //this isn't terribly efficient, but it's good enough for now |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1064 cycles(&opts->gen, 4); |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1065 check_cycles_int(&opts->gen, address); |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1066 jmp(code, loop_top); |
285
021aeb6df19b
Implement HALT (sort of tested)
Mike Pavone <pavone@retrodev.com>
parents:
284
diff
changeset
|
1067 break; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1068 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1069 case Z80_DI: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1070 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1071 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1072 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1073 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, sync_cycle), opts->gen.limit, SZ_D); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1074 mov_irdisp(code, 0xFFFFFFFF, opts->gen.context_reg, offsetof(z80_context, int_cycle), SZ_D); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1075 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1076 case Z80_EI: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1077 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1078 mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(z80_context, int_enable_cycle), SZ_D); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1079 mov_irdisp(code, 1, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1080 mov_irdisp(code, 1, opts->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
335 | 1081 //interrupt enable has a one-instruction latency, minimum instruction duration is 4 cycles |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1082 add_irdisp(code, 4*opts->gen.clock_divider, opts->gen.context_reg, offsetof(z80_context, int_enable_cycle), SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1083 call(code, opts->do_sync); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1084 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1085 case Z80_IM: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1086 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1087 mov_irdisp(code, inst->immed, opts->gen.context_reg, offsetof(z80_context, im), SZ_B); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1088 break; |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1089 case Z80_RLC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1090 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1091 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1092 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1093 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1094 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1095 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1096 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1097 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1098 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1099 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1100 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1101 rol_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1102 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1103 rol_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1104 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1105 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1106 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1107 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1108 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1109 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1110 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1111 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1112 //TODO: Implement half-carry flag |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1113 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1114 //rlca does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1115 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1116 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1117 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1118 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1119 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1120 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1121 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1122 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1123 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1124 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1125 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1126 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1127 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1128 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1129 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1130 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1131 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1132 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1133 case Z80_RL: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1134 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1135 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1136 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1137 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1138 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1139 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1140 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1141 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1142 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1143 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1144 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1145 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1146 rcl_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1147 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1148 rcl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1149 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1150 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1151 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1152 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1153 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1154 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1155 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1156 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1157 //TODO: Implement half-carry flag |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1158 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1159 //rla does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1160 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1161 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1162 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1163 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1164 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1165 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1166 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1167 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1168 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1169 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1170 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1171 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1172 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1173 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1174 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1175 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1176 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1177 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1178 case Z80_RRC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1179 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1180 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1181 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1182 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1183 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1184 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1185 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1186 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1187 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1188 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1189 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1190 ror_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1191 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1192 ror_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1193 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1194 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1195 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1196 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1197 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1198 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1199 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1200 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1201 //TODO: Implement half-carry flag |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1202 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1203 //rrca does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1204 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1205 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1206 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1207 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1208 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1209 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1210 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1211 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1212 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1213 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1214 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1215 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1216 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1217 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1218 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1219 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1220 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1221 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1222 case Z80_RR: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1223 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1224 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1225 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1226 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1227 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1228 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1229 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1230 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1231 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1232 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1233 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1234 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1235 rcr_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1236 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1237 rcr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1238 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1239 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1240 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1241 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1242 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1243 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1244 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1245 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1246 //TODO: Implement half-carry flag |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1247 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1248 //rra does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1249 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1250 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1251 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1252 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1253 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1254 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1255 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1256 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1257 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1258 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1259 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1260 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1261 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1262 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1263 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1264 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1265 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1266 break; |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1267 case Z80_SLA: |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1268 case Z80_SLL: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1269 num_cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1270 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1271 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1272 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1273 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1274 cycles(&opts->gen, 1); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1275 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1276 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1277 translate_z80_reg(inst, &dst_op, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1278 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1279 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1280 shl_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1281 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1282 shl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1283 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1284 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1285 if (inst->op == Z80_SLL) { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1286 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1287 or_ir(code, 1, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1288 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1289 or_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1290 } |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1291 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1292 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1293 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1294 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1295 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1296 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1297 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1298 //TODO: Implement half-carry flag |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1299 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1300 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1301 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1302 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1303 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1304 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1305 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1306 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1307 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1308 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1309 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1310 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1311 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1312 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1313 z80_save_reg(inst, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1314 } |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1315 break; |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1316 case Z80_SRA: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1317 num_cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1318 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1319 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1320 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1321 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
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Get Z80 core back into compileable state
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diff
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|
1322 cycles(&opts->gen, 1); |
275
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Mike Pavone <pavone@retrodev.com>
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274
diff
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|
1323 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
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301
diff
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|
1324 src_op.mode = MODE_UNUSED; |
591
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Get Z80 core back into compileable state
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diff
changeset
|
1325 translate_z80_reg(inst, &dst_op, opts); |
275
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Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
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274
diff
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|
1326 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1327 if (dst_op.mode == MODE_REG_DIRECT) { |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1328 sar_ir(code, 1, dst_op.base, SZ_B); |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1329 } else { |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1330 sar_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
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More bugfixes for the 32-bit build of the Z80 core
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diff
changeset
|
1331 } |
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More bugfixes for the 32-bit build of the Z80 core
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diff
changeset
|
1332 if (src_op.mode == MODE_REG_DIRECT) { |
591
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diff
changeset
|
1333 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
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More bugfixes for the 32-bit build of the Z80 core
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diff
changeset
|
1334 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
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729
diff
changeset
|
1335 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
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diff
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|
1336 } |
591
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diff
changeset
|
1337 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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Get Z80 core back into compileable state
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diff
changeset
|
1338 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
275
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Implement shift instructions (untested)
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274
diff
changeset
|
1339 //TODO: Implement half-carry flag |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1340 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1341 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1342 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1343 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1344 } |
591
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diff
changeset
|
1345 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
1346 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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diff
changeset
|
1347 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
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295
diff
changeset
|
1348 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
1349 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1350 if (src_op.mode != MODE_UNUSED) { |
591
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diff
changeset
|
1351 z80_save_reg(inst, opts); |
299
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Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1352 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
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274
diff
changeset
|
1353 } else { |
591
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diff
changeset
|
1354 z80_save_reg(inst, opts); |
275
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274
diff
changeset
|
1355 } |
1a7d0a964ad2
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274
diff
changeset
|
1356 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1357 case Z80_SRL: |
591
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Get Z80 core back into compileable state
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diff
changeset
|
1358 num_cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
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diff
changeset
|
1359 cycles(&opts->gen, num_cycles); |
299
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Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1360 if (inst->addr_mode != Z80_UNUSED) { |
591
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parents:
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diff
changeset
|
1361 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
1362 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
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parents:
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diff
changeset
|
1363 cycles(&opts->gen, 1); |
275
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Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1364 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1365 src_op.mode = MODE_UNUSED; |
591
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Get Z80 core back into compileable state
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diff
changeset
|
1366 translate_z80_reg(inst, &dst_op, opts); |
275
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274
diff
changeset
|
1367 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1368 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1369 shr_ir(code, 1, dst_op.base, SZ_B); |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1370 } else { |
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More bugfixes for the 32-bit build of the Z80 core
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diff
changeset
|
1371 shr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
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More bugfixes for the 32-bit build of the Z80 core
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parents:
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diff
changeset
|
1372 } |
38e9bee03749
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diff
changeset
|
1373 if (src_op.mode == MODE_REG_DIRECT) { |
591
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diff
changeset
|
1374 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
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More bugfixes for the 32-bit build of the Z80 core
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parents:
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diff
changeset
|
1375 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1376 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1377 } |
591
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diff
changeset
|
1378 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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Get Z80 core back into compileable state
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diff
changeset
|
1379 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1380 //TODO: Implement half-carry flag |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1381 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1382 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1383 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1384 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1385 } |
591
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diff
changeset
|
1386 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
1387 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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Get Z80 core back into compileable state
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diff
changeset
|
1388 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
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Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1389 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
1390 z80_save_result(opts, inst); |
299
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Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1391 if (src_op.mode != MODE_UNUSED) { |
591
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diff
changeset
|
1392 z80_save_reg(inst, opts); |
299
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Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1393 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1394 } else { |
591
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Get Z80 core back into compileable state
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diff
changeset
|
1395 z80_save_reg(inst, opts); |
275
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parents:
274
diff
changeset
|
1396 } |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1397 break; |
286 | 1398 case Z80_RLD: |
591
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590
diff
changeset
|
1399 cycles(&opts->gen, 8); |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1400 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
1401 call(code, opts->read_8); |
286 | 1402 //Before: (HL) = 0x12, A = 0x34 |
1403 //After: (HL) = 0x24, A = 0x31 | |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1404 zreg_to_native(opts, Z80_A, opts->gen.scratch2); |
591
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diff
changeset
|
1405 shl_ir(code, 4, opts->gen.scratch1, SZ_W); |
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590
diff
changeset
|
1406 and_ir(code, 0xF, opts->gen.scratch2, SZ_W); |
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Get Z80 core back into compileable state
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diff
changeset
|
1407 and_ir(code, 0xFFF, opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1408 and_ir(code, 0xF0, opts->regs[Z80_A], SZ_B); |
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1409 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1410 //opts->gen.scratch1 = 0x0124 |
591
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diff
changeset
|
1411 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
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diff
changeset
|
1412 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
1413 or_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
287
fb840e0a48cd
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parents:
286
diff
changeset
|
1414 //set flags |
fb840e0a48cd
Implement RRD and implement flags on RLD
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diff
changeset
|
1415 //TODO: Implement half-carry flag |
591
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parents:
590
diff
changeset
|
1416 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
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Get Z80 core back into compileable state
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diff
changeset
|
1417 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
1418 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
1419 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
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467
diff
changeset
|
1420 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1421 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
591
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diff
changeset
|
1422 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
593
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Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1423 call(code, opts->write_8); |
286 | 1424 break; |
287
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Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
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286
diff
changeset
|
1425 case Z80_RRD: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1426 cycles(&opts->gen, 8); |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1427 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1428 call(code, opts->read_8); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1429 //Before: (HL) = 0x12, A = 0x34 |
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1430 //After: (HL) = 0x41, A = 0x32 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1431 zreg_to_native(opts, Z80_A, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1432 ror_ir(code, 4, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1433 shl_ir(code, 4, opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1434 and_ir(code, 0xF00F, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1435 and_ir(code, 0xF0, opts->regs[Z80_A], SZ_B); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1436 //opts->gen.scratch1 = 0x2001 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1437 //opts->gen.scratch2 = 0x0040 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1438 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1439 //opts->gen.scratch1 = 0x2041 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1440 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1441 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1442 shr_ir(code, 4, opts->gen.scratch1, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1443 or_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1444 //set flags |
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1445 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1446 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1447 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1448 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1449 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1450 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1451 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1452 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1453 call(code, opts->write_8); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1454 break; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1455 case Z80_BIT: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1456 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1457 cycles(&opts->gen, num_cycles); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1458 uint8_t bit; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1459 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1460 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1461 size = SZ_W; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1462 bit = inst->immed + 8; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1463 } else { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1464 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1465 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1466 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
308
e0e81551fd7e
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Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1467 } |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1468 if (inst->addr_mode != Z80_REG) { |
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1469 //Reads normally take 3 cycles, but the read at the end of a bit instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1470 cycles(&opts->gen, 1); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1471 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1472 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1473 bt_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1474 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1475 bt_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1476 } |
591
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1477 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1478 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1479 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1480 if (inst->immed == 7) { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1481 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1482 cmp_ir(code, 0, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1483 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1484 cmp_irdisp(code, 0, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1485 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1486 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1487 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1488 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1489 } |
239
a5bea9711a46
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Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1490 break; |
308
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Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1491 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1492 case Z80_SET: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1493 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1494 cycles(&opts->gen, num_cycles); |
308
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Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1495 uint8_t bit; |
e0e81551fd7e
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Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1496 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
307
diff
changeset
|
1497 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
307
diff
changeset
|
1498 size = SZ_W; |
e0e81551fd7e
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Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1499 bit = inst->immed + 8; |
e0e81551fd7e
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Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1500 } else { |
e0e81551fd7e
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parents:
307
diff
changeset
|
1501 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1502 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1503 translate_z80_ea(inst, &src_op, opts, READ, MODIFY); |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1504 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1505 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1506 translate_z80_reg(inst, &dst_op, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1507 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1508 if (inst->addr_mode != Z80_REG) { |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1509 //Reads normally take 3 cycles, but the read in the middle of a set instruction takes 4 |
591
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1510 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1511 } |
731
0835cd3dfc36
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Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1512 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1513 bts_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1514 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1515 bts_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1516 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1517 if (inst->reg != Z80_USE_IMMED) { |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1518 if (size == SZ_W) { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1519 #ifdef X86_64 |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1520 if (dst_op.base >= R8) { |
591
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1521 ror_ir(code, 8, src_op.base, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1522 mov_rr(code, opts->regs[z80_low_reg(inst->ea_reg)], dst_op.base, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1523 ror_ir(code, 8, src_op.base, SZ_W); |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1524 } else { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1525 #endif |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1526 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1527 zreg_to_native(opts, inst->ea_reg, dst_op.base); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1528 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1529 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1530 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1531 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1532 #ifdef X86_64 |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1533 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1534 #endif |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1535 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1536 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1537 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1538 mov_rr(code, src_op.base, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1539 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1540 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1541 } |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1542 } else if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1543 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1544 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1545 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1546 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1547 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1548 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1549 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1550 if ((inst->addr_mode & 0x1F) != Z80_REG) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1551 z80_save_result(opts, inst); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1552 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1553 z80_save_reg(inst, opts); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1554 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1555 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1556 break; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1557 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1558 case Z80_RES: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1559 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1560 cycles(&opts->gen, num_cycles); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1561 uint8_t bit; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1562 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1563 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1564 size = SZ_W; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1565 bit = inst->immed + 8; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1566 } else { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1567 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1568 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1569 translate_z80_ea(inst, &src_op, opts, READ, MODIFY); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1570 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1571 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1572 translate_z80_reg(inst, &dst_op, opts); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1573 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1574 if (inst->addr_mode != Z80_REG) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1575 //Reads normally take 3 cycles, but the read in the middle of a set instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1576 cycles(&opts->gen, 1); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1577 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1578 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1579 btr_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1580 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1581 btr_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1582 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1583 if (inst->reg != Z80_USE_IMMED) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1584 if (size == SZ_W) { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1585 #ifdef X86_64 |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1586 if (dst_op.base >= R8) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1587 ror_ir(code, 8, src_op.base, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1588 mov_rr(code, opts->regs[z80_low_reg(inst->ea_reg)], dst_op.base, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1589 ror_ir(code, 8, src_op.base, SZ_W); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1590 } else { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1591 #endif |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1592 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1593 zreg_to_native(opts, inst->ea_reg, dst_op.base); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1594 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1595 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1596 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1597 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1598 #ifdef X86_64 |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1599 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1600 #endif |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1601 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1602 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1603 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1604 mov_rr(code, src_op.base, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1605 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1606 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1607 } |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1608 } else if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1609 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1610 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1611 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1612 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1613 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1614 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1615 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1616 if (inst->addr_mode != Z80_REG) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1617 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1618 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1619 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1620 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1621 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1622 break; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1623 } |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1624 case Z80_JP: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1625 num_cycles = 4; |
506
a3b48a57e847
Fix timing of certain ld and jp instructions in the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
505
diff
changeset
|
1626 if (inst->addr_mode != Z80_REG_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1627 num_cycles += 6; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1628 } else if(inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1629 num_cycles += 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1630 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1631 cycles(&opts->gen, num_cycles); |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1632 if (inst->addr_mode != Z80_REG_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1633 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1634 if (!call_dst) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1635 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1636 //fake address to force large displacement |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
1637 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1638 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1639 jmp(code, call_dst); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1640 } else { |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1641 if (inst->addr_mode == Z80_REG_INDIRECT) { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
1642 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1643 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1644 mov_ir(code, inst->immed, opts->gen.scratch1, SZ_W); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1645 } |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1646 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1647 jmp_r(code, opts->gen.scratch1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1648 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1649 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1650 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1651 case Z80_JPCC: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1652 cycles(&opts->gen, 7);//T States: 4,3 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1653 uint8_t cond = CC_Z; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1654 switch (inst->reg) |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1655 { |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1656 case Z80_CC_NZ: |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1657 cond = CC_NZ; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1658 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1659 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1660 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1661 case Z80_CC_NC: |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1662 cond = CC_NZ; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1663 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1664 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1665 break; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1666 case Z80_CC_PO: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1667 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1668 case Z80_CC_PE: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1669 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1670 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1671 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
366
diff
changeset
|
1672 cond = CC_NZ; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1673 case Z80_CC_M: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1674 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1675 break; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1676 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1677 uint8_t *no_jump_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1678 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1679 cycles(&opts->gen, 5);//T States: 5 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1680 uint16_t dest_addr = inst->immed; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1681 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1682 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1683 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1684 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1685 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1686 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1687 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1688 *no_jump_off = code->cur - (no_jump_off+1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1689 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1690 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1691 case Z80_JR: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1692 cycles(&opts->gen, 12);//T States: 4,3,5 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1693 uint16_t dest_addr = address + inst->immed + 2; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1694 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1695 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1696 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1697 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1698 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1699 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1700 jmp(code, call_dst); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1701 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1702 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1703 case Z80_JRCC: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1704 cycles(&opts->gen, 7);//T States: 4,3 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1705 uint8_t cond = CC_Z; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1706 switch (inst->reg) |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1707 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1708 case Z80_CC_NZ: |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1709 cond = CC_NZ; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1710 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1711 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1712 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1713 case Z80_CC_NC: |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1714 cond = CC_NZ; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1715 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1716 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1717 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1718 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1719 uint8_t *no_jump_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1720 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1721 cycles(&opts->gen, 5);//T States: 5 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1722 uint16_t dest_addr = address + inst->immed + 2; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1723 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1724 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1725 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1726 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1727 call_dst = code->cur + 256; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1728 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1729 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1730 *no_jump_off = code->cur - (no_jump_off+1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1731 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1732 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1733 case Z80_DJNZ: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1734 cycles(&opts->gen, 8);//T States: 5,3 |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1735 if (opts->regs[Z80_B] >= 0) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1736 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1737 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1738 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1739 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1740 uint8_t *no_jump_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1741 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1742 cycles(&opts->gen, 5);//T States: 5 |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1743 uint16_t dest_addr = address + inst->immed + 2; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1744 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1745 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1746 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1747 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1748 call_dst = code->cur + 256; |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1749 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1750 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1751 *no_jump_off = code->cur - (no_jump_off+1); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1752 break; |
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1753 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1754 case Z80_CALL: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1755 cycles(&opts->gen, 11);//T States: 4,3,4 |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1756 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1757 mov_ir(code, address + 3, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1758 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1759 call(code, opts->write_16_highfirst);//T States: 3, 3 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1760 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1761 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1762 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1763 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1764 call_dst = code->cur + 256; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1765 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1766 jmp(code, call_dst); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1767 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1768 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1769 case Z80_CALLCC: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1770 cycles(&opts->gen, 10);//T States: 4,3,3 (false case) |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1771 uint8_t cond = CC_Z; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1772 switch (inst->reg) |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1773 { |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1774 case Z80_CC_NZ: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1775 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1776 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1777 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1778 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1779 case Z80_CC_NC: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1780 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1781 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1782 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1783 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1784 case Z80_CC_PO: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1785 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1786 case Z80_CC_PE: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1787 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1788 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1789 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
366
diff
changeset
|
1790 cond = CC_NZ; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1791 case Z80_CC_M: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1792 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1793 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1794 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1795 uint8_t *no_call_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1796 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1797 cycles(&opts->gen, 1);//Last of the above T states takes an extra cycle in the true case |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1798 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1799 mov_ir(code, address + 3, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1800 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1801 call(code, opts->write_16_highfirst);//T States: 3, 3 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1802 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1803 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1804 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1805 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1806 call_dst = code->cur + 256; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1807 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1808 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1809 *no_call_off = code->cur - (no_call_off+1); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1810 break; |
682 | 1811 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1812 case Z80_RET: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1813 cycles(&opts->gen, 4);//T States: 4 |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1814 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1815 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1816 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1817 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1818 jmp_r(code, opts->gen.scratch1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1819 break; |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1820 case Z80_RETCC: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1821 cycles(&opts->gen, 5);//T States: 5 |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1822 uint8_t cond = CC_Z; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1823 switch (inst->reg) |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1824 { |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1825 case Z80_CC_NZ: |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1826 cond = CC_NZ; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1827 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1828 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1829 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1830 case Z80_CC_NC: |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1831 cond = CC_NZ; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1832 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1833 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1834 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1835 case Z80_CC_PO: |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1836 cond = CC_NZ; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1837 case Z80_CC_PE: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1838 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1839 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1840 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
366
diff
changeset
|
1841 cond = CC_NZ; |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
1842 case Z80_CC_M: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1843 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
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243
diff
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|
1844 break; |
ed548c77b598
Implement RETCC in Z80 core.
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243
diff
changeset
|
1845 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
1846 uint8_t *no_call_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1847 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1848 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1849 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1850 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1851 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1852 jmp_r(code, opts->gen.scratch1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1853 *no_call_off = code->cur - (no_call_off+1); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
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243
diff
changeset
|
1854 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
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243
diff
changeset
|
1855 } |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
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282
diff
changeset
|
1856 case Z80_RETI: |
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
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282
diff
changeset
|
1857 //For some systems, this may need a callback for signalling interrupt routine completion |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1858 cycles(&opts->gen, 8);//T States: 4, 4 |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1859 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1860 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1861 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1862 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1863 jmp_r(code, opts->gen.scratch1); |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
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282
diff
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|
1864 break; |
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
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282
diff
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|
1865 case Z80_RETN: |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1866 cycles(&opts->gen, 8);//T States: 4, 4 |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
1867 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, iff2), opts->gen.scratch2, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1868 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1869 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1870 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1871 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1872 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
1873 jmp_r(code, opts->gen.scratch1); |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
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282
diff
changeset
|
1874 break; |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
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239
diff
changeset
|
1875 case Z80_RST: { |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
1876 //RST is basically CALL to an address in page 0 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
1877 cycles(&opts->gen, 5);//T States: 5 |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1878 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1879 mov_ir(code, address + 1, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1880 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1881 call(code, opts->write_16_highfirst);//T States: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1882 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
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239
diff
changeset
|
1883 if (!call_dst) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1884 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
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239
diff
changeset
|
1885 //fake address to force large displacement |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
1886 call_dst = code->cur + 256; |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
1887 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1888 jmp(code, call_dst); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
1889 break; |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
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239
diff
changeset
|
1890 } |
284
ed7098f717d7
Implement IN and OUT (untested)
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283
diff
changeset
|
1891 case Z80_IN: |
591
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590
diff
changeset
|
1892 cycles(&opts->gen, inst->reg == Z80_A ? 7 : 8);//T States: 4 3/4 |
284
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283
diff
changeset
|
1893 if (inst->addr_mode == Z80_IMMED_INDIRECT) { |
591
966b46c68942
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parents:
590
diff
changeset
|
1894 mov_ir(code, inst->immed, opts->gen.scratch1, SZ_B); |
284
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283
diff
changeset
|
1895 } else { |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1896 mov_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
284
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283
diff
changeset
|
1897 } |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
1898 call(code, opts->read_io); |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1899 translate_z80_reg(inst, &dst_op, opts); |
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Get Z80 core back into compileable state
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590
diff
changeset
|
1900 mov_rr(code, opts->gen.scratch1, dst_op.base, SZ_B); |
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Get Z80 core back into compileable state
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diff
changeset
|
1901 z80_save_reg(inst, opts); |
284
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283
diff
changeset
|
1902 break; |
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parents:
283
diff
changeset
|
1903 /*case Z80_INI: |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1904 case Z80_INIR: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1905 case Z80_IND: |
284
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283
diff
changeset
|
1906 case Z80_INDR:*/ |
213
4d4559b04c59
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1907 case Z80_OUT: |
591
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
1908 cycles(&opts->gen, inst->reg == Z80_A ? 7 : 8);//T States: 4 3/4 |
284
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283
diff
changeset
|
1909 if ((inst->addr_mode & 0x1F) == Z80_IMMED_INDIRECT) { |
591
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diff
changeset
|
1910 mov_ir(code, inst->immed, opts->gen.scratch2, SZ_B); |
284
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283
diff
changeset
|
1911 } else { |
591
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Get Z80 core back into compileable state
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diff
changeset
|
1912 mov_rr(code, opts->regs[Z80_C], opts->gen.scratch2, SZ_B); |
284
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|
1913 } |
591
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diff
changeset
|
1914 translate_z80_reg(inst, &src_op, opts); |
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diff
changeset
|
1915 mov_rr(code, dst_op.base, opts->gen.scratch1, SZ_B); |
593
5ef3fe516da9
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592
diff
changeset
|
1916 call(code, opts->write_io); |
591
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diff
changeset
|
1917 z80_save_reg(inst, opts); |
284
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|
1918 break; |
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|
1919 /*case Z80_OUTI: |
213
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diff
changeset
|
1920 case Z80_OTIR: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1921 case Z80_OUTD: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1922 case Z80_OTDR:*/ |
235
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213
diff
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|
1923 default: { |
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213
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changeset
|
1924 char disbuf[80]; |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
1925 z80_disasm(inst, disbuf, address); |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
420
diff
changeset
|
1926 fprintf(stderr, "unimplemented instruction: %s at %X\n", disbuf, address); |
259
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
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257
diff
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|
1927 FILE * f = fopen("zram.bin", "wb"); |
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
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|
1928 fwrite(context->mem_pointers[0], 1, 8 * 1024, f); |
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changeset
|
1929 fclose(f); |
213
4d4559b04c59
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diff
changeset
|
1930 exit(1); |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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parents:
diff
changeset
|
1931 } |
235
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213
diff
changeset
|
1932 } |
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213
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changeset
|
1933 } |
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|
1934 |
627
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626
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changeset
|
1935 uint8_t * z80_interp_handler(uint8_t opcode, z80_context * context) |
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diff
changeset
|
1936 { |
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diff
changeset
|
1937 if (!context->interp_code[opcode]) { |
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626
diff
changeset
|
1938 if (opcode == 0xCB || (opcode >= 0xDD && opcode & 0xF == 0xD)) { |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
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626
diff
changeset
|
1939 fprintf(stderr, "Encountered prefix byte %X at address %X. Z80 interpeter doesn't support those yet.", opcode, context->pc); |
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626
diff
changeset
|
1940 exit(1); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
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626
diff
changeset
|
1941 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
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626
diff
changeset
|
1942 uint8_t codebuf[8]; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
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parents:
626
diff
changeset
|
1943 memset(codebuf, 0, sizeof(codebuf)); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
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626
diff
changeset
|
1944 codebuf[0] = opcode; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
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626
diff
changeset
|
1945 z80inst inst; |
c5820734a5b6
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626
diff
changeset
|
1946 uint8_t * after = z80_decode(codebuf, &inst); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
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626
diff
changeset
|
1947 if (after - codebuf > 1) { |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
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parents:
626
diff
changeset
|
1948 fprintf(stderr, "Encountered multi-byte Z80 instruction at %X. Z80 interpeter doesn't support those yet.", context->pc); |
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Added some preliminary support for interpreting Z80 code from non-RAM addresses
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626
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changeset
|
1949 exit(1); |
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1950 } |
652 | 1951 |
1952 z80_options * opts = context->options; | |
1953 code_info *code = &opts->gen.code; | |
1954 check_alloc_code(code, ZMAX_NATIVE_SIZE); | |
1955 context->interp_code[opcode] = code->cur; | |
1956 translate_z80inst(&inst, context, 0, 1); | |
1957 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, pc), opts->gen.scratch1, SZ_W); | |
1958 add_ir(code, after - codebuf, opts->gen.scratch1, SZ_W); | |
1959 call(code, opts->native_addr); | |
1960 jmp_r(code, opts->gen.scratch1); | |
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1961 z80_handle_deferred(context); |
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1962 } |
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1963 return context->interp_code[opcode]; |
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1964 } |
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1965 |
652 | 1966 code_info z80_make_interp_stub(z80_context * context, uint16_t address) |
627
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1967 { |
652 | 1968 z80_options *opts = context->options; |
1969 code_info * code = &opts->gen.code; | |
1970 check_alloc_code(code, 32); | |
1971 code_info stub = {code->cur, NULL}; | |
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1972 //TODO: make this play well with the breakpoint code |
652 | 1973 mov_ir(code, address, opts->gen.scratch1, SZ_W); |
1974 call(code, opts->read_8); | |
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1975 //normal opcode fetch is already factored into instruction timing |
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1976 //back out the base 3 cycles from a read here |
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1977 //not quite perfect, but it will have to do for now |
652 | 1978 cycles(&opts->gen, -3); |
1979 check_cycles_int(&opts->gen, address); | |
1980 call(code, opts->gen.save_context); | |
1981 mov_irdisp(code, address, opts->gen.context_reg, offsetof(z80_context, pc), SZ_W); | |
1982 push_r(code, opts->gen.context_reg); | |
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1983 call_args(code, (code_ptr)z80_interp_handler, 2, opts->gen.scratch1, opts->gen.context_reg); |
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1984 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); |
652 | 1985 pop_r(code, opts->gen.context_reg); |
1986 call(code, opts->gen.load_context); | |
1987 jmp_r(code, opts->gen.scratch1); | |
1988 stub.last = code->cur; | |
1989 return stub; | |
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1990 } |
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1991 |
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1992 |
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1993 uint8_t * z80_get_native_address(z80_context * context, uint32_t address) |
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1994 { |
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1995 native_map_slot *map; |
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1996 if (address < 0x4000) { |
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1997 address &= 0x1FFF; |
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1998 map = context->static_code_map; |
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1999 } else { |
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2000 address -= 0x4000; |
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2001 map = context->banked_code_map; |
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2002 } |
268
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2003 if (!map->base || !map->offsets || map->offsets[address] == INVALID_OFFSET || map->offsets[address] == EXTENSION_WORD) { |
313
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2004 //dprintf("z80_get_native_address: %X NULL\n", address); |
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2005 return NULL; |
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2006 } |
313
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2007 //dprintf("z80_get_native_address: %X %p\n", address, map->base + map->offsets[address]); |
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2008 return map->base + map->offsets[address]; |
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2009 } |
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2010 |
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2011 uint8_t z80_get_native_inst_size(z80_options * opts, uint32_t address) |
235
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2012 { |
627
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2013 //TODO: Fix for addresses >= 0x4000 |
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2014 if (address >= 0x4000) { |
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2015 return 0; |
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2016 } |
591
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2017 return opts->gen.ram_inst_sizes[0][address & 0x1FFF]; |
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2018 } |
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2019 |
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2020 void z80_map_native_address(z80_context * context, uint32_t address, uint8_t * native_address, uint8_t size, uint8_t native_size) |
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2021 { |
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2022 uint32_t orig_address = address; |
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2023 native_map_slot *map; |
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2024 z80_options * opts = context->options; |
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2025 if (address < 0x4000) { |
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2026 address &= 0x1FFF; |
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2027 map = context->static_code_map; |
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2028 opts->gen.ram_inst_sizes[0][address] = native_size; |
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2029 context->ram_code_flags[(address & 0x1C00) >> 10] |= 1 << ((address & 0x380) >> 7); |
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2030 context->ram_code_flags[((address + size) & 0x1C00) >> 10] |= 1 << (((address + size) & 0x380) >> 7); |
627
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2031 } else { |
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2032 //HERE |
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2033 address -= 0x4000; |
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2034 map = context->banked_code_map; |
235
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2035 if (!map->offsets) { |
627
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2036 map->offsets = malloc(sizeof(int32_t) * 0xC000); |
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2037 memset(map->offsets, 0xFF, sizeof(int32_t) * 0xC000); |
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2038 } |
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2039 } |
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2040 if (!map->base) { |
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2041 map->base = native_address; |
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2042 } |
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2043 map->offsets[address] = native_address - map->base; |
253
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Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
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2044 for(--size, orig_address++; size; --size, orig_address++) { |
252
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2045 address = orig_address; |
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2046 if (address < 0x4000) { |
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2047 address &= 0x1FFF; |
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2048 map = context->static_code_map; |
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2049 } else { |
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2050 address -= 0x4000; |
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2051 map = context->banked_code_map; |
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2052 } |
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2053 if (!map->offsets) { |
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2054 map->offsets = malloc(sizeof(int32_t) * 0xC000); |
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2055 memset(map->offsets, 0xFF, sizeof(int32_t) * 0xC000); |
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2056 } |
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2057 map->offsets[address] = EXTENSION_WORD; |
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2058 } |
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2059 } |
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2060 |
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2061 #define INVALID_INSTRUCTION_START 0xFEEDFEED |
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2062 |
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2063 uint32_t z80_get_instruction_start(native_map_slot * static_code_map, uint32_t address) |
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2064 { |
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2065 //TODO: Fixme for address >= 0x4000 |
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2066 if (!static_code_map->base || address >= 0x4000) { |
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2067 return INVALID_INSTRUCTION_START; |
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2068 } |
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2069 address &= 0x1FFF; |
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2070 if (static_code_map->offsets[address] == INVALID_OFFSET) { |
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2071 return INVALID_INSTRUCTION_START; |
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2072 } |
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2073 while (static_code_map->offsets[address] == EXTENSION_WORD) { |
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2074 --address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2075 address &= 0x1FFF; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2076 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2077 return address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2078 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2079 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2080 z80_context * z80_handle_code_write(uint32_t address, z80_context * context) |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2081 { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2082 uint32_t inst_start = z80_get_instruction_start(context->static_code_map, address); |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2083 if (inst_start != INVALID_INSTRUCTION_START) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2084 code_ptr dst = z80_get_native_address(context, inst_start); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2085 code_info code = {dst, dst+16}; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2086 z80_options * opts = context->options; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2087 dprintf("patching code at %p for Z80 instruction at %X due to write to %X\n", code.cur, inst_start, address); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2088 mov_ir(&code, inst_start, opts->gen.scratch1, SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2089 call(&code, opts->retrans_stub); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2090 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2091 return context; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2092 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2093 |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2094 uint8_t * z80_get_native_address_trans(z80_context * context, uint32_t address) |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2095 { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2096 uint8_t * addr = z80_get_native_address(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2097 if (!addr) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2098 translate_z80_stream(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2099 addr = z80_get_native_address(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2100 if (!addr) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2101 printf("Failed to translate %X to native code\n", address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2102 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2103 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2104 return addr; |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2105 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2106 |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2107 void z80_handle_deferred(z80_context * context) |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2108 { |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2109 z80_options * opts = context->options; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2110 process_deferred(&opts->gen.deferred, context, (native_addr_func)z80_get_native_address); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2111 if (opts->gen.deferred) { |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2112 translate_z80_stream(context, opts->gen.deferred->address); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2113 } |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2114 } |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2115 |
559
6b248602ab84
blastem builds and almost works on OS X now
Mike Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2116 extern void * z80_retranslate_inst(uint32_t address, z80_context * context, uint8_t * orig_start) asm("z80_retranslate_inst"); |
390
561fe3ea3fc8
Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
Mike Pavone <pavone@retrodev.com>
parents:
389
diff
changeset
|
2117 void * z80_retranslate_inst(uint32_t address, z80_context * context, uint8_t * orig_start) |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2118 { |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2119 char disbuf[80]; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2120 z80_options * opts = context->options; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2121 uint8_t orig_size = z80_get_native_inst_size(opts, address); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2122 code_info *code = &opts->gen.code; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2123 uint8_t *after, *inst = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2124 z80inst instbuf; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2125 dprintf("Retranslating code at Z80 address %X, native address %p\n", address, orig_start); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2126 after = z80_decode(inst, &instbuf); |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2127 #ifdef DO_DEBUG_PRINT |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2128 z80_disasm(&instbuf, disbuf, address); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2129 if (instbuf.op == Z80_NOP) { |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2130 printf("%X\t%s(%d)\n", address, disbuf, instbuf.immed); |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2131 } else { |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2132 printf("%X\t%s\n", address, disbuf); |
267
1788e3f29c28
Don't mix *H regs with the REX prefix
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
2133 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2134 #endif |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2135 if (orig_size != ZMAX_NATIVE_SIZE) { |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2136 check_alloc_code(code, ZMAX_NATIVE_SIZE); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2137 code_ptr start = code->cur; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2138 deferred_addr * orig_deferred = opts->gen.deferred; |
652 | 2139 translate_z80inst(&instbuf, context, address, 0); |
644
2d7e84ae818c
Temporarily comment out code to translate Z80 instructions in place as in rare cases it can stomp the next instruction if a branch goes from a short from to a long one
Michael Pavone <pavone@retrodev.com>
parents:
628
diff
changeset
|
2140 /* |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2141 if ((native_end - dst) <= orig_size) { |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2142 uint8_t * native_next = z80_get_native_address(context, address + after-inst); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2143 if (native_next && ((native_next == orig_start + orig_size) || (orig_size - (native_end - dst)) > 5)) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2144 remove_deferred_until(&opts->gen.deferred, orig_deferred); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2145 native_end = translate_z80inst(&instbuf, orig_start, context, address, 0); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2146 if (native_next == orig_start + orig_size && (native_next-native_end) < 2) { |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2147 while (native_end < orig_start + orig_size) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2148 *(native_end++) = 0x90; //NOP |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2149 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2150 } else { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2151 jmp(native_end, native_next); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2152 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2153 z80_handle_deferred(context); |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2154 return orig_start; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2155 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2156 }*/ |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2157 z80_map_native_address(context, address, start, after-inst, ZMAX_NATIVE_SIZE); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2158 code_info tmp_code = {orig_start, orig_start + 16}; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2159 jmp(&tmp_code, start); |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2160 tmp_code = *code; |
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2161 code->cur = start + ZMAX_NATIVE_SIZE; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2162 if (!z80_is_terminal(&instbuf)) { |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2163 jmp(&tmp_code, z80_get_native_address_trans(context, address + after-inst)); |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2164 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2165 z80_handle_deferred(context); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2166 return start; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2167 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2168 code_info tmp_code = *code; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2169 code->cur = orig_start; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2170 code->last = orig_start + ZMAX_NATIVE_SIZE; |
652 | 2171 translate_z80inst(&instbuf, context, address, 0); |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2172 code_info tmp2 = *code; |
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2173 *code = tmp_code; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2174 if (!z80_is_terminal(&instbuf)) { |
652 | 2175 |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2176 jmp(&tmp2, z80_get_native_address_trans(context, address + after-inst)); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2177 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2178 z80_handle_deferred(context); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2179 return orig_start; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
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250
diff
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|
2180 } |
235
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2181 } |
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|
2182 |
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|
2183 void translate_z80_stream(z80_context * context, uint32_t address) |
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Get Z80 core working for simple programs
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2184 { |
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|
2185 char disbuf[80]; |
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Get Z80 core working for simple programs
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2186 if (z80_get_native_address(context, address)) { |
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|
2187 return; |
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diff
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|
2188 } |
590
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diff
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|
2189 z80_options * opts = context->options; |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
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|
2190 uint32_t start_address = address; |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
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626
diff
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|
2191 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
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|
2192 do |
235
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|
2193 { |
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|
2194 z80inst inst; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
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|
2195 dprintf("translating Z80 code at address %X\n", address); |
235
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2196 do { |
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2197 uint8_t * existing = z80_get_native_address(context, address); |
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2198 if (existing) { |
591
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diff
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|
2199 jmp(&opts->gen.code, existing); |
235
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2200 break; |
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|
2201 } |
653
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Remove some of the hard coded assumptions about the memory map from the CPU cores
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652
diff
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|
2202 uint8_t * encoded, *next; |
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Remove some of the hard coded assumptions about the memory map from the CPU cores
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652
diff
changeset
|
2203 encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
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Remove some of the hard coded assumptions about the memory map from the CPU cores
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diff
changeset
|
2204 if (!encoded) { |
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Remove some of the hard coded assumptions about the memory map from the CPU cores
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652
diff
changeset
|
2205 code_info stub = z80_make_interp_stub(context, address); |
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diff
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|
2206 z80_map_native_address(context, address, stub.cur, 1, stub.last - stub.cur); |
235
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|
2207 break; |
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diff
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|
2208 } |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2209 //make sure prologue is in a contiguous chunk of code |
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2210 check_code_prologue(&opts->gen.code); |
235
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Get Z80 core working for simple programs
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213
diff
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|
2211 next = z80_decode(encoded, &inst); |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
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267
diff
changeset
|
2212 #ifdef DO_DEBUG_PRINT |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2213 z80_disasm(&inst, disbuf, address); |
235
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Get Z80 core working for simple programs
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213
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|
2214 if (inst.op == Z80_NOP) { |
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Get Z80 core working for simple programs
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213
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2215 printf("%X\t%s(%d)\n", address, disbuf, inst.immed); |
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Get Z80 core working for simple programs
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diff
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|
2216 } else { |
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Get Z80 core working for simple programs
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|
2217 printf("%X\t%s\n", address, disbuf); |
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Get Z80 core working for simple programs
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diff
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2218 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
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267
diff
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|
2219 #endif |
591
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2220 code_ptr start = opts->gen.code.cur; |
652 | 2221 translate_z80inst(&inst, context, address, 0); |
591
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2222 z80_map_native_address(context, address, start, next-encoded, opts->gen.code.cur - start); |
235
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2223 address += next-encoded; |
255
572b935dd030
Properly handle wrapping around to 0 in translate_z80_stream
Mike Pavone <pavone@retrodev.com>
parents:
254
diff
changeset
|
2224 address &= 0xFFFF; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2225 } while (!z80_is_terminal(&inst)); |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
2226 process_deferred(&opts->gen.deferred, context, (native_addr_func)z80_get_native_address); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
2227 if (opts->gen.deferred) { |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
2228 address = opts->gen.deferred->address; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
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267
diff
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|
2229 dprintf("defferred address: %X\n", address); |
235
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Get Z80 core working for simple programs
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2230 } |
653
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Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2231 } while (opts->gen.deferred); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2232 } |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2233 |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2234 void init_z80_opts(z80_options * options, memmap_chunk const * chunks, uint32_t num_chunks, uint32_t clock_divider) |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2235 { |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
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parents:
506
diff
changeset
|
2236 memset(options, 0, sizeof(*options)); |
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WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2237 |
653
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Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2238 options->gen.memmap = chunks; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
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652
diff
changeset
|
2239 options->gen.memmap_chunks = num_chunks; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
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506
diff
changeset
|
2240 options->gen.address_size = SZ_W; |
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WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2241 options->gen.address_mask = 0xFFFF; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2242 options->gen.max_address = 0x10000; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
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|
2243 options->gen.bus_cycles = 3; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2244 options->gen.clock_divider = clock_divider; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2245 options->gen.mem_ptr_off = offsetof(z80_context, mem_pointers); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2246 options->gen.ram_flags_off = offsetof(z80_context, ram_code_flags); |
620
9d6fed6501ba
Fix handling of code writes for Z80 core. This seems to get things close to being back to where they were before the big refactor that broke the Z80 core. Some problems remain. Notably the sound driver in Sonic 2 is still quite broken.
Michael Pavone <pavone@retrodev.com>
parents:
601
diff
changeset
|
2247 options->gen.ram_flags_shift = 7; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
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506
diff
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|
2248 |
235
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Get Z80 core working for simple programs
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|
2249 options->flags = 0; |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2250 #ifdef X86_64 |
235
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Get Z80 core working for simple programs
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|
2251 options->regs[Z80_B] = BH; |
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diff
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|
2252 options->regs[Z80_C] = RBX; |
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diff
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|
2253 options->regs[Z80_D] = CH; |
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diff
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|
2254 options->regs[Z80_E] = RCX; |
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diff
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|
2255 options->regs[Z80_H] = AH; |
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213
diff
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|
2256 options->regs[Z80_L] = RAX; |
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213
diff
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|
2257 options->regs[Z80_IXH] = DH; |
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213
diff
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|
2258 options->regs[Z80_IXL] = RDX; |
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Get Z80 core working for simple programs
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213
diff
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|
2259 options->regs[Z80_IYH] = -1; |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
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|
2260 options->regs[Z80_IYL] = R8; |
235
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|
2261 options->regs[Z80_I] = -1; |
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|
2262 options->regs[Z80_R] = -1; |
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|
2263 options->regs[Z80_A] = R10; |
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|
2264 options->regs[Z80_BC] = RBX; |
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|
2265 options->regs[Z80_DE] = RCX; |
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diff
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|
2266 options->regs[Z80_HL] = RAX; |
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|
2267 options->regs[Z80_SP] = R9; |
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|
2268 options->regs[Z80_AF] = -1; |
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|
2269 options->regs[Z80_IX] = RDX; |
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|
2270 options->regs[Z80_IY] = R8; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2271 |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
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parents:
665
diff
changeset
|
2272 options->gen.scratch1 = R13; |
b68039895627
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Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2273 options->gen.scratch2 = R14; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
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parents:
665
diff
changeset
|
2274 #else |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
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parents:
665
diff
changeset
|
2275 memset(options->regs, -1, sizeof(options->regs)); |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2276 options->regs[Z80_A] = RAX; |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2277 options->regs[Z80_SP] = RBX; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2278 |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2279 options->gen.scratch1 = RCX; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
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parents:
665
diff
changeset
|
2280 options->gen.scratch2 = RDX; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2281 #endif |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2282 |
590
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parents:
506
diff
changeset
|
2283 options->gen.context_reg = RSI; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
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parents:
506
diff
changeset
|
2284 options->gen.cycles = RBP; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2285 options->gen.limit = RDI; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2286 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2287 options->gen.native_code_map = malloc(sizeof(native_map_slot)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2288 memset(options->gen.native_code_map, 0, sizeof(native_map_slot)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2289 options->gen.deferred = NULL; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2290 options->gen.ram_inst_sizes = malloc(sizeof(uint8_t) * 0x2000 + sizeof(uint8_t *)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2291 options->gen.ram_inst_sizes[0] = (uint8_t *)(options->gen.ram_inst_sizes + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2292 memset(options->gen.ram_inst_sizes[0], 0, sizeof(uint8_t) * 0x2000); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2293 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2294 code_info *code = &options->gen.code; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2295 init_code_info(code); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2296 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2297 options->save_context_scratch = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2298 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2299 mov_rrdisp(code, options->gen.scratch2, options->gen.context_reg, offsetof(z80_context, scratch2), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2300 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2301 options->gen.save_context = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2302 for (int i = 0; i <= Z80_A; i++) |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2303 { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2304 int reg; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2305 uint8_t size; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2306 if (i < Z80_I) { |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2307 reg = i /2 + Z80_BC + (i > Z80_H ? 2 : 0); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2308 size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2309 } else { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2310 reg = i; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2311 size = SZ_B; |
652 | 2312 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2313 if (options->regs[reg] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2314 mov_rrdisp(code, options->regs[reg], options->gen.context_reg, offsetof(z80_context, regs) + i, size); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2315 } |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2316 if (size == SZ_W) { |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2317 i++; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2318 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2319 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2320 if (options->regs[Z80_SP] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2321 mov_rrdisp(code, options->regs[Z80_SP], options->gen.context_reg, offsetof(z80_context, sp), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2322 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2323 mov_rrdisp(code, options->gen.limit, options->gen.context_reg, offsetof(z80_context, target_cycle), SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2324 mov_rrdisp(code, options->gen.cycles, options->gen.context_reg, offsetof(z80_context, current_cycle), SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2325 retn(code); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2326 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2327 options->load_context_scratch = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2328 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch1), options->gen.scratch1, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2329 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch2), options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2330 options->gen.load_context = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2331 for (int i = 0; i <= Z80_A; i++) |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2332 { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2333 int reg; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2334 uint8_t size; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2335 if (i < Z80_I) { |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2336 reg = i /2 + Z80_BC + (i > Z80_H ? 2 : 0); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2337 size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2338 } else { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2339 reg = i; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2340 size = SZ_B; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2341 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2342 if (options->regs[reg] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2343 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, regs) + i, options->regs[reg], size); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2344 } |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2345 if (size == SZ_W) { |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2346 i++; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2347 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2348 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2349 if (options->regs[Z80_SP] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2350 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, sp), options->regs[Z80_SP], SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2351 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2352 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.limit, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2353 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, current_cycle), options->gen.cycles, SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2354 retn(code); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2355 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2356 options->native_addr = code->cur; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2357 call(code, options->gen.save_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2358 push_r(code, options->gen.context_reg); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2359 movzx_rr(code, options->gen.scratch1, options->gen.scratch1, SZ_W, SZ_D); |
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2360 call_args(code, (code_ptr)z80_get_native_address_trans, 2, options->gen.context_reg, options->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2361 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2362 pop_r(code, options->gen.context_reg); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2363 call(code, options->gen.load_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2364 retn(code); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2365 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2366 options->gen.handle_cycle_limit = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2367 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2368 code_ptr no_sync = code->cur+1; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2369 jcc(code, CC_B, no_sync); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2370 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, pc), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2371 call(code, options->save_context_scratch); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2372 pop_r(code, RAX); //return address in read/write func |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2373 pop_r(code, RBX); //return address in translated code |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2374 sub_ir(code, 5, RAX, SZ_PTR); //adjust return address to point to the call that got us here |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2375 mov_rrdisp(code, RBX, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2376 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2377 restore_callee_save_regs(code); |
598
faad1927d836
Fix an off-by-one error in a branch destination in the generation of handle_cycle_limit for the Z80
Michael Pavone <pavone@retrodev.com>
parents:
597
diff
changeset
|
2378 *no_sync = code->cur - (no_sync + 1); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2379 //return to caller of z80_run |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2380 retn(code); |
652 | 2381 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2382 options->gen.handle_code_write = (code_ptr)z80_handle_code_write; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2383 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2384 options->read_8 = gen_mem_fun(&options->gen, chunks, num_chunks, READ_8, &options->read_8_noinc); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2385 options->write_8 = gen_mem_fun(&options->gen, chunks, num_chunks, WRITE_8, &options->write_8_noinc); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2386 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2387 options->gen.handle_cycle_limit_int = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2388 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, int_cycle), options->gen.cycles, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2389 code_ptr skip_int = code->cur+1; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2390 jcc(code, CC_B, skip_int); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2391 //set limit to the cycle limit |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2392 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.limit, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2393 //disable interrupts |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2394 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2395 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2396 cycles(&options->gen, 7); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2397 //save return address (in scratch1) to Z80 stack |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2398 sub_ir(code, 2, options->regs[Z80_SP], SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2399 mov_rr(code, options->regs[Z80_SP], options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2400 //we need to do check_cycles and cycles outside of the write_8 call |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2401 //so that the stack has the correct depth if we need to return to C |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2402 //for a synchronization |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2403 check_cycles(&options->gen); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2404 cycles(&options->gen, 3); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2405 //save word to write before call to write_8_noinc |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2406 push_r(code, options->gen.scratch1); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2407 call(code, options->write_8_noinc); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2408 //restore word to write |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2409 pop_r(code, options->gen.scratch1); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2410 //write high byte to SP+1 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2411 mov_rr(code, options->regs[Z80_SP], options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2412 add_ir(code, 1, options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2413 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2414 check_cycles(&options->gen); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2415 cycles(&options->gen, 3); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2416 call(code, options->write_8_noinc); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2417 //dispose of return address as we'll be jumping somewhere else |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2418 pop_r(code, options->gen.scratch2); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2419 //TODO: Support interrupt mode 0 and 2 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2420 mov_ir(code, 0x38, options->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2421 call(code, options->native_addr); |
663
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
2422 mov_rrind(code, options->gen.scratch1, options->gen.context_reg, SZ_PTR); |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2423 restore_callee_save_regs(code); |
663
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
2424 //return to caller of z80_run to sync |
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
2425 retn(code); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2426 *skip_int = code->cur - (skip_int+1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2427 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2428 code_ptr skip_sync = code->cur + 1; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2429 jcc(code, CC_B, skip_sync); |
702
144df1a6d3b9
Save PC to context struct when syncing Z80 at instruction start. This fixes saving savestates and probably the Z80 debugger as well
Michael Pavone <pavone@retrodev.com>
parents:
701
diff
changeset
|
2430 //save PC |
144df1a6d3b9
Save PC to context struct when syncing Z80 at instruction start. This fixes saving savestates and probably the Z80 debugger as well
Michael Pavone <pavone@retrodev.com>
parents:
701
diff
changeset
|
2431 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, pc), SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2432 options->do_sync = code->cur; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2433 call(code, options->gen.save_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2434 pop_rind(code, options->gen.context_reg); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2435 //restore callee saved registers |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2436 restore_callee_save_regs(code); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2437 //return to caller of z80_run |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2438 *skip_sync = code->cur - (skip_sync+1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2439 retn(code); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2440 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2441 options->read_io = code->cur; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2442 check_cycles(&options->gen); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2443 cycles(&options->gen, 4); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2444 //Genesis has no IO hardware and always returns FF |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2445 //eventually this should use a second memory map array |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2446 mov_ir(code, 0xFF, options->gen.scratch1, SZ_B); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2447 retn(code); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2448 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2449 options->write_io = code->cur; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2450 check_cycles(&options->gen); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2451 cycles(&options->gen, 4); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2452 retn(code); |
652 | 2453 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2454 options->read_16 = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2455 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2456 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2457 //TODO: figure out how to handle the extra wait state for word reads to bank area |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2458 //may also need special handling to avoid too much stack depth when access is blocked |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2459 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2460 call(code, options->read_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2461 mov_rr(code, options->gen.scratch1, options->gen.scratch2, SZ_B); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2462 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2463 add_ir(code, 1, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2464 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2465 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2466 call(code, options->read_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2467 shl_ir(code, 8, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2468 mov_rr(code, options->gen.scratch2, options->gen.scratch1, SZ_B); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2469 retn(code); |
652 | 2470 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2471 options->write_16_highfirst = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2472 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2473 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2474 push_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2475 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2476 add_ir(code, 1, options->gen.scratch2, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2477 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2478 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2479 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2480 pop_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2481 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2482 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2483 //TODO: Check if we can get away with TCO here |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2484 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2485 retn(code); |
652 | 2486 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2487 options->write_16_lowfirst = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2488 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2489 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2490 push_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2491 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2492 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2493 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2494 pop_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2495 add_ir(code, 1, options->gen.scratch2, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2496 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2497 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2498 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2499 //TODO: Check if we can get away with TCO here |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2500 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2501 retn(code); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2502 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2503 options->retrans_stub = code->cur; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2504 //pop return address |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2505 pop_r(code, options->gen.scratch2); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2506 call(code, options->gen.save_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2507 //adjust pointer before move and call instructions that got us here |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
2508 sub_ir(code, options->gen.scratch1 >= R8 ? 11 : 10, options->gen.scratch2, SZ_PTR); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2509 push_r(code, options->gen.context_reg); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2510 call_args(code, (code_ptr)z80_retranslate_inst, 3, options->gen.scratch1, options->gen.context_reg, options->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2511 pop_r(code, options->gen.context_reg); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2512 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2513 call(code, options->gen.load_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2514 jmp_r(code, options->gen.scratch1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2515 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2516 options->run = (z80_run_fun)code->cur; |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2517 save_callee_save_regs(code); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2518 #ifdef X86_64 |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2519 mov_rr(code, RDI, options->gen.context_reg, SZ_PTR); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2520 #else |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2521 mov_rdispr(code, RSP, 5 * sizeof(int32_t), options->gen.context_reg, SZ_PTR); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2522 #endif |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2523 call(code, options->load_context_scratch); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2524 cmp_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2525 code_ptr no_extra = code->cur+1; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2526 jcc(code, CC_Z, no_extra); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2527 push_rdisp(code, options->gen.context_reg, offsetof(z80_context, extra_pc)); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2528 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2529 *no_extra = code->cur - (no_extra + 1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2530 jmp_rind(code, options->gen.context_reg); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2531 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2532 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2533 void init_z80_context(z80_context * context, z80_options * options) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2534 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2535 memset(context, 0, sizeof(*context)); |
360
c42fae88d346
Fix sizeof expression passed to malloc in z80_init to avoid a minor memory error
Mike Pavone <pavone@retrodev.com>
parents:
335
diff
changeset
|
2536 context->static_code_map = malloc(sizeof(*context->static_code_map)); |
259
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2537 context->static_code_map->base = NULL; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2538 context->static_code_map->offsets = malloc(sizeof(int32_t) * 0x2000); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2539 memset(context->static_code_map->offsets, 0xFF, sizeof(int32_t) * 0x2000); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2540 context->banked_code_map = malloc(sizeof(native_map_slot)); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2541 memset(context->banked_code_map, 0, sizeof(native_map_slot)); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2542 context->options = options; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2543 context->int_cycle = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2544 context->int_pulse_start = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2545 context->int_pulse_end = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2546 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2547 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2548 void z80_run(z80_context * context, uint32_t target_cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2549 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2550 if (context->reset || context->busack) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2551 context->current_cycle = target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2552 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2553 if (context->current_cycle < target_cycle) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2554 //busreq is sampled at the end of an m-cycle |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2555 //we can approximate that by running for a single m-cycle after a bus request |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2556 context->sync_cycle = context->busreq ? context->current_cycle + 3*context->options->gen.clock_divider : target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2557 if (!context->native_pc) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2558 context->native_pc = z80_get_native_address_trans(context, context->pc); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2559 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2560 while (context->current_cycle < context->sync_cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2561 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2562 if (context->int_pulse_end < context->current_cycle || context->int_pulse_end == CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2563 z80_next_int_pulse(context); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2564 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2565 if (context->iff1) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2566 context->int_cycle = context->int_pulse_start < context->int_enable_cycle ? context->int_enable_cycle : context->int_pulse_start; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2567 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2568 context->int_cycle = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2569 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2570 context->target_cycle = context->sync_cycle < context->int_cycle ? context->sync_cycle : context->int_cycle; |
670
f4f3e74b0ce6
Restore Z80 interrupt pulse duration and make a small improvement to debug print output
Michael Pavone <pavone@retrodev.com>
parents:
668
diff
changeset
|
2571 dprintf("Running Z80 from cycle %d to cycle %d. Int cycle: %d (%d - %d)\n", context->current_cycle, context->sync_cycle, context->int_cycle, context->int_pulse_start, context->int_pulse_end); |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2572 context->options->run(context); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2573 dprintf("Z80 ran to cycle %d\n", context->current_cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2574 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2575 if (context->busreq) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2576 context->busack = 1; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2577 context->current_cycle = target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2578 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2579 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2580 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2581 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2582 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2583 void z80_assert_reset(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2584 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2585 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2586 context->reset = 1; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2587 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2588 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2589 void z80_clear_reset(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2590 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2591 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2592 if (context->reset) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2593 //TODO: Handle case where reset is not asserted long enough |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
2594 context->im = 0; |
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
2595 context->iff1 = context->iff2 = 0; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2596 context->native_pc = NULL; |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
2597 context->extra_pc = NULL; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2598 context->pc = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2599 context->reset = 0; |
676
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
2600 if (context->busreq) { |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
2601 //TODO: Figure out appropriate delay |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
2602 context->busack = 1; |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
2603 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2604 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2605 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2606 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2607 void z80_assert_busreq(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2608 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2609 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2610 context->busreq = 1; |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
2611 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2612 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2613 void z80_clear_busreq(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2614 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2615 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2616 context->busreq = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2617 context->busack = 0; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2618 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2619 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2620 uint8_t z80_get_busack(z80_context * context, uint32_t cycle) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2621 { |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2622 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2623 return context->busack; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2624 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2625 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2626 void z80_adjust_cycles(z80_context * context, uint32_t deduction) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2627 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2628 if (context->current_cycle < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2629 fprintf(stderr, "WARNING: Deduction of %u cycles when Z80 cycle counter is only %u\n", deduction, context->current_cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2630 context->current_cycle = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2631 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2632 context->current_cycle -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2633 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2634 if (context->int_enable_cycle != CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2635 if (context->int_enable_cycle < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2636 context->int_enable_cycle = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2637 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2638 context->int_enable_cycle -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2639 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2640 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2641 if (context->int_pulse_start != CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2642 if (context->int_pulse_end < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2643 context->int_pulse_start = context->int_pulse_end = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2644 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2645 context->int_pulse_end -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2646 if (context->int_pulse_start < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2647 context->int_pulse_start = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2648 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2649 context->int_pulse_start -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2650 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2651 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2652 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2653 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2654 |
652 | 2655 uint32_t zbreakpoint_patch(z80_context * context, uint16_t address, code_ptr dst) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2656 { |
652 | 2657 code_info code = {dst, dst+16}; |
659
759c38bf97f8
Minor Z80 core cleanup
Michael Pavone <pavone@retrodev.com>
parents:
657
diff
changeset
|
2658 mov_ir(&code, address, context->options->gen.scratch1, SZ_W); |
652 | 2659 call(&code, context->bp_stub); |
2660 return code.cur-dst; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2661 } |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2662 |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2663 void zcreate_stub(z80_context * context) |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2664 { |
652 | 2665 z80_options * opts = context->options; |
2666 code_info *code = &opts->gen.code; | |
2667 check_code_prologue(code); | |
2668 context->bp_stub = code->cur; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2669 |
682 | 2670 //Calculate length of prologue |
652 | 2671 check_cycles_int(&opts->gen, 0); |
2672 int check_int_size = code->cur-context->bp_stub; | |
2673 code->cur = context->bp_stub; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2674 |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2675 //Calculate length of patch |
652 | 2676 int patch_size = zbreakpoint_patch(context, 0, code->cur); |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2677 |
682 | 2678 //Save context and call breakpoint handler |
652 | 2679 call(code, opts->gen.save_context); |
2680 push_r(code, opts->gen.scratch1); | |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2681 call_args_abi(code, context->bp_handler, 2, opts->gen.context_reg, opts->gen.scratch1); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
2682 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR); |
682 | 2683 //Restore context |
652 | 2684 call(code, opts->gen.load_context); |
2685 pop_r(code, opts->gen.scratch1); | |
682 | 2686 //do prologue stuff |
652 | 2687 cmp_rr(code, opts->gen.cycles, opts->gen.limit, SZ_D); |
2688 uint8_t * jmp_off = code->cur+1; | |
2689 jcc(code, CC_NC, code->cur + 7); | |
2690 pop_r(code, opts->gen.scratch1); | |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
2691 add_ir(code, check_int_size - patch_size, opts->gen.scratch1, SZ_PTR); |
652 | 2692 push_r(code, opts->gen.scratch1); |
2693 jmp(code, opts->gen.handle_cycle_limit_int); | |
2694 *jmp_off = code->cur - (jmp_off+1); | |
682 | 2695 //jump back to body of translated instruction |
652 | 2696 pop_r(code, opts->gen.scratch1); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
2697 add_ir(code, check_int_size - patch_size, opts->gen.scratch1, SZ_PTR); |
652 | 2698 jmp_r(code, opts->gen.scratch1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2699 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2700 |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
2701 void zinsert_breakpoint(z80_context * context, uint16_t address, uint8_t * bp_handler) |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
2702 { |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2703 context->bp_handler = bp_handler; |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2704 uint8_t bit = 1 << (address % sizeof(uint8_t)); |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2705 if (!(bit & context->breakpoint_flags[address / sizeof(uint8_t)])) { |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2706 context->breakpoint_flags[address / sizeof(uint8_t)] |= bit; |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2707 if (!context->bp_stub) { |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2708 zcreate_stub(context); |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
2709 } |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2710 uint8_t * native = z80_get_native_address(context, address); |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2711 if (native) { |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2712 zbreakpoint_patch(context, address, native); |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
2713 } |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
2714 } |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
2715 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2716 |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
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2717 void zremove_breakpoint(z80_context * context, uint16_t address) |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
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2718 { |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
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changeset
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2719 context->breakpoint_flags[address / sizeof(uint8_t)] &= ~(1 << (address % sizeof(uint8_t))); |
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Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
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2720 uint8_t * native = z80_get_native_address(context, address); |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
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changeset
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2721 if (native) { |
652 | 2722 z80_options * opts = context->options; |
2723 code_info tmp_code = opts->gen.code; | |
2724 opts->gen.code.cur = native; | |
2725 opts->gen.code.last = native + 16; | |
2726 check_cycles_int(&opts->gen, address); | |
2727 opts->gen.code = tmp_code; | |
682 | 2728 } |
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836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
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2729 } |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
2730 |