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annotate gen_x86.c @ 49:d2e43d64e999

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Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
author Mike Pavone <pavone@retrodev.com>
date Wed, 12 Dec 2012 23:21:11 -0800
parents 3e7bfde7606e
children 937b47c9b79b
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1 #include "gen_x86.h"
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2 #include "68kinst.h"
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3 #include <stddef.h>
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4 #include <stdio.h>
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5
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6 #define REX_RM_FIELD 0x1
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7 #define REX_SIB_FIELD 0x2
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8 #define REX_REG_FIELD 0x4
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9 #define REX_QUAD 0x8
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10
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11 #define OP_ADD 0x00
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12 #define OP_OR 0x08
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13 #define PRE_2BYTE 0x0F
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14 #define OP_ADC 0x10
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15 #define OP_SBB 0x18
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16 #define OP_AND 0x20
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17 #define OP_SUB 0x28
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18 #define OP_XOR 0x30
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19 #define OP_CMP 0x38
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20 #define PRE_REX 0x40
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21 #define OP_PUSH 0x50
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22 #define OP_POP 0x58
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23 #define PRE_SIZE 0x66
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24 #define OP_JCC 0x70
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25 #define OP_IMMED_ARITH 0x80
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26 #define OP_MOV 0x88
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27 #define OP_PUSHF 0x9C
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28 #define OP_POPF 0x9D
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29 #define OP_MOV_I8R 0xB0
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30 #define OP_MOV_IR 0xB8
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31 #define OP_SHIFTROT_IR 0xC0
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32 #define OP_RETN 0xC3
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33 #define OP_MOV_IEA 0xC6
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34 #define OP_SHIFTROT_1 0xD0
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35 #define OP_SHIRTROT_CL 0xD2
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36 #define OP_CALL 0xE8
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37 #define OP_JMP 0xE9
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38 #define OP_JMP_BYTE 0xEB
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39 #define OP_CALL_EA 0xFF
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40
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41 #define OP2_JCC 0x80
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42 #define OP2_SETCC 0x90
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43
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44 #define OP_EX_ADDI 0x0
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45 #define OP_EX_ORI 0x1
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46 #define OP_EX_ADCI 0x2
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47 #define OP_EX_SBBI 0x3
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48 #define OP_EX_ANDI 0x4
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49 #define OP_EX_SUBI 0x5
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50 #define OP_EX_XORI 0x6
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51 #define OP_EX_CMPI 0x7
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52
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53 #define OP_EX_ROL 0x0
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54 #define OP_EX_ROR 0x1
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55 #define OP_EX_RCL 0x2
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56 #define OP_EX_RCR 0x3
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57 #define OP_EX_SHL 0x4
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58 #define OP_EX_SHR 0x5
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59 #define OP_EX_SAL 0x6 //identical to SHL
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60 #define OP_EX_SAR 0x7
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61
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62 #define BIT_IMMED_RAX 0x4
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63 #define BIT_DIR 0x2
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64 #define BIT_SIZE 0x1
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65
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66
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67 enum {
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68 X86_RAX = 0,
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69 X86_RCX,
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70 X86_RDX,
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71 X86_RBX,
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72 X86_RSP,
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73 X86_RBP,
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74 X86_RSI,
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75 X86_RDI,
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76 X86_AH=4,
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77 X86_CH,
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78 X86_DH,
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79 X86_BH,
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80 X86_R8=0,
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81 X86_R9,
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82 X86_R10,
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83 X86_R11,
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84 X86_R12,
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85 X86_R13,
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86 X86_R14,
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87 X86_R15
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88 } x86_regs_enc;
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89
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90 uint8_t * x86_rr_sizedir(uint8_t * out, uint8_t opcode, uint8_t src, uint8_t dst, uint8_t size)
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91 {
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92 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix
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93 uint8_t tmp;
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94 if (size == SZ_W) {
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95 *(out++) = PRE_SIZE;
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96 }
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97 if (size == SZ_B && dst >= RSP && dst <= RDI) {
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98 opcode |= BIT_DIR;
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99 tmp = dst;
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100 dst = src;
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101 src = dst;
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102 }
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103 if (size == SZ_Q || src >= R8 || dst >= R8 || (size == SZ_B && src >= RSP && src <= RDI)) {
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104 *out = PRE_REX;
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105 if (size == SZ_Q) {
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106 *out |= REX_QUAD;
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107 }
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108 if (src >= R8) {
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109 *out |= REX_REG_FIELD;
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110 src -= (R8 - X86_R8);
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111 }
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112 if (dst >= R8) {
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113 *out |= REX_RM_FIELD;
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114 dst -= (R8 - X86_R8);
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115 }
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116 out++;
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117 }
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118 if (size == SZ_B) {
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119 if (src >= AH && src <= BH) {
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120 src -= (AH-X86_AH);
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121 }
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122 if (dst >= AH && dst <= BH) {
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123 dst -= (AH-X86_AH);
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124 }
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125 } else {
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126 opcode |= BIT_SIZE;
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127 }
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128 *(out++) = opcode;
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129 *(out++) = MODE_REG_DIRECT | dst | (src << 3);
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130 return out;
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131 }
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132
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133 uint8_t * x86_rrdisp8_sizedir(uint8_t * out, uint8_t opcode, uint8_t reg, uint8_t base, int8_t disp, uint8_t size, uint8_t dir)
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134 {
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135 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
136 uint8_t tmp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
137 if (size == SZ_W) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
138 *(out++) = PRE_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
139 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
140 if (size == SZ_Q || reg >= R8 || base >= R8 || (size == SZ_B && reg >= RSP && reg <= RDI)) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
141 *out = PRE_REX;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
142 if (size == SZ_Q) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
143 *out |= REX_QUAD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
144 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
145 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
146 *out |= REX_REG_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
147 reg -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
148 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
149 if (base >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
150 *out |= REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
151 base -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
152 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
153 out++;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
154 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
155 if (size == SZ_B) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
156 if (reg >= AH && reg <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
157 reg -= (AH-X86_AH);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
158 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
159 } else {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
160 opcode |= BIT_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
161 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
162 *(out++) = opcode | dir;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
163 *(out++) = MODE_REG_DISPLACE8 | base | (reg << 3);
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
164 if (base == RSP) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
165 //add SIB byte, with no index and RSP as base
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
166 *(out++) = (RSP << 3) | RSP;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
167 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
168 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
169 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
170 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
171
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
172 uint8_t * x86_rrind_sizedir(uint8_t * out, uint8_t opcode, uint8_t reg, uint8_t base, uint8_t size, uint8_t dir)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
173 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
174 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
175 uint8_t tmp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
176 if (size == SZ_W) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
177 *(out++) = PRE_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
178 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
179 if (size == SZ_Q || reg >= R8 || base >= R8 || (size == SZ_B && reg >= RSP && reg <= RDI)) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
180 *out = PRE_REX;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
181 if (size == SZ_Q) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
182 *out |= REX_QUAD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
183 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
184 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
185 *out |= REX_REG_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
186 reg -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
187 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
188 if (base >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
189 *out |= REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
190 base -= (R8 - X86_R8);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
191 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
192 out++;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
193 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
194 if (size == SZ_B) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
195 if (reg >= AH && reg <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
196 reg -= (AH-X86_AH);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
197 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
198 } else {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
199 opcode |= BIT_SIZE;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
200 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
201 *(out++) = opcode | dir;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
202 *(out++) = MODE_REG_INDIRECT | base | (reg << 3);
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
203 if (base == RSP) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
204 //add SIB byte, with no index and RSP as base
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
205 *(out++) = (RSP << 3) | RSP;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
206 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
207 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
208 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
209
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
210 uint8_t * x86_ir(uint8_t * out, uint8_t opcode, uint8_t op_ex, uint8_t al_opcode, int32_t val, uint8_t dst, uint8_t size)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
211 {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
212 uint8_t sign_extend = 0;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
213 if ((size == SZ_D || size == SZ_Q) && val <= 0x7F && val >= -0x80) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
214 sign_extend = 1;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
215 opcode |= BIT_DIR;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
216 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
217 if (size == SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
218 *(out++) = PRE_SIZE;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
219 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
220 if (dst == RAX && !sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
221 if (size != SZ_B) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
222 al_opcode |= BIT_SIZE;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
223 if (size == SZ_Q) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
224 *out = PRE_REX | REX_QUAD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
225 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
226 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
227 *(out++) = al_opcode | BIT_IMMED_RAX;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
228 } else {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
229 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
230 *out = PRE_REX;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
231 if (size == SZ_Q) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
232 *out |= REX_QUAD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
233 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
234 if (dst >= R8) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
235 *out |= REX_RM_FIELD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
236 dst -= (R8 - X86_R8);
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
237 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
238 out++;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
239 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
240 if (dst >= AH && dst <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
241 dst -= (AH-X86_AH);
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
242 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
243 if (size != SZ_B) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
244 opcode |= BIT_SIZE;
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
245 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
246 *(out++) = opcode;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
247 *(out++) = MODE_REG_DIRECT | dst | (op_ex << 3);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
248 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
249 *(out++) = val;
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
250 if (size != SZ_B && !sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
251 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
252 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
253 if (size != SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
254 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
255 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
256 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
257 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
258 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
259 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
260 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
261 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
262
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
263 uint8_t * x86_irdisp8(uint8_t * out, uint8_t opcode, uint8_t op_ex, int32_t val, uint8_t dst, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
264 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
265 uint8_t sign_extend = 0;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
266 if ((size == SZ_D || size == SZ_Q) && val <= 0x7F && val >= -0x80) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
267 sign_extend = 1;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
268 opcode |= BIT_DIR;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
269 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
270 if (size == SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
271 *(out++) = PRE_SIZE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
272 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
273
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
274 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents: 15
diff changeset
275 *out = PRE_REX;
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Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
276 if (size == SZ_Q) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
277 *out |= REX_QUAD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
278 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
279 if (dst >= R8) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
280 *out |= REX_RM_FIELD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
281 dst -= (R8 - X86_R8);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
282 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
283 out++;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
284 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
285 if (dst >= AH && dst <= BH) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
286 dst -= (AH-X86_AH);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
287 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
288 if (size != SZ_B) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
289 opcode |= BIT_SIZE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
290 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
291 *(out++) = opcode;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
292 *(out++) = MODE_REG_DISPLACE8 | dst | (op_ex << 3);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
293 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
294 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
295 if (size != SZ_B && !sign_extend) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
296 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
297 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
298 if (size != SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
299 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
300 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
301 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
302 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
303 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
304 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
305 return out;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
306 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
307
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
308
49
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
309 uint8_t * x86_shiftrot_ir(uint8_t * out, uint8_t op_ex, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
310 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
311 if (size == SZ_W) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
312 *(out++) = PRE_SIZE;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
313 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
314 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
315 *out = PRE_REX;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
316 if (size == SZ_Q) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
317 *out |= REX_QUAD;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
318 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
319 if (dst >= R8) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
320 *out |= REX_RM_FIELD;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
321 dst -= (R8 - X86_R8);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
322 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
323 out++;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
324 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
325 if (dst >= AH && dst <= BH) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
326 dst -= (AH-X86_AH);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
327 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
328
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
329 *(out++) = (val == 1 ? OP_SHIFTROT_1: OP_SHIFTROT_IR) | (size == SZ_B ? 0 : BIT_SIZE);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
330 *(out++) = MODE_REG_DIRECT | dst | (op_ex << 3);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
331 if (val != 1) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
332 *(out++) = val;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
333 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
334 return out;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
335 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
336
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
337 uint8_t * x86_shiftrot_irdisp8(uint8_t * out, uint8_t op_ex, uint8_t val, uint8_t dst, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
338 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
339 if (size == SZ_W) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
340 *(out++) = PRE_SIZE;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
341 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
342 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
343 *out = PRE_REX;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
344 if (size == SZ_Q) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
345 *out |= REX_QUAD;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
346 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
347 if (dst >= R8) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
348 *out |= REX_RM_FIELD;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
349 dst -= (R8 - X86_R8);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
350 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
351 out++;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
352 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
353 if (dst >= AH && dst <= BH) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
354 dst -= (AH-X86_AH);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
355 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
356
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
357 *(out++) = (val == 1 ? OP_SHIFTROT_1: OP_SHIFTROT_IR) | (size == SZ_B ? 0 : BIT_SIZE);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
358 *(out++) = MODE_REG_DISPLACE8 | dst | (op_ex << 3);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
359 *(out++) = disp;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
360 if (val != 1) {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
361 *(out++) = val;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
362 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
363 return out;
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
364 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
365
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
366 uint8_t * rol_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
367 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
368 return x86_shiftrot_ir(out, OP_EX_ROL, val, dst, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
369 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
370
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
371 uint8_t * ror_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
372 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
373 return x86_shiftrot_ir(out, OP_EX_ROR, val, dst, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
374 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
375
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
376 uint8_t * rcl_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
377 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
378 return x86_shiftrot_ir(out, OP_EX_RCL, val, dst, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
379 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
380
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
381 uint8_t * rcr_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
382 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
383 return x86_shiftrot_ir(out, OP_EX_RCR, val, dst, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
384 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
385
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
386 uint8_t * shl_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
387 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
388 return x86_shiftrot_ir(out, OP_EX_SHL, val, dst, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
389 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
390
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
391 uint8_t * shr_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
392 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
393 return x86_shiftrot_ir(out, OP_EX_SHR, val, dst, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
394 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
395
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
396 uint8_t * sar_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
397 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
398 return x86_shiftrot_ir(out, OP_EX_SAR, val, dst, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
399 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
400
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
401 uint8_t * rol_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
402 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
403 return x86_shiftrot_irdisp8(out, OP_EX_ROL, val, dst_base, disp, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
404 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
405
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
406 uint8_t * ror_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
407 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
408 return x86_shiftrot_irdisp8(out, OP_EX_ROR, val, dst_base, disp, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
409 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
410
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
411 uint8_t * rcl_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
412 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
413 return x86_shiftrot_irdisp8(out, OP_EX_RCL, val, dst_base, disp, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
414 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
415
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
416 uint8_t * rcr_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
417 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
418 return x86_shiftrot_irdisp8(out, OP_EX_RCR, val, dst_base, disp, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
419 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
420
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
421 uint8_t * shl_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
422 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
423 return x86_shiftrot_irdisp8(out, OP_EX_SHL, val, dst_base, disp, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
424 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
425
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
426 uint8_t * shr_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
427 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
428 return x86_shiftrot_irdisp8(out, OP_EX_SHR, val, dst_base, disp, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
429 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
430
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
431 uint8_t * sar_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size)
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
432 {
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
433 return x86_shiftrot_irdisp8(out, OP_EX_SAR, val, dst_base, disp, size);
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
434 }
d2e43d64e999 Add untested support for and, eor, or, swap, tst and nop instructions. Add call to m68k_save_result for add and sub so that they will properly save results for memory destinations
Mike Pavone <pavone@retrodev.com>
parents: 18
diff changeset
435
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
436 uint8_t * add_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
437 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
438 return x86_rr_sizedir(out, OP_ADD, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
439 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
440
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
441 uint8_t * add_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
442 {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
443 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ADDI, OP_ADD, val, dst, size);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
444 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
445
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
446 uint8_t * add_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
447 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
448 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ADDI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
449 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
450
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
451 uint8_t * add_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
452 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
453 return x86_rrdisp8_sizedir(out, OP_ADD, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
454 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
455
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
456 uint8_t * add_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
457 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
458 return x86_rrdisp8_sizedir(out, OP_ADD, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
459 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
460
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
461 uint8_t * or_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
462 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
463 return x86_rr_sizedir(out, OP_OR, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
464 }
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
465 uint8_t * or_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
466 {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
467 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ORI, OP_OR, val, dst, size);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
468 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
469
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
470 uint8_t * or_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
471 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
472 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ORI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
473 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
474
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
475 uint8_t * or_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
476 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
477 return x86_rrdisp8_sizedir(out, OP_OR, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
478 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
479
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
480 uint8_t * or_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
481 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
482 return x86_rrdisp8_sizedir(out, OP_OR, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
483 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
484
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
485 uint8_t * and_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
486 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
487 return x86_rr_sizedir(out, OP_AND, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
488 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
489
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
490 uint8_t * and_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
491 {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
492 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ANDI, OP_AND, val, dst, size);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
493 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
494
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
495 uint8_t * and_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
496 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
497 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ANDI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
498 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
499
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
500 uint8_t * and_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
501 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
502 return x86_rrdisp8_sizedir(out, OP_AND, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
503 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
504
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
505 uint8_t * and_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
506 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
507 return x86_rrdisp8_sizedir(out, OP_AND, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
508 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
509
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
510 uint8_t * xor_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
511 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
512 return x86_rr_sizedir(out, OP_XOR, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
513 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
514
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
515 uint8_t * xor_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
516 {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
517 return x86_ir(out, OP_IMMED_ARITH, OP_EX_XORI, OP_XOR, val, dst, size);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
518 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
519
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
520 uint8_t * xor_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
521 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
522 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_XORI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
523 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
524
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
525 uint8_t * xor_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
526 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
527 return x86_rrdisp8_sizedir(out, OP_XOR, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
528 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
529
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
530 uint8_t * xor_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
531 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
532 return x86_rrdisp8_sizedir(out, OP_XOR, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
533 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
534
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
535 uint8_t * sub_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
536 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
537 return x86_rr_sizedir(out, OP_SUB, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
538 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
539
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
540 uint8_t * sub_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
541 {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
542 return x86_ir(out, OP_IMMED_ARITH, OP_EX_SUBI, OP_SUB, val, dst, size);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
543 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
544
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
545 uint8_t * sub_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
546 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
547 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_SUBI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
548 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
549
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
550 uint8_t * sub_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
551 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
552 return x86_rrdisp8_sizedir(out, OP_SUB, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
553 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
554
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
555 uint8_t * sub_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
556 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
557 return x86_rrdisp8_sizedir(out, OP_SUB, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
558 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
559
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
560 uint8_t * cmp_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
561 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
562 return x86_rr_sizedir(out, OP_CMP, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
563 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
564
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
565 uint8_t * cmp_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
566 {
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
567 return x86_ir(out, OP_IMMED_ARITH, OP_EX_CMPI, OP_CMP, val, dst, size);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
568 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
569
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
570 uint8_t * cmp_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
571 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
572 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_CMPI, val, dst_base, disp, size);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
573 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
574
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
575 uint8_t * cmp_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
576 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
577 return x86_rrdisp8_sizedir(out, OP_CMP, src, dst_base, disp, size, 0);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
578 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
579
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
580 uint8_t * cmp_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
581 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
582 return x86_rrdisp8_sizedir(out, OP_CMP, dst, src_base, disp, size, BIT_DIR);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
583 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
584
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
585 uint8_t * mov_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
586 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
587 return x86_rr_sizedir(out, OP_MOV, src, dst, size);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
588 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
589
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
590 uint8_t * mov_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
591 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
592 return x86_rrdisp8_sizedir(out, OP_MOV, src, dst_base, disp, size, 0);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
593 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
594
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
595 uint8_t * mov_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
596 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
597 return x86_rrdisp8_sizedir(out, OP_MOV, dst, src_base, disp, size, BIT_DIR);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
598 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
599
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
600 uint8_t * mov_rrind(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
601 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
602 return x86_rrind_sizedir(out, OP_MOV, src, dst, size, 0);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
603 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
604
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
605 uint8_t * mov_rindr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
606 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
607 return x86_rrind_sizedir(out, OP_MOV, dst, src, size, BIT_DIR);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
608 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
609
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
610 uint8_t * mov_ir(uint8_t * out, int64_t val, uint8_t dst, uint8_t size)
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
611 {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
612 uint8_t sign_extend = 0;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
613 if (size == SZ_Q && val <= 0x7FFFFFFF && val >= -2147483648) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
614 sign_extend = 1;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
615 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
616 if (size == SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
617 *(out++) = PRE_SIZE;
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
618 }
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
619 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
620 *out = PRE_REX;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
621 if (size == SZ_Q) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
622 *out |= REX_QUAD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
623 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
624 if (dst >= R8) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
625 *out |= REX_RM_FIELD;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
626 dst -= (R8 - X86_R8);
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
627 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
628 out++;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
629 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
630 if (dst >= AH && dst <= BH) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
631 dst -= (AH-X86_AH);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
632 }
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
633 if (size == SZ_B) {
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
634 *(out++) = OP_MOV_I8R | dst;
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
635 } else if (size == SZ_Q && sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
636 *(out++) = OP_MOV_IEA | BIT_SIZE;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
637 *(out++) = MODE_REG_DIRECT | dst;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
638 } else {
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
639 *(out++) = OP_MOV_IR | dst;
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
640 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
641 *(out++) = val;
15
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
642 if (size != SZ_B) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
643 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
644 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
645 if (size != SZ_W) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
646 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
647 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
648 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
649 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
650 if (size == SZ_Q && !sign_extend) {
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
651 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
652 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
653 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
654 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
655 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
656 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
657 val >>= 8;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
658 *(out++) = val;
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
659 }
c0f339564819 Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents: 14
diff changeset
660 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
661 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
662 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
663 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
664
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
665 uint8_t * mov_irdisp8(uint8_t * out, int32_t val, uint8_t dst, int8_t disp, uint8_t size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
666 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
667 if (size == SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
668 *(out++) = PRE_SIZE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
669 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
670 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
671 *out = PRE_REX;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
672 if (size == SZ_Q) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
673 *out |= REX_QUAD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
674 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
675 if (dst >= R8) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
676 *out |= REX_RM_FIELD;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
677 dst -= (R8 - X86_R8);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
678 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
679 out++;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
680 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
681 if (dst >= AH && dst <= BH) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
682 dst -= (AH-X86_AH);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
683 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
684 *(out++) = OP_MOV_IEA | (size == SZ_B ? 0 : BIT_SIZE);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
685 *(out++) = MODE_REG_DISPLACE8 | dst;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
686 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
687
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
688 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
689 if (size != SZ_B) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
690 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
691 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
692 if (size != SZ_W) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
693 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
694 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
695 val >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
696 *(out++) = val;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
697 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
698 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
699 return out;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
700 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
701
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
702 uint8_t * pushf(uint8_t * out)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
703 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
704 *(out++) = OP_PUSHF;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
705 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
706 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
707
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
708 uint8_t * popf(uint8_t * out)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
709 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
710 *(out++) = OP_POPF;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
711 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
712 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
713
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
714 uint8_t * push_r(uint8_t * out, uint8_t reg)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
715 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
716 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
717 *(out++) = PRE_REX | REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
718 reg -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
719 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
720 *(out++) = OP_PUSH | reg;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
721 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
722 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
723
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
724 uint8_t * pop_r(uint8_t * out, uint8_t reg)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
725 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
726 if (reg >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
727 *(out++) = PRE_REX | REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
728 reg -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
729 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
730 *(out++) = OP_POP | reg;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
731 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
732 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
733
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
734 uint8_t * setcc_r(uint8_t * out, uint8_t cc, uint8_t dst)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
735 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
736 if (dst >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
737 *(out++) = PRE_REX | REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
738 dst -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
739 } else if (dst >= RSP && dst <= RDI) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
740 *(out++) = PRE_REX;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
741 } else if (dst >= AH && dst <= BH) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
742 dst -= AH - X86_AH;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
743 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
744 *(out++) = PRE_2BYTE;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
745 *(out++) = OP2_SETCC | cc;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
746 *(out++) = MODE_REG_DIRECT | dst;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
747 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
748 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
749
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
750 uint8_t * setcc_rind(uint8_t * out, uint8_t cc, uint8_t dst)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
751 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
752 if (dst >= R8) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
753 *(out++) = PRE_REX | REX_RM_FIELD;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
754 dst -= R8 - X86_R8;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
755 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
756 *(out++) = PRE_2BYTE;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
757 *(out++) = OP2_SETCC | cc;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
758 *(out++) = MODE_REG_INDIRECT | dst;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
759 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
760 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
761
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
762 uint8_t * jcc(uint8_t * out, uint8_t cc, uint8_t * dest)
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
763 {
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
764 ptrdiff_t disp = dest-(out+2);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
765 if (disp <= 0x7F && disp >= -0x80) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
766 *(out++) = OP_JCC | cc;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
767 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
768 } else {
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
769 disp = dest-(out+6);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
770 if (disp <= 0x7FFFFFFF && disp >= -2147483648) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
771 *(out++) = PRE_2BYTE;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
772 *(out++) = OP2_JCC | cc;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
773 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
774 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
775 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
776 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
777 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
778 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
779 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
780 } else {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
781 printf("%p - %p = %lX\n", dest, out + 6, disp);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
782 return NULL;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
783 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
784 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
785 return out;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
786 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
787
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
788 uint8_t * jmp(uint8_t * out, uint8_t * dest)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
789 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
790 ptrdiff_t disp = dest-(out+2);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
791 if (disp <= 0x7F && disp >= -0x80) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
792 *(out++) = OP_JMP_BYTE;
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
793 *(out++) = disp;
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
794 } else {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
795 disp = dest-(out+5);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
796 if (disp <= 0x7FFFFFFF && disp >= -2147483648) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
797 *(out++) = OP_JMP;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
798 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
799 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
800 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
801 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
802 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
803 disp >>= 8;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
804 *(out++) = disp;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
805 } else {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
806 printf("%p - %p = %lX\n", dest, out + 6, disp);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
807 return NULL;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
808 }
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
809 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
810 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
811 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
812
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
813 uint8_t * call(uint8_t * out, uint8_t * fun)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
814 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
815 ptrdiff_t disp = fun-(out+5);
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
816 if (disp <= 0x7FFFFFFF && disp >= -2147483648) {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
817 *(out++) = OP_CALL;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
818 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
819 disp >>= 8;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
820 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
821 disp >>= 8;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
822 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
823 disp >>= 8;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
824 *(out++) = disp;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
825 } else {
18
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
826 //TODO: Implement far call???
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents: 15
diff changeset
827 printf("%p - %p = %lX\n", fun, out + 5, disp);
14
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
828 return NULL;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
829 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
830 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
831 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
832
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
833 uint8_t * retn(uint8_t * out)
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
834 {
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
835 *(out++) = OP_RETN;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
836 return out;
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
837 }
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
838
2bdad0f52f42 x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
839