Mercurial > repos > blastem
annotate z80_to_x86.c @ 1050:d06c947a9a77
Implement undoumented flag bits for DAA, CPL, SCF and CCF
author | Michael Pavone <pavone@retrodev.com> |
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date | Thu, 28 Jul 2016 23:37:46 -0700 |
parents | ef7ee9919a73 |
children | 11ff5726fd5e |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "z80inst.h" |
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7 #include "z80_to_x86.h" |
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8 #include "gen_x86.h" |
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9 #include "mem.h" |
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10 #include "util.h" |
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11 #include <stdio.h> |
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12 #include <stdlib.h> |
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13 #include <stddef.h> |
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14 #include <string.h> |
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15 |
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16 #define MODE_UNUSED (MODE_IMMED-1) |
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17 #define MAX_MCYCLE_LENGTH 6 |
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18 |
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19 //#define DO_DEBUG_PRINT |
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20 |
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21 #ifdef DO_DEBUG_PRINT |
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22 #define dprintf printf |
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23 #else |
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24 #define dprintf |
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25 #endif |
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26 |
652 | 27 uint32_t zbreakpoint_patch(z80_context * context, uint16_t address, code_ptr dst); |
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28 void z80_handle_deferred(z80_context * context); |
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29 |
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30 uint8_t z80_size(z80inst * inst) |
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31 { |
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32 uint8_t reg = (inst->reg & 0x1F); |
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33 if (reg != Z80_UNUSED && reg != Z80_USE_IMMED) { |
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34 return reg < Z80_BC ? SZ_B : SZ_W; |
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35 } |
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36 //TODO: Handle any necessary special cases |
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37 return SZ_B; |
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38 } |
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39 |
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40 uint8_t zf_off(uint8_t flag) |
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41 { |
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42 return offsetof(z80_context, flags) + flag; |
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43 } |
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44 |
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45 uint8_t zaf_off(uint8_t flag) |
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46 { |
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47 return offsetof(z80_context, alt_flags) + flag; |
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48 } |
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49 |
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50 uint8_t zr_off(uint8_t reg) |
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51 { |
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52 if (reg > Z80_A) { |
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53 reg = z80_low_reg(reg); |
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54 } |
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55 return offsetof(z80_context, regs) + reg; |
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56 } |
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57 |
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58 uint8_t zar_off(uint8_t reg) |
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59 { |
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60 if (reg > Z80_A) { |
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61 reg = z80_low_reg(reg); |
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62 } |
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63 return offsetof(z80_context, alt_regs) + reg; |
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64 } |
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65 |
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66 void zreg_to_native(z80_options *opts, uint8_t reg, uint8_t native_reg) |
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67 { |
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68 if (opts->regs[reg] >= 0) { |
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69 mov_rr(&opts->gen.code, opts->regs[reg], native_reg, reg > Z80_A ? SZ_W : SZ_B); |
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70 } else { |
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71 mov_rdispr(&opts->gen.code, opts->gen.context_reg, zr_off(reg), native_reg, reg > Z80_A ? SZ_W : SZ_B); |
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72 } |
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73 } |
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74 |
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75 void native_to_zreg(z80_options *opts, uint8_t native_reg, uint8_t reg) |
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76 { |
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77 if (opts->regs[reg] >= 0) { |
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78 mov_rr(&opts->gen.code, native_reg, opts->regs[reg], reg > Z80_A ? SZ_W : SZ_B); |
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79 } else { |
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80 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, zr_off(reg), reg > Z80_A ? SZ_W : SZ_B); |
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81 } |
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82 } |
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83 |
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84 void translate_z80_reg(z80inst * inst, host_ea * ea, z80_options * opts) |
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85 { |
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86 code_info *code = &opts->gen.code; |
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87 if (inst->reg == Z80_USE_IMMED) { |
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88 ea->mode = MODE_IMMED; |
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89 ea->disp = inst->immed; |
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90 } else if ((inst->reg & 0x1F) == Z80_UNUSED) { |
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91 ea->mode = MODE_UNUSED; |
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92 } else { |
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93 ea->mode = MODE_REG_DIRECT; |
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94 if (inst->reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
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95 if ((inst->addr_mode & 0x1F) == Z80_REG && inst->ea_reg == Z80_IYL) { |
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96 mov_rr(code, opts->regs[Z80_IY], opts->gen.scratch1, SZ_W); |
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97 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
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98 ea->base = opts->gen.scratch1; |
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99 } else { |
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100 ea->base = opts->regs[Z80_IYL]; |
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101 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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102 } |
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103 } else if(opts->regs[inst->reg] >= 0) { |
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104 ea->base = opts->regs[inst->reg]; |
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105 if (ea->base >= AH && ea->base <= BH) { |
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106 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
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107 uint8_t other_reg = opts->regs[inst->ea_reg]; |
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108 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
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109 //we can't mix an *H reg with a register that requires the REX prefix |
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110 ea->base = opts->regs[z80_low_reg(inst->reg)]; |
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111 ror_ir(code, 8, ea->base, SZ_W); |
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112 } |
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113 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { |
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114 //temp regs require REX prefix too |
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115 ea->base = opts->regs[z80_low_reg(inst->reg)]; |
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116 ror_ir(code, 8, ea->base, SZ_W); |
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117 } |
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118 } |
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119 } else { |
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120 ea->mode = MODE_REG_DISPLACE8; |
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121 ea->base = opts->gen.context_reg; |
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122 ea->disp = zr_off(inst->reg); |
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123 } |
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124 } |
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125 } |
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126 |
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127 void z80_save_reg(z80inst * inst, z80_options * opts) |
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128 { |
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129 code_info *code = &opts->gen.code; |
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130 if (inst->reg == Z80_USE_IMMED || inst->reg == Z80_UNUSED) { |
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131 return; |
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132 } |
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133 if (inst->reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
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134 if ((inst->addr_mode & 0x1F) == Z80_REG && inst->ea_reg == Z80_IYL) { |
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135 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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136 mov_rr(code, opts->gen.scratch1, opts->regs[Z80_IYL], SZ_B); |
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137 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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138 } else { |
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139 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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140 } |
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141 } else if (opts->regs[inst->reg] >= AH && opts->regs[inst->reg] <= BH) { |
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142 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
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143 uint8_t other_reg = opts->regs[inst->ea_reg]; |
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144 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
268
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145 //we can't mix an *H reg with a register that requires the REX prefix |
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146 ror_ir(code, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W); |
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147 } |
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148 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { |
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149 //temp regs require REX prefix too |
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150 ror_ir(code, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W); |
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151 } |
213
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152 } |
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153 } |
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154 |
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155 void translate_z80_ea(z80inst * inst, host_ea * ea, z80_options * opts, uint8_t read, uint8_t modify) |
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156 { |
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157 code_info *code = &opts->gen.code; |
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158 uint8_t size, areg; |
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159 int8_t reg; |
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160 ea->mode = MODE_REG_DIRECT; |
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161 areg = read ? opts->gen.scratch1 : opts->gen.scratch2; |
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162 switch(inst->addr_mode & 0x1F) |
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163 { |
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164 case Z80_REG: |
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165 if (inst->ea_reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
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166 if (inst->reg == Z80_IYL) { |
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167 mov_rr(code, opts->regs[Z80_IY], opts->gen.scratch1, SZ_W); |
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168 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
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169 ea->base = opts->gen.scratch1; |
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170 } else { |
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171 ea->base = opts->regs[Z80_IYL]; |
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172 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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173 } |
651
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Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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174 } else if(opts->regs[inst->ea_reg] >= 0) { |
213
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175 ea->base = opts->regs[inst->ea_reg]; |
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176 if (ea->base >= AH && ea->base <= BH && inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED) { |
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177 uint8_t other_reg = opts->regs[inst->reg]; |
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178 #ifdef X86_64 |
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179 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
267
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180 //we can't mix an *H reg with a register that requires the REX prefix |
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181 ea->base = opts->regs[z80_low_reg(inst->ea_reg)]; |
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182 ror_ir(code, 8, ea->base, SZ_W); |
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183 } |
666
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184 #endif |
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185 } |
651
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Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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186 } else { |
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|
187 ea->mode = MODE_REG_DISPLACE8; |
659
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188 ea->base = opts->gen.context_reg; |
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189 ea->disp = zr_off(inst->ea_reg); |
213
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190 } |
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191 break; |
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192 case Z80_REG_INDIRECT: |
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193 zreg_to_native(opts, inst->ea_reg, areg); |
213
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194 size = z80_size(inst); |
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195 if (read) { |
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196 if (modify) { |
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197 //push_r(code, opts->gen.scratch1); |
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198 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
213
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199 } |
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200 if (size == SZ_B) { |
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|
201 call(code, opts->read_8); |
213
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|
202 } else { |
591
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|
203 call(code, opts->read_16); |
213
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|
204 } |
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|
205 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
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506
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|
206 ea->base = opts->gen.scratch1; |
213
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207 break; |
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|
208 case Z80_IMMED: |
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|
209 ea->mode = MODE_IMMED; |
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|
210 ea->disp = inst->immed; |
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|
211 break; |
4d4559b04c59
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|
212 case Z80_IMMED_INDIRECT: |
591
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213 mov_ir(code, inst->immed, areg, SZ_W); |
213
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|
214 size = z80_size(inst); |
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|
215 if (read) { |
277
765e132edd71
Using push/pop inside translated code is not compatible with the current way the Z80 core returns to the caller
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216 /*if (modify) { |
591
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217 push_r(code, opts->gen.scratch1); |
277
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218 }*/ |
213
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219 if (size == SZ_B) { |
593
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220 call(code, opts->read_8); |
213
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221 } else { |
593
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222 call(code, opts->read_16); |
213
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|
223 } |
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|
224 } |
590
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WIP effort to update z80 core for code gen changes
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225 ea->base = opts->gen.scratch1; |
213
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226 break; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
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213
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227 case Z80_IX_DISPLACE: |
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213
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228 case Z80_IY_DISPLACE: |
731
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229 zreg_to_native(opts, (inst->addr_mode & 0x1F) == Z80_IX_DISPLACE ? Z80_IX : Z80_IY, areg); |
591
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230 add_ir(code, inst->ea_reg & 0x80 ? inst->ea_reg - 256 : inst->ea_reg, areg, SZ_W); |
213
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|
231 size = z80_size(inst); |
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232 if (read) { |
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233 if (modify) { |
591
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234 //push_r(code, opts->gen.scratch1); |
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235 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
213
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|
236 } |
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|
237 if (size == SZ_B) { |
593
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|
238 call(code, opts->read_8); |
213
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|
239 } else { |
593
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|
240 call(code, opts->read_16); |
213
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|
241 } |
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|
242 } |
590
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diff
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|
243 ea->base = opts->gen.scratch1; |
213
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244 break; |
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|
245 case Z80_UNUSED: |
235
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213
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|
246 ea->mode = MODE_UNUSED; |
213
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|
247 break; |
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248 default: |
792
724bbec47f86
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249 fatal_error("Unrecognized Z80 addressing mode %d\n", inst->addr_mode & 0x1F); |
213
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|
250 } |
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|
251 } |
4d4559b04c59
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|
252 |
591
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|
253 void z80_save_ea(code_info *code, z80inst * inst, z80_options * opts) |
213
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|
254 { |
267
1788e3f29c28
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266
diff
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|
255 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
731
0835cd3dfc36
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730
diff
changeset
|
256 if (inst->ea_reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
312
cf7ecda060c7
Properly handle instructions that use boty IYH and IYL
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311
diff
changeset
|
257 if (inst->reg == Z80_IYL) { |
591
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|
258 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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|
259 mov_rr(code, opts->gen.scratch1, opts->regs[Z80_IYL], SZ_B); |
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changeset
|
260 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
312
cf7ecda060c7
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311
diff
changeset
|
261 } else { |
591
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changeset
|
262 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
312
cf7ecda060c7
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311
diff
changeset
|
263 } |
267
1788e3f29c28
Don't mix *H regs with the REX prefix
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266
diff
changeset
|
264 } else if (inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
1788e3f29c28
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266
diff
changeset
|
265 uint8_t other_reg = opts->regs[inst->reg]; |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
266 #ifdef X86_64 |
269
3c054d977175
Fix IX/IY displace modes. Fix check for registers requiring REX.
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268
diff
changeset
|
267 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
267
1788e3f29c28
Don't mix *H regs with the REX prefix
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266
diff
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|
268 //we can't mix an *H reg with a register that requires the REX prefix |
591
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changeset
|
269 ror_ir(code, 8, opts->regs[z80_low_reg(inst->ea_reg)], SZ_W); |
267
1788e3f29c28
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266
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|
270 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
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665
diff
changeset
|
271 #endif |
267
1788e3f29c28
Don't mix *H regs with the REX prefix
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266
diff
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|
272 } |
213
4d4559b04c59
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|
273 } |
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|
274 } |
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|
275 |
593
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|
276 void z80_save_result(z80_options *opts, z80inst * inst) |
213
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|
277 { |
253
3b34deba4ca0
Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
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252
diff
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|
278 switch(inst->addr_mode & 0x1f) |
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|
279 { |
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Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
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|
280 case Z80_REG_INDIRECT: |
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|
281 case Z80_IMMED_INDIRECT: |
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|
282 case Z80_IX_DISPLACE: |
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|
283 case Z80_IY_DISPLACE: |
1045
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Implement half-carry for INC, DEC and NEG
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|
284 if (inst->op != Z80_LD) { |
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|
285 mov_rdispr(&opts->gen.code, opts->gen.context_reg, offsetof(z80_context, scratch1), opts->gen.scratch2, SZ_W); |
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|
286 } |
253
3b34deba4ca0
Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
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|
287 if (z80_size(inst) == SZ_B) { |
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|
288 call(&opts->gen.code, opts->write_8); |
253
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|
289 } else { |
593
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|
290 call(&opts->gen.code, opts->write_16_lowfirst); |
253
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|
291 } |
213
4d4559b04c59
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|
292 } |
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|
293 } |
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|
294 |
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changeset
|
295 enum { |
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|
296 DONT_READ=0, |
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|
297 READ |
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|
298 }; |
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|
299 |
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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|
300 enum { |
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|
301 DONT_MODIFY=0, |
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|
302 MODIFY |
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303 }; |
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304 |
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305 void z80_print_regs_exit(z80_context * context) |
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306 { |
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307 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\nSP: %X\n\nIM: %d, IFF1: %d, IFF2: %d\n", |
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308 context->regs[Z80_A], context->regs[Z80_B], context->regs[Z80_C], |
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309 context->regs[Z80_D], context->regs[Z80_E], |
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310 (context->regs[Z80_H] << 8) | context->regs[Z80_L], |
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311 (context->regs[Z80_IXH] << 8) | context->regs[Z80_IXL], |
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312 (context->regs[Z80_IYH] << 8) | context->regs[Z80_IYL], |
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313 context->sp, context->im, context->iff1, context->iff2); |
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314 puts("--Alternate Regs--"); |
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315 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\n", |
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316 context->alt_regs[Z80_A], context->alt_regs[Z80_B], context->alt_regs[Z80_C], |
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317 context->alt_regs[Z80_D], context->alt_regs[Z80_E], |
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318 (context->alt_regs[Z80_H] << 8) | context->alt_regs[Z80_L], |
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319 (context->alt_regs[Z80_IXH] << 8) | context->alt_regs[Z80_IXL], |
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320 (context->alt_regs[Z80_IYH] << 8) | context->alt_regs[Z80_IYL]); |
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321 exit(0); |
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322 } |
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323 |
652 | 324 void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, uint8_t interp) |
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325 { |
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326 uint32_t num_cycles; |
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327 host_ea src_op, dst_op; |
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328 uint8_t size; |
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329 z80_options *opts = context->options; |
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330 uint8_t * start = opts->gen.code.cur; |
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331 code_info *code = &opts->gen.code; |
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332 if (!interp) { |
652 | 333 check_cycles_int(&opts->gen, address); |
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334 if (context->breakpoint_flags[address / 8] & (1 << (address % 8))) { |
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335 zbreakpoint_patch(context, address, start); |
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336 } |
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337 num_cycles = 4 * inst->opcode_bytes; |
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338 add_ir(code, inst->opcode_bytes > 1 ? 2 : 1, opts->regs[Z80_R], SZ_B); |
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339 #ifdef Z80_LOG_ADDRESS |
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340 log_address(&opts->gen, address, "Z80: %X @ %d\n"); |
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341 #endif |
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342 } |
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343 switch(inst->op) |
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344 { |
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345 case Z80_LD: |
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346 size = z80_size(inst); |
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347 switch (inst->addr_mode & 0x1F) |
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348 { |
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349 case Z80_REG: |
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350 case Z80_REG_INDIRECT: |
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351 if (size != SZ_B) { |
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352 num_cycles += 2; |
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353 } |
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354 if (inst->reg == Z80_I || inst->ea_reg == Z80_I || inst->reg == Z80_R || inst->ea_reg == Z80_R) { |
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355 num_cycles += 1; |
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356 } |
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357 break; |
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358 case Z80_IMMED: |
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359 num_cycles += size == SZ_B ? 3 : 6; |
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360 break; |
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361 case Z80_IMMED_INDIRECT: |
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362 num_cycles += 6; |
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363 break; |
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364 case Z80_IX_DISPLACE: |
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365 case Z80_IY_DISPLACE: |
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366 num_cycles = 8; //3 for displacement, 5 for address addition |
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367 break; |
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368 } |
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369 cycles(&opts->gen, num_cycles); |
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370 if (inst->addr_mode & Z80_DIR) { |
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371 translate_z80_ea(inst, &dst_op, opts, DONT_READ, MODIFY); |
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372 translate_z80_reg(inst, &src_op, opts); |
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373 } else { |
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374 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
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375 translate_z80_reg(inst, &dst_op, opts); |
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376 } |
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377 if (inst->reg == Z80_R) { |
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378 mov_rr(code, opts->regs[Z80_A], opts->gen.scratch1, SZ_B); |
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379 mov_rr(code, opts->regs[Z80_A], opts->regs[Z80_R], SZ_B); |
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380 and_ir(code, 0x80, opts->gen.scratch1, SZ_B); |
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381 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zr_off(Z80_R), SZ_B); |
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382 } else if (inst->ea_reg == Z80_R && inst->addr_mode == Z80_REG) { |
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383 mov_rr(code, opts->regs[Z80_R], opts->regs[Z80_A], SZ_B); |
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384 and_ir(code, 0x7F, opts->regs[Z80_A], SZ_B); |
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385 or_rdispr(code, opts->gen.context_reg, zr_off(Z80_R), opts->regs[Z80_A], SZ_B); |
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386 } else if (src_op.mode == MODE_REG_DIRECT) { |
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387 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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388 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, size); |
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389 } else { |
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390 mov_rr(code, src_op.base, dst_op.base, size); |
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391 } |
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392 } else if(src_op.mode == MODE_IMMED) { |
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393 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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394 mov_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, size); |
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395 } else { |
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396 mov_ir(code, src_op.disp, dst_op.base, size); |
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397 } |
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398 } else { |
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399 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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parents:
729
diff
changeset
|
400 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, size); |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
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401 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, size); |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
402 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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parents:
729
diff
changeset
|
403 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, size); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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parents:
729
diff
changeset
|
404 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
405 } |
842 | 406 if ((inst->ea_reg == Z80_I || inst->ea_reg == Z80_R) && inst->addr_mode == Z80_REG) { |
407 //ld a, i and ld a, r sets some flags | |
652 | 408 cmp_ir(code, 0, dst_op.base, SZ_B); |
409 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); | |
410 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); | |
821
21a69dfb6ee7
Implement half carry for a couple of the trivial cases
Michael Pavone <pavone@retrodev.com>
parents:
819
diff
changeset
|
411 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B);; |
652 | 412 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B);; |
659
759c38bf97f8
Minor Z80 core cleanup
Michael Pavone <pavone@retrodev.com>
parents:
657
diff
changeset
|
413 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, iff2), opts->gen.scratch1, SZ_B); |
652 | 414 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
415 } |
591
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Get Z80 core back into compileable state
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diff
changeset
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416 z80_save_reg(inst, opts); |
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diff
changeset
|
417 z80_save_ea(code, inst, opts); |
235
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213
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changeset
|
418 if (inst->addr_mode & Z80_DIR) { |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
419 z80_save_result(opts, inst); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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parents:
diff
changeset
|
420 } |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
421 break; |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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parents:
diff
changeset
|
422 case Z80_PUSH: |
1044
1625555e346e
Properly handle redundant prefixes
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parents:
1043
diff
changeset
|
423 cycles(&opts->gen, num_cycles + 1); |
591
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424 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
235
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changeset
|
425 if (inst->reg == Z80_AF) { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
426 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
591
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|
427 shl_ir(code, 8, opts->gen.scratch1, SZ_W); |
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Partial support for undocumented flag bits
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428 mov_rdispr(code, opts->gen.context_reg, zf_off(ZF_XY), opts->gen.scratch1, SZ_B); |
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changeset
|
429 and_ir(code, 0x28, opts->gen.scratch1, SZ_B); |
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Partial support for undocumented flag bits
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changeset
|
430 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_C), opts->gen.scratch1, SZ_B); |
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Partial support for undocumented flag bits
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changeset
|
431 ror_ir(code, 1, opts->gen.scratch1, SZ_B); |
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Partial support for undocumented flag bits
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432 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_N), opts->gen.scratch1, SZ_B); |
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changeset
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433 ror_ir(code, 1, opts->gen.scratch1, SZ_B); |
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changeset
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434 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_PV), opts->gen.scratch1, SZ_B); |
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435 ror_ir(code, 2, opts->gen.scratch1, SZ_B); |
591
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436 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_H), opts->gen.scratch1, SZ_B); |
1049
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437 ror_ir(code, 2, opts->gen.scratch1, SZ_B); |
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438 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_Z), opts->gen.scratch1, SZ_B); |
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parents:
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changeset
|
439 ror_ir(code, 1, opts->gen.scratch1, SZ_B); |
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changeset
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440 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_S), opts->gen.scratch1, SZ_B); |
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441 ror_ir(code, 1, opts->gen.scratch1, SZ_B); |
235
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Get Z80 core working for simple programs
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442 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
443 zreg_to_native(opts, inst->reg, opts->gen.scratch1); |
235
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444 } |
591
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diff
changeset
|
445 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
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446 call(code, opts->write_16_highfirst); |
235
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447 //no call to save_z80_reg needed since there's no chance we'll use the only |
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parents:
213
diff
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|
448 //the upper half of a register pair |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
449 break; |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
450 case Z80_POP: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
451 cycles(&opts->gen, num_cycles); |
591
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
452 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
453 call(code, opts->read_16); |
591
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Get Z80 core back into compileable state
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diff
changeset
|
454 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
235
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213
diff
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455 if (inst->reg == Z80_AF) { |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
456 |
591
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
457 bt_ir(code, 0, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
458 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
459 bt_ir(code, 1, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
460 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_N)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
461 bt_ir(code, 2, opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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590
diff
changeset
|
462 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
463 bt_ir(code, 4, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
464 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
465 bt_ir(code, 6, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
466 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
467 bt_ir(code, 7, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
468 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_S)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
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parents:
1048
diff
changeset
|
469 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
470 shr_ir(code, 8, opts->gen.scratch1, SZ_W); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
471 native_to_zreg(opts, opts->gen.scratch1, Z80_A); |
235
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Get Z80 core working for simple programs
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213
diff
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|
472 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
473 native_to_zreg(opts, opts->gen.scratch1, inst->reg); |
235
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474 } |
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
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|
475 //no call to save_z80_reg needed since there's no chance we'll use the only |
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
476 //the upper half of a register pair |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
477 break; |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
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239
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changeset
|
478 case Z80_EX: |
591
966b46c68942
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diff
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|
479 cycles(&opts->gen, num_cycles); |
241
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239
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480 if (inst->addr_mode == Z80_REG) { |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
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parents:
239
diff
changeset
|
481 if(inst->reg == Z80_AF) { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
482 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
483 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_A), opts->gen.scratch2, SZ_B); |
591
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diff
changeset
|
484 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_A), SZ_B); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
485 native_to_zreg(opts, opts->gen.scratch2, Z80_A); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
486 |
241
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487 //Flags are currently word aligned, so we can move |
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488 //them efficiently a word at a time |
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489 for (int f = ZF_C; f < ZF_NUM; f+=2) { |
591
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changeset
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490 mov_rdispr(code, opts->gen.context_reg, zf_off(f), opts->gen.scratch1, SZ_W); |
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changeset
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491 mov_rdispr(code, opts->gen.context_reg, zaf_off(f), opts->gen.scratch2, SZ_W); |
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changeset
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492 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zaf_off(f), SZ_W); |
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changeset
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493 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(f), SZ_W); |
241
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494 } |
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495 } else { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
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496 if (opts->regs[Z80_DE] >= 0 && opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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parents:
716
diff
changeset
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497 xchg_rr(code, opts->regs[Z80_DE], opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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parents:
716
diff
changeset
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498 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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parents:
716
diff
changeset
|
499 zreg_to_native(opts, Z80_DE, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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parents:
716
diff
changeset
|
500 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
501 native_to_zreg(opts, opts->gen.scratch1, Z80_HL); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
502 native_to_zreg(opts, opts->gen.scratch2, Z80_DE); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
503 } |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
504 } |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
505 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
506 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
507 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
508 if (opts->regs[inst->reg] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
509 xchg_rr(code, opts->regs[inst->reg], opts->gen.scratch1, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
510 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
511 zreg_to_native(opts, inst->reg, opts->gen.scratch2); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
512 xchg_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
513 native_to_zreg(opts, opts->gen.scratch2, inst->reg); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
514 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
515 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
516 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
517 cycles(&opts->gen, 1); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
518 uint8_t high_reg = z80_high_reg(inst->reg); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
519 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
520 add_ir(code, 1, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
521 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
522 if (opts->regs[inst->reg] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
523 //even though some of the upper halves can be used directly |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
524 //the limitations on mixing *H regs with the REX prefix |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
525 //prevent us from taking advantage of it |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
526 uint8_t use_reg = opts->regs[inst->reg]; |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
527 ror_ir(code, 8, use_reg, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
528 xchg_rr(code, use_reg, opts->gen.scratch1, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
529 //restore reg to normal rotation |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
530 ror_ir(code, 8, use_reg, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
531 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
532 zreg_to_native(opts, high_reg, opts->gen.scratch2); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
533 xchg_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
534 native_to_zreg(opts, opts->gen.scratch2, high_reg); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
535 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
536 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
537 add_ir(code, 1, opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
538 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
539 cycles(&opts->gen, 2); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
540 } |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
541 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
542 case Z80_EXX: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
543 cycles(&opts->gen, num_cycles); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
544 zreg_to_native(opts, Z80_BC, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
545 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_BC), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
546 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
547 native_to_zreg(opts, opts->gen.scratch2, Z80_BC); |
840
5822c6e5642f
Fix timing of IM instruction
Michael Pavone <pavone@retrodev.com>
parents:
828
diff
changeset
|
548 |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
549 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
550 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_HL), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
551 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
552 native_to_zreg(opts, opts->gen.scratch2, Z80_HL); |
840
5822c6e5642f
Fix timing of IM instruction
Michael Pavone <pavone@retrodev.com>
parents:
828
diff
changeset
|
553 |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
554 zreg_to_native(opts, Z80_DE, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
555 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_DE), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
556 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
557 native_to_zreg(opts, opts->gen.scratch2, Z80_DE); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
558 break; |
272 | 559 case Z80_LDI: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
560 cycles(&opts->gen, num_cycles); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
561 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
562 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
563 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
564 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
565 cycles(&opts->gen, 2); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
566 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
567 add_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
568 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
569 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
570 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
571 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
572 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
573 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
574 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
575 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
576 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
577 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
578 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
579 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
580 } |
821
21a69dfb6ee7
Implement half carry for a couple of the trivial cases
Michael Pavone <pavone@retrodev.com>
parents:
819
diff
changeset
|
581 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
582 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
583 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
272 | 584 break; |
585 } | |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
586 case Z80_LDIR: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
587 cycles(&opts->gen, num_cycles); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
588 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
589 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
590 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
591 call(code, opts->write_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
592 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
593 add_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
594 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
595 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
596 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
597 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
598 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
599 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
600 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
601 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
602 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
603 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
604 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
605 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
606 } |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
607 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
608 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
609 uint8_t * cont = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
610 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
611 cycles(&opts->gen, 7); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
612 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
613 jmp(code, start); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
614 *cont = code->cur - (cont + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
615 cycles(&opts->gen, 2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
616 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
617 break; |
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
618 } |
273 | 619 case Z80_LDD: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
620 cycles(&opts->gen, num_cycles); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
621 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
622 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
623 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
624 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
625 cycles(&opts->gen, 2); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
626 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
627 sub_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
628 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
629 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
630 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
631 if (opts->regs[Z80_HL] >= 0) { |
828
22c3c52b9871
Fixed a copy pasta error in the implementation of LDD and LDDR. HL should be decremented and not incremented in those instructions.
Michael Pavone <pavone@retrodev.com>
parents:
821
diff
changeset
|
632 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
633 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
634 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
635 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
636 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
637 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
638 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
639 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
640 } |
821
21a69dfb6ee7
Implement half carry for a couple of the trivial cases
Michael Pavone <pavone@retrodev.com>
parents:
819
diff
changeset
|
641 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
642 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
643 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
273 | 644 break; |
645 } | |
646 case Z80_LDDR: { | |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
647 cycles(&opts->gen, num_cycles); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
648 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
649 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
650 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
651 call(code, opts->write_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
652 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
653 sub_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
654 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
655 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
656 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
657 if (opts->regs[Z80_HL] >= 0) { |
828
22c3c52b9871
Fixed a copy pasta error in the implementation of LDD and LDDR. HL should be decremented and not incremented in those instructions.
Michael Pavone <pavone@retrodev.com>
parents:
821
diff
changeset
|
658 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
659 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
660 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
661 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
662 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
663 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
664 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
665 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
666 } |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
667 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
668 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
669 uint8_t * cont = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
670 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
671 cycles(&opts->gen, 7); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
672 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
673 jmp(code, start); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
674 *cont = code->cur - (cont + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
675 cycles(&opts->gen, 2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
676 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
273 | 677 break; |
678 } | |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
679 case Z80_CPI: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
680 cycles(&opts->gen, num_cycles);//T-States 4,4 |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
681 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
682 call(code, opts->read_8);//T-States 3 |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
683 mov_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
684 sub_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
685 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
686 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
687 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
688 xor_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
689 xor_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
690 bt_ir(code, 4, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
691 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
692 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
693 if (opts->regs[Z80_HL] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
694 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
695 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
696 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
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697 } |
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Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
698 if (opts->regs[Z80_BC] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
699 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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|
700 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
701 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
702 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
703 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
704 break; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
705 case Z80_CPIR: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
706 cycles(&opts->gen, num_cycles);//T-States 4,4 |
1043
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Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
707 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
708 call(code, opts->read_8);//T-States 3 |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
709 mov_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
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changeset
|
710 sub_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
1043
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Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
711 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
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Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
712 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
713 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
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changeset
|
714 xor_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
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changeset
|
715 xor_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
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|
716 bt_ir(code, 4, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
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717 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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718 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
719 if (opts->regs[Z80_HL] >= 0) { |
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Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
720 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
721 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
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722 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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723 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
724 if (opts->regs[Z80_BC] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
725 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
726 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
727 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
728 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
729 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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|
730 uint8_t * cont = code->cur+1; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
731 jcc(code, CC_Z, code->cur+2); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
732 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
733 uint8_t * cont2 = code->cur+1; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
734 jcc(code, CC_Z, code->cur+2); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
735 //repeat case |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
736 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
737 jmp(code, start); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
738 *cont = code->cur - (cont + 1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
739 *cont2 = code->cur - (cont2 + 1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
740 break; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
741 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
742 case Z80_CPD: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
743 cycles(&opts->gen, num_cycles);//T-States 4,4 |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
744 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
745 call(code, opts->read_8);//T-States 3 |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
746 mov_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
747 sub_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
748 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
749 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
750 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
751 xor_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
752 xor_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
753 bt_ir(code, 4, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
754 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
755 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
756 if (opts->regs[Z80_HL] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
757 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
758 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
759 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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|
760 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
761 if (opts->regs[Z80_BC] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
762 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
763 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
764 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
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changeset
|
765 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
766 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
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changeset
|
767 break; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
768 case Z80_CPDR: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
769 cycles(&opts->gen, num_cycles);//T-States 4,4 |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
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changeset
|
770 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
771 call(code, opts->read_8);//T-States 3 |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
772 mov_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
773 sub_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
774 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
775 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
776 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
777 xor_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
778 xor_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
779 bt_ir(code, 4, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
780 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
781 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
782 if (opts->regs[Z80_HL] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
783 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
784 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
785 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
786 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
787 if (opts->regs[Z80_BC] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
788 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
789 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
790 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
791 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
792 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
793 uint8_t * cont = code->cur+1; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
794 jcc(code, CC_Z, code->cur+2); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
795 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
796 uint8_t * cont2 = code->cur+1; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
797 jcc(code, CC_Z, code->cur+2); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
798 //repeat case |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
799 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
800 jmp(code, start); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
801 *cont = code->cur - (cont + 1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
802 *cont2 = code->cur - (cont2 + 1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
803 break; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
804 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
805 case Z80_ADD: |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
806 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
807 num_cycles += 8; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
808 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
809 num_cycles += 3; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
810 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
811 num_cycles += 4; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
812 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
813 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
814 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
815 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
816 if (dst_op.mode == MODE_REG_DIRECT) { |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
817 mov_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
818 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
819 mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
820 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
821 if (src_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
822 xor_rr(code, src_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
823 } else if (src_op.mode == MODE_IMMED) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
824 xor_ir(code, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
825 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
826 xor_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
827 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
828 if (dst_op.mode == MODE_REG_DIRECT) { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
829 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
830 add_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
831 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
832 add_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
833 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
834 add_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
835 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
836 if (z80_size(inst) == SZ_B) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
837 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
838 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
839 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
840 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
841 add_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
842 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
843 add_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
844 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
845 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
846 add_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
847 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
848 mov_rdispr(code, dst_op.base, dst_op.disp + z80_size(inst) == SZ_B ? 0 : 8, opts->gen.scratch1, SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
849 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
850 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
851 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
852 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
853 if (z80_size(inst) == SZ_B) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
854 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
855 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
856 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
857 } |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
858 if (dst_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
859 xor_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
860 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
861 xor_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
862 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
863 bt_ir(code, z80_size(inst) == SZ_B ? 4 : 12, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
864 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
865 if (z80_size(inst) == SZ_W & dst_op.mode == MODE_REG_DIRECT) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
866 mov_rr(code, dst_op.base, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
867 shr_ir(code, 8, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
868 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
869 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
870 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
871 z80_save_ea(code, inst, opts); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
872 break; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
873 case Z80_ADC: |
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
874 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
875 num_cycles += 8; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
876 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
877 num_cycles += 3; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
878 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
879 num_cycles += 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
880 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
881 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
882 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
883 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
884 if (dst_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
885 mov_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
886 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
887 mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
888 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
889 if (src_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
890 xor_rr(code, src_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
891 } else if (src_op.mode == MODE_IMMED) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
892 xor_ir(code, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
893 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
894 xor_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
895 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
896 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
897 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
898 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
899 adc_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
900 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
901 adc_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
902 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
903 adc_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
904 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
905 if (z80_size(inst) == SZ_B) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
906 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
907 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
908 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
909 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
910 adc_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
911 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
912 adc_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
913 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
914 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
915 adc_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
916 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
917 mov_rdispr(code, dst_op.base, dst_op.disp + z80_size(inst) == SZ_B ? 0 : 8, opts->gen.scratch1, SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
918 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
919 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
920 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
921 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
922 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
923 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
924 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
925 if (dst_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
926 xor_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
927 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
928 xor_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
929 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
930 bt_ir(code, z80_size(inst) == SZ_B ? 4 : 12, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
931 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
932 if (z80_size(inst) == SZ_W & dst_op.mode == MODE_REG_DIRECT) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
933 mov_rr(code, dst_op.base, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
934 shr_ir(code, 8, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
935 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
936 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
937 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
938 z80_save_ea(code, inst, opts); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
939 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
940 case Z80_SUB: |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
941 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
942 num_cycles += 8; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
943 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
944 num_cycles += 3; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
945 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
946 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
947 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
948 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
949 if (dst_op.mode == MODE_REG_DIRECT) { |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
950 mov_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
951 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
952 mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
953 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
954 if (src_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
955 xor_rr(code, src_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
956 } else if (src_op.mode == MODE_IMMED) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
957 xor_ir(code, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
958 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
959 xor_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
960 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
961 if (dst_op.mode == MODE_REG_DIRECT) { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
962 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
963 sub_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
964 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
965 sub_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
966 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
967 sub_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
968 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
969 if (z80_size(inst) == SZ_B) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
970 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
971 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
972 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
973 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
974 sub_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
975 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
976 sub_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
977 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
978 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
979 sub_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
980 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
981 mov_rdispr(code, dst_op.base, dst_op.disp + z80_size(inst) == SZ_B ? 0 : 8, opts->gen.scratch1, SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
982 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
983 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
984 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
985 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
986 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
987 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
988 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
989 if (dst_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
990 xor_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
991 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
992 xor_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
993 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
994 bt_ir(code, z80_size(inst) == SZ_B ? 4 : 12, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
995 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
996 if (z80_size(inst) == SZ_W & dst_op.mode == MODE_REG_DIRECT) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
997 mov_rr(code, dst_op.base, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
998 shr_ir(code, 8, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
999 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1000 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1001 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1002 z80_save_ea(code, inst, opts); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1003 break; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1004 case Z80_SBC: |
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1005 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1006 num_cycles += 8; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1007 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1008 num_cycles += 3; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1009 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1010 num_cycles += 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1011 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1012 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1013 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1014 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1015 if (dst_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1016 mov_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1017 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1018 mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1019 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1020 if (src_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1021 xor_rr(code, src_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1022 } else if (src_op.mode == MODE_IMMED) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1023 xor_ir(code, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1024 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1025 xor_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1026 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1027 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1028 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1029 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1030 sbb_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1031 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1032 sbb_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1033 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1034 sbb_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1035 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1036 if (z80_size(inst) == SZ_B) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1037 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1038 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1039 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1040 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1041 sbb_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1042 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1043 sbb_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1044 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1045 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1046 sbb_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1047 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1048 mov_rdispr(code, dst_op.base, dst_op.disp + z80_size(inst) == SZ_B ? 0 : 8, opts->gen.scratch1, SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1049 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1050 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1051 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1052 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1053 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1054 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1055 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1056 if (dst_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1057 xor_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1058 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1059 xor_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1060 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1061 bt_ir(code, z80_size(inst) == SZ_B ? 4 : 12, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1062 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1063 if (z80_size(inst) == SZ_W & dst_op.mode == MODE_REG_DIRECT) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1064 mov_rr(code, dst_op.base, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1065 shr_ir(code, 8, opts->gen.scratch2, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1066 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1067 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1068 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1069 z80_save_ea(code, inst, opts); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
1070 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1071 case Z80_AND: |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1072 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1073 num_cycles += 8; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1074 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1075 num_cycles += 3; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1076 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1077 num_cycles += 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1078 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1079 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1080 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1081 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1082 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1083 and_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1084 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1085 and_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1086 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1087 and_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1088 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1089 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1090 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1091 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1092 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1093 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1094 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1095 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1096 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1097 z80_save_ea(code, inst, opts); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1098 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1099 case Z80_OR: |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1100 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1101 num_cycles += 8; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1102 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1103 num_cycles += 3; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1104 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1105 num_cycles += 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1106 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1107 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1108 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1109 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1110 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1111 or_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1112 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1113 or_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1114 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1115 or_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1116 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1117 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1118 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1119 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1120 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1121 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1122 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1123 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1124 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1125 z80_save_ea(code, inst, opts); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1126 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1127 case Z80_XOR: |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1128 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1129 num_cycles += 8; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1130 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1131 num_cycles += 3; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1132 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1133 num_cycles += 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1134 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1135 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1136 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1137 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1138 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1139 xor_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1140 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1141 xor_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1142 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1143 xor_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1144 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1145 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1146 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1147 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1148 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1149 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1150 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1151 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1152 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1153 z80_save_ea(code, inst, opts); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1154 break; |
242 | 1155 case Z80_CP: |
1156 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { | |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1157 num_cycles += 8; |
242 | 1158 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1159 num_cycles += 3; |
242 | 1160 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1161 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1162 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1163 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1164 mov_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
242 | 1165 if (src_op.mode == MODE_REG_DIRECT) { |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1166 sub_rr(code, src_op.base, opts->gen.scratch2, z80_size(inst)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1167 mov_rrdisp(code, src_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1168 } else if (src_op.mode == MODE_IMMED) { |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1169 sub_ir(code, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1170 mov_irdisp(code, src_op.disp, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
242 | 1171 } else { |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1172 sub_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1173 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1174 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
242 | 1175 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1176 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1177 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1178 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1179 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1180 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1181 xor_rr(code, dst_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1182 if (src_op.mode == MODE_REG_DIRECT) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1183 xor_rr(code, src_op.base, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1184 } else if (src_op.mode == MODE_IMMED) { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1185 xor_ir(code, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1186 } else { |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1187 xor_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch2, z80_size(inst)); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1188 } |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1189 bt_ir(code, 4, opts->gen.scratch2, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1190 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1191 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1192 z80_save_ea(code, inst, opts); |
242 | 1193 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1194 case Z80_INC: |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1195 case Z80_DEC: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1196 if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1197 num_cycles += 2; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1198 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1199 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1200 translate_z80_reg(inst, &dst_op, opts); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1201 if (dst_op.mode == MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1202 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1203 } |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1204 if (z80_size(inst) == SZ_B) { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1205 if (dst_op.mode == MODE_REG_DIRECT) { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1206 if (dst_op.base >= AH && dst_op.base <= BH) { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1207 mov_rr(code, dst_op.base - AH, opts->gen.scratch2, SZ_W); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1208 } else { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1209 mov_rr(code, dst_op.base, opts->gen.scratch2, SZ_B); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1210 } |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1211 } else { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1212 mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, SZ_B); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1213 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1214 } |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1215 if (inst->op == Z80_INC) { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1216 if (dst_op.mode == MODE_REG_DIRECT) { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1217 add_ir(code, 1, dst_op.base, z80_size(inst)); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1218 } else { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1219 add_irdisp(code, 1, dst_op.base, dst_op.disp, z80_size(inst)); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1220 } |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1221 } else { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1222 if (dst_op.mode == MODE_REG_DIRECT) { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1223 sub_ir(code, 1, dst_op.base, z80_size(inst)); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1224 } else { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1225 sub_irdisp(code, 1, dst_op.base, dst_op.disp, z80_size(inst)); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1226 } |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1227 } |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1228 if (z80_size(inst) == SZ_B) { |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1229 mov_irdisp(code, inst->op == Z80_DEC, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1230 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1231 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1232 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1233 int bit = 4; |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1234 if (dst_op.mode == MODE_REG_DIRECT) { |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1235 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1236 if (dst_op.base >= AH && dst_op.base <= BH) { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1237 bit = 12; |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1238 xor_rr(code, dst_op.base - AH, opts->gen.scratch2, SZ_W); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1239 } else { |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1240 xor_rr(code, dst_op.base, opts->gen.scratch2, SZ_B); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1241 } |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1242 } else { |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1243 mov_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, SZ_B); |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1244 xor_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch2, SZ_B); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1245 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1246 } |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1247 bt_ir(code, bit, opts->gen.scratch2, SZ_W); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1248 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1249 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1250 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1251 z80_save_ea(code, inst, opts); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1252 z80_save_result(opts, inst); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1253 break; |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1254 case Z80_DAA: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1255 cycles(&opts->gen, num_cycles); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1256 xor_rr(code, opts->gen.scratch2, opts->gen.scratch2, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1257 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1258 and_ir(code, 0xF, opts->gen.scratch1, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1259 cmp_ir(code, 0xA, opts->gen.scratch1, SZ_B); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1260 mov_ir(code, 0xA0, opts->gen.scratch1, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1261 code_ptr corf_low_range = code->cur + 1; |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1262 jcc(code, CC_NC, code->cur+2); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1263 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1264 code_ptr corf_low = code->cur + 1; |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1265 jcc(code, CC_NZ, code->cur+2); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1266 code_ptr no_corf_low = code->cur + 1; |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1267 jmp(code, code->cur + 2); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1268 |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1269 *corf_low_range = code->cur - (corf_low_range + 1); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1270 mov_ir(code, 0x90, opts->gen.scratch1, SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1271 *corf_low = code->cur - (corf_low + 1); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1272 mov_ir(code, 0x06, opts->gen.scratch2, SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1273 |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1274 *no_corf_low = code->cur - (no_corf_low + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1275 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1276 code_ptr corf_high = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1277 jcc(code, CC_NZ, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1278 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1279 code_ptr no_corf_high = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1280 jcc(code, CC_C, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1281 *corf_high = code->cur - (corf_high + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1282 or_ir(code, 0x60, opts->gen.scratch2, SZ_B); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1283 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1284 *no_corf_high = code->cur - (no_corf_high + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1285 |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1286 mov_rr(code, opts->regs[Z80_A], opts->gen.scratch1, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1287 xor_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1288 |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1289 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1290 code_ptr not_sub = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1291 jcc(code, CC_Z, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1292 neg_r(code, opts->gen.scratch2, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1293 *not_sub = code->cur - (not_sub + 1); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1294 |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1295 add_rr(code, opts->gen.scratch2, opts->regs[Z80_A], SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1296 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1297 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1298 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1299 xor_rr(code, opts->regs[Z80_A], opts->gen.scratch1, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1300 bt_ir(code, 4, opts->gen.scratch1, SZ_B); |
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1301 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
1050
d06c947a9a77
Implement undoumented flag bits for DAA, CPL, SCF and CCF
Michael Pavone <pavone@retrodev.com>
parents:
1049
diff
changeset
|
1302 mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1303 break; |
1046
a27fdf43f1a7
Fix DAA and implement half-carry for remaining instructions. Z80 core now passes ZEXDOC!
Michael Pavone <pavone@retrodev.com>
parents:
1045
diff
changeset
|
1304 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1305 case Z80_CPL: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1306 cycles(&opts->gen, num_cycles); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1307 not_r(code, opts->regs[Z80_A], SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1308 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1309 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1050
d06c947a9a77
Implement undoumented flag bits for DAA, CPL, SCF and CCF
Michael Pavone <pavone@retrodev.com>
parents:
1049
diff
changeset
|
1310 mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1311 break; |
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1312 case Z80_NEG: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1313 cycles(&opts->gen, num_cycles); |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1314 mov_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1315 neg_r(code, opts->regs[Z80_A], SZ_B); |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1316 mov_rrdisp(code, dst_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1317 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1318 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1319 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1320 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1321 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1045
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1322 xor_rr(code, opts->regs[Z80_A], opts->gen.scratch2, SZ_B); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1323 bt_ir(code, 4, opts->gen.scratch2, SZ_B); |
e0489abfdab0
Implement half-carry for INC, DEC and NEG
Michael Pavone <pavone@retrodev.com>
parents:
1044
diff
changeset
|
1324 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1325 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1326 case Z80_CCF: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1327 cycles(&opts->gen, num_cycles); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1328 mov_rdispr(code, opts->gen.context_reg, zf_off(ZF_C), opts->gen.scratch1, SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1329 xor_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1330 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1331 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
1050
d06c947a9a77
Implement undoumented flag bits for DAA, CPL, SCF and CCF
Michael Pavone <pavone@retrodev.com>
parents:
1049
diff
changeset
|
1332 mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
257 | 1333 break; |
1334 case Z80_SCF: | |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1335 cycles(&opts->gen, num_cycles); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1336 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1337 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1338 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
1050
d06c947a9a77
Implement undoumented flag bits for DAA, CPL, SCF and CCF
Michael Pavone <pavone@retrodev.com>
parents:
1049
diff
changeset
|
1339 mov_rrdisp(code, opts->regs[Z80_A], opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
257 | 1340 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1341 case Z80_NOP: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1342 cycles(&opts->gen, num_cycles); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1343 break; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1344 case Z80_HALT: { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1345 code_ptr loop_top = code->cur; |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1346 //this isn't terribly efficient, but it's good enough for now |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1347 cycles(&opts->gen, num_cycles); |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1348 check_cycles_int(&opts->gen, address); |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1349 jmp(code, loop_top); |
285
021aeb6df19b
Implement HALT (sort of tested)
Mike Pavone <pavone@retrodev.com>
parents:
284
diff
changeset
|
1350 break; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1351 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1352 case Z80_DI: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1353 cycles(&opts->gen, num_cycles); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1354 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1355 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1356 add_rdispr(code, opts->gen.context_reg, offsetof(z80_context, target_cycle), opts->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1357 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, sync_cycle), opts->gen.scratch1, SZ_D); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1358 mov_irdisp(code, 0xFFFFFFFF, opts->gen.context_reg, offsetof(z80_context, int_cycle), SZ_D); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1359 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(z80_context, target_cycle), SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1360 sub_rr(code, opts->gen.scratch1, opts->gen.cycles, SZ_D); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1361 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1362 case Z80_EI: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1363 cycles(&opts->gen, num_cycles); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1364 neg_r(code, opts->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1365 add_rdispr(code, opts->gen.context_reg, offsetof(z80_context, target_cycle), opts->gen.cycles, SZ_D); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1366 mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(z80_context, int_enable_cycle), SZ_D); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1367 neg_r(code, opts->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
1368 add_rdispr(code, opts->gen.context_reg, offsetof(z80_context, target_cycle), opts->gen.cycles, SZ_D); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1369 mov_irdisp(code, 1, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1370 mov_irdisp(code, 1, opts->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
335 | 1371 //interrupt enable has a one-instruction latency, minimum instruction duration is 4 cycles |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1372 add_irdisp(code, 4*opts->gen.clock_divider, opts->gen.context_reg, offsetof(z80_context, int_enable_cycle), SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1373 call(code, opts->do_sync); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1374 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1375 case Z80_IM: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1376 cycles(&opts->gen, num_cycles); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1377 mov_irdisp(code, inst->immed, opts->gen.context_reg, offsetof(z80_context, im), SZ_B); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1378 break; |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1379 case Z80_RLC: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1380 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1381 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1382 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1383 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1384 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1385 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1386 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1387 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1388 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1389 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1390 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1391 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1392 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1393 rol_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1394 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1395 rol_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1396 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1397 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1398 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1399 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1400 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1401 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1402 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1403 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1404 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1405 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1406 //rlca does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1407 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1408 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1409 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1410 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1411 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1412 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1413 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1414 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1415 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1416 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1417 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1418 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1419 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1420 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1421 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1422 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1423 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1424 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1425 case Z80_RL: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1426 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1427 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1428 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1429 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1430 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1431 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1432 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1433 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1434 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1435 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1436 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1437 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1438 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1439 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1440 rcl_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1441 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1442 rcl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1443 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1444 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1445 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1446 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1447 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1448 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1449 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1450 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1451 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1452 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1453 //rla does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1454 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1455 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1456 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1457 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1458 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1459 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1460 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1461 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1462 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1463 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1464 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1465 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1466 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1467 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1468 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1469 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1470 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1471 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1472 case Z80_RRC: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1473 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1474 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1475 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1476 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1477 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1478 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1479 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1480 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1481 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1482 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1483 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1484 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1485 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1486 ror_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1487 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1488 ror_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1489 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1490 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1491 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1492 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1493 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1494 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1495 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1496 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1497 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1498 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1499 //rrca does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1500 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1501 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1502 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1503 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1504 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1505 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1506 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1507 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1508 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1509 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1510 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1511 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1512 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1513 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1514 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1515 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1516 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1517 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1518 case Z80_RR: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1519 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1520 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1521 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1522 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1523 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1524 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1525 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1526 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1527 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1528 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1529 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1530 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1531 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1532 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1533 rcr_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1534 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1535 rcr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1536 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1537 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1538 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1539 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1540 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1541 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1542 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1543 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1544 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1545 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1546 //rra does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1547 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1548 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1549 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1550 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1551 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1552 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1553 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1554 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1555 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1556 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1557 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1558 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1559 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1560 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1561 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1562 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1563 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1564 break; |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1565 case Z80_SLA: |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1566 case Z80_SLL: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1567 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1568 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1569 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1570 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1571 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1572 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1573 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1574 cycles(&opts->gen, 1); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1575 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1576 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1577 translate_z80_reg(inst, &dst_op, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1578 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1579 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1580 shl_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1581 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1582 shl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1583 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1584 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1585 if (inst->op == Z80_SLL) { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1586 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1587 or_ir(code, 1, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1588 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1589 or_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1590 } |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1591 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1592 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1593 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1594 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1595 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1596 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1597 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1598 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1599 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1600 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1601 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1602 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1603 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1604 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1605 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1606 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1607 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1608 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1609 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1610 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1611 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1612 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1613 z80_save_reg(inst, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1614 } |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1615 break; |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1616 case Z80_SRA: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1617 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1618 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1619 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1620 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1621 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1622 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1623 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1624 cycles(&opts->gen, 1); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1625 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1626 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1627 translate_z80_reg(inst, &dst_op, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1628 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1629 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1630 sar_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1631 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1632 sar_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1633 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1634 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1635 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1636 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1637 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1638 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1639 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1640 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1641 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1642 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1643 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1644 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1645 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1646 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1647 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1648 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1649 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1650 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1651 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1652 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1653 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1654 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1655 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1656 z80_save_reg(inst, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1657 } |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1658 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1659 case Z80_SRL: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1660 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1661 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1662 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1663 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1664 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1665 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1666 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1667 cycles(&opts->gen, 1); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1668 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1669 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1670 translate_z80_reg(inst, &dst_op, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1671 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1672 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1673 shr_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1674 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1675 shr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1676 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1677 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1678 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1679 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1680 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1681 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1682 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1683 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1684 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1685 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1686 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1687 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1688 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1689 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1690 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1691 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1692 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1693 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1694 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1695 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1696 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1697 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1698 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1699 z80_save_reg(inst, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1700 } |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1701 break; |
286 | 1702 case Z80_RLD: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1703 cycles(&opts->gen, num_cycles); |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1704 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1705 call(code, opts->read_8); |
286 | 1706 //Before: (HL) = 0x12, A = 0x34 |
1707 //After: (HL) = 0x24, A = 0x31 | |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1708 zreg_to_native(opts, Z80_A, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1709 shl_ir(code, 4, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1710 and_ir(code, 0xF, opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1711 and_ir(code, 0xFFF, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1712 and_ir(code, 0xF0, opts->regs[Z80_A], SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1713 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1714 //opts->gen.scratch1 = 0x0124 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1715 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1716 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1717 or_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1718 //set flags |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1719 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1720 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1721 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1722 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1723 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1724 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1725 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1726 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1727 call(code, opts->write_8); |
286 | 1728 break; |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1729 case Z80_RRD: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1730 cycles(&opts->gen, num_cycles); |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1731 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1732 call(code, opts->read_8); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1733 //Before: (HL) = 0x12, A = 0x34 |
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1734 //After: (HL) = 0x41, A = 0x32 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1735 zreg_to_native(opts, Z80_A, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1736 ror_ir(code, 4, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1737 shl_ir(code, 4, opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1738 and_ir(code, 0xF00F, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1739 and_ir(code, 0xF0, opts->regs[Z80_A], SZ_B); |
967
1eb616b8cbe9
Fix bug in Z80 rrd implementation. This fixes the annoying high pitched wine in Afterburner II.
Michael Pavone <pavone@retrodev.com>
parents:
966
diff
changeset
|
1740 and_ir(code, 0xF0, opts->gen.scratch2, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1741 //opts->gen.scratch1 = 0x2001 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1742 //opts->gen.scratch2 = 0x0040 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1743 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1744 //opts->gen.scratch1 = 0x2041 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1745 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1746 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1747 shr_ir(code, 4, opts->gen.scratch1, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1748 or_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1749 //set flags |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1750 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1751 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1752 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1753 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1754 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1755 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1756 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1757 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1758 call(code, opts->write_8); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1759 break; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1760 case Z80_BIT: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1761 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1762 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1763 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1764 cycles(&opts->gen, num_cycles); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1765 uint8_t bit; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1766 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1767 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
737
043393b79e28
Fixes for the 32-bit build accidentally introduced a bug into the 64-bit build, this commit fixes the regression
Michael Pavone <pavone@retrodev.com>
parents:
735
diff
changeset
|
1768 src_op.mode = MODE_REG_DIRECT; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1769 size = SZ_W; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1770 bit = inst->immed + 8; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1771 } else { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1772 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1773 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1774 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1775 } |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1776 if (inst->addr_mode != Z80_REG) { |
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1777 //Reads normally take 3 cycles, but the read at the end of a bit instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1778 cycles(&opts->gen, 1); |
239
a5bea9711a46
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Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1779 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1780 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1781 bt_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1782 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1783 bt_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1784 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1785 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1786 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1787 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1788 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1789 if (inst->immed == 7) { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1790 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1791 cmp_ir(code, 0, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1792 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1793 cmp_irdisp(code, 0, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1794 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1795 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1796 } else { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1797 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1798 } |
1049
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1799 |
ef7ee9919a73
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parents:
1048
diff
changeset
|
1800 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1801 if (src_op.mode == MODE_REG_DIRECT) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1802 if (size == SZ_W) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1803 mov_rr(code, src_op.base, opts->gen.scratch1, SZ_W); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1804 shr_ir(code, 8, opts->gen.scratch1, SZ_W); |
ef7ee9919a73
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Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1805 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
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Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1806 } else { |
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Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1807 mov_rrdisp(code, src_op.base, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
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Partial support for undocumented flag bits
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parents:
1048
diff
changeset
|
1808 } |
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Partial support for undocumented flag bits
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parents:
1048
diff
changeset
|
1809 } else { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1810 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1811 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
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Partial support for undocumented flag bits
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parents:
1048
diff
changeset
|
1812 } |
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Partial support for undocumented flag bits
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parents:
1048
diff
changeset
|
1813 } else if((inst->addr_mode & 0x1F) != Z80_REG_INDIRECT) { |
ef7ee9919a73
Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1814 zreg_to_native(opts, (inst->addr_mode & 0x1F) == Z80_IX_DISPLACE ? Z80_IX : Z80_IY, opts->gen.scratch2); |
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Partial support for undocumented flag bits
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parents:
1048
diff
changeset
|
1815 add_ir(code, inst->ea_reg & 0x80 ? inst->ea_reg - 256 : inst->ea_reg, opts->gen.scratch2, SZ_W); |
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Partial support for undocumented flag bits
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parents:
1048
diff
changeset
|
1816 shr_ir(code, 8, opts->gen.scratch2, SZ_W); |
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Partial support for undocumented flag bits
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parents:
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diff
changeset
|
1817 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(ZF_XY), SZ_B); |
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Partial support for undocumented flag bits
Michael Pavone <pavone@retrodev.com>
parents:
1048
diff
changeset
|
1818 } |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
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parents:
238
diff
changeset
|
1819 break; |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
307
diff
changeset
|
1820 } |
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
307
diff
changeset
|
1821 case Z80_SET: { |
1044
1625555e346e
Properly handle redundant prefixes
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parents:
1043
diff
changeset
|
1822 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
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parents:
1043
diff
changeset
|
1823 num_cycles += 8; |
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parents:
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diff
changeset
|
1824 } |
591
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parents:
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diff
changeset
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1825 cycles(&opts->gen, num_cycles); |
308
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parents:
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diff
changeset
|
1826 uint8_t bit; |
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parents:
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diff
changeset
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1827 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
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parents:
307
diff
changeset
|
1828 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
737
043393b79e28
Fixes for the 32-bit build accidentally introduced a bug into the 64-bit build, this commit fixes the regression
Michael Pavone <pavone@retrodev.com>
parents:
735
diff
changeset
|
1829 src_op.mode = MODE_REG_DIRECT; |
308
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parents:
307
diff
changeset
|
1830 size = SZ_W; |
e0e81551fd7e
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parents:
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diff
changeset
|
1831 bit = inst->immed + 8; |
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parents:
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diff
changeset
|
1832 } else { |
e0e81551fd7e
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parents:
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diff
changeset
|
1833 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
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diff
changeset
|
1834 bit = inst->immed; |
591
966b46c68942
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parents:
590
diff
changeset
|
1835 translate_z80_ea(inst, &src_op, opts, READ, MODIFY); |
308
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parents:
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diff
changeset
|
1836 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
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parents:
295
diff
changeset
|
1837 if (inst->reg != Z80_USE_IMMED) { |
591
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parents:
590
diff
changeset
|
1838 translate_z80_reg(inst, &dst_op, opts); |
299
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Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1839 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1840 if (inst->addr_mode != Z80_REG) { |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1841 //Reads normally take 3 cycles, but the read in the middle of a set instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1842 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1843 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1844 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1845 bts_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1846 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1847 bts_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1848 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1849 if (inst->reg != Z80_USE_IMMED) { |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1850 if (size == SZ_W) { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1851 #ifdef X86_64 |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1852 if (dst_op.base >= R8) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1853 ror_ir(code, 8, src_op.base, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1854 mov_rr(code, opts->regs[z80_low_reg(inst->ea_reg)], dst_op.base, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1855 ror_ir(code, 8, src_op.base, SZ_W); |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1856 } else { |
666
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In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1857 #endif |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1858 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1859 zreg_to_native(opts, inst->ea_reg, dst_op.base); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1860 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1861 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1862 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1863 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1864 #ifdef X86_64 |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1865 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1866 #endif |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1867 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1868 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1869 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1870 mov_rr(code, src_op.base, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1871 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1872 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1873 } |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1874 } else if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1875 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1876 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1877 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1878 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1879 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1880 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1881 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1882 if ((inst->addr_mode & 0x1F) != Z80_REG) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1883 z80_save_result(opts, inst); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1884 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1885 z80_save_reg(inst, opts); |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1886 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1887 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1888 break; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1889 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1890 case Z80_RES: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1891 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1892 num_cycles += 8; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1893 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1894 cycles(&opts->gen, num_cycles); |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1895 uint8_t bit; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1896 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1897 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
737
043393b79e28
Fixes for the 32-bit build accidentally introduced a bug into the 64-bit build, this commit fixes the regression
Michael Pavone <pavone@retrodev.com>
parents:
735
diff
changeset
|
1898 src_op.mode = MODE_REG_DIRECT; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1899 size = SZ_W; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1900 bit = inst->immed + 8; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1901 } else { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1902 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1903 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1904 translate_z80_ea(inst, &src_op, opts, READ, MODIFY); |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
307
diff
changeset
|
1905 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1906 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1907 translate_z80_reg(inst, &dst_op, opts); |
308
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Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
307
diff
changeset
|
1908 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1909 if (inst->addr_mode != Z80_REG) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1910 //Reads normally take 3 cycles, but the read in the middle of a set instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1911 cycles(&opts->gen, 1); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1912 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1913 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1914 btr_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1915 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1916 btr_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1917 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1918 if (inst->reg != Z80_USE_IMMED) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1919 if (size == SZ_W) { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1920 #ifdef X86_64 |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
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parents:
307
diff
changeset
|
1921 if (dst_op.base >= R8) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1922 ror_ir(code, 8, src_op.base, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1923 mov_rr(code, opts->regs[z80_low_reg(inst->ea_reg)], dst_op.base, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1924 ror_ir(code, 8, src_op.base, SZ_W); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1925 } else { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1926 #endif |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1927 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1928 zreg_to_native(opts, inst->ea_reg, dst_op.base); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1929 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1930 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1931 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1932 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1933 #ifdef X86_64 |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1934 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1935 #endif |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1936 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1937 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1938 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1939 mov_rr(code, src_op.base, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1940 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1941 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1942 } |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1943 } else if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1944 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1945 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1946 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1947 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1948 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1949 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1950 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1951 if (inst->addr_mode != Z80_REG) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1952 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1953 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1954 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1955 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1956 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1957 break; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1958 } |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1959 case Z80_JP: { |
506
a3b48a57e847
Fix timing of certain ld and jp instructions in the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
505
diff
changeset
|
1960 if (inst->addr_mode != Z80_REG_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1961 num_cycles += 6; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1962 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1963 cycles(&opts->gen, num_cycles); |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1964 if (inst->addr_mode != Z80_REG_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1965 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1966 if (!call_dst) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1967 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1968 //fake address to force large displacement |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
1969 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1970 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1971 jmp(code, call_dst); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1972 } else { |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1973 if (inst->addr_mode == Z80_REG_INDIRECT) { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
1974 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1975 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1976 mov_ir(code, inst->immed, opts->gen.scratch1, SZ_W); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1977 } |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1978 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1979 jmp_r(code, opts->gen.scratch1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1980 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1981 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1982 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1983 case Z80_JPCC: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
1984 cycles(&opts->gen, num_cycles + 3);//T States: 4,3 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1985 uint8_t cond = CC_Z; |
19fb3523a9e5
Implement more Z80 instructions (untested)
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parents:
235
diff
changeset
|
1986 switch (inst->reg) |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1987 { |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1988 case Z80_CC_NZ: |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1989 cond = CC_NZ; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1990 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1991 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1992 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1993 case Z80_CC_NC: |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1994 cond = CC_NZ; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1995 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1996 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1997 break; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1998 case Z80_CC_PO: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1999 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2000 case Z80_CC_PE: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2001 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2002 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2003 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
366
diff
changeset
|
2004 cond = CC_NZ; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2005 case Z80_CC_M: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2006 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2007 break; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2008 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2009 uint8_t *no_jump_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2010 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2011 cycles(&opts->gen, 5);//T States: 5 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2012 uint16_t dest_addr = inst->immed; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2013 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2014 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2015 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2016 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2017 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2018 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2019 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2020 *no_jump_off = code->cur - (no_jump_off+1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2021 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2022 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2023 case Z80_JR: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2024 cycles(&opts->gen, num_cycles + 8);//T States: 4,3,5 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2025 uint16_t dest_addr = address + inst->immed + 2; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2026 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2027 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2028 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2029 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2030 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2031 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2032 jmp(code, call_dst); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2033 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2034 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2035 case Z80_JRCC: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2036 cycles(&opts->gen, num_cycles + 3);//T States: 4,3 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2037 uint8_t cond = CC_Z; |
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
2038 switch (inst->reg) |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2039 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2040 case Z80_CC_NZ: |
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
2041 cond = CC_NZ; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2042 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2043 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2044 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2045 case Z80_CC_NC: |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2046 cond = CC_NZ; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2047 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2048 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2049 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2050 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2051 uint8_t *no_jump_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2052 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2053 cycles(&opts->gen, 5);//T States: 5 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2054 uint16_t dest_addr = address + inst->immed + 2; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2055 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2056 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2057 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2058 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2059 call_dst = code->cur + 256; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2060 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2061 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2062 *no_jump_off = code->cur - (no_jump_off+1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2063 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2064 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2065 case Z80_DJNZ: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2066 cycles(&opts->gen, num_cycles + 4);//T States: 5,3 |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
2067 if (opts->regs[Z80_B] >= 0) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
2068 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
2069 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
2070 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
2071 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2072 uint8_t *no_jump_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2073 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2074 cycles(&opts->gen, 5);//T States: 5 |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2075 uint16_t dest_addr = address + inst->immed + 2; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2076 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2077 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2078 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2079 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2080 call_dst = code->cur + 256; |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2081 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2082 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2083 *no_jump_off = code->cur - (no_jump_off+1); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2084 break; |
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2085 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2086 case Z80_CALL: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2087 cycles(&opts->gen, num_cycles + 7);//T States: 4,3,4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2088 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2089 mov_ir(code, address + 3, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2090 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2091 call(code, opts->write_16_highfirst);//T States: 3, 3 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2092 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2093 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2094 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2095 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2096 call_dst = code->cur + 256; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2097 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2098 jmp(code, call_dst); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2099 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2100 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2101 case Z80_CALLCC: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2102 cycles(&opts->gen, num_cycles + 6);//T States: 4,3,3 (false case) |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2103 uint8_t cond = CC_Z; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2104 switch (inst->reg) |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2105 { |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2106 case Z80_CC_NZ: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2107 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2108 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2109 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2110 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2111 case Z80_CC_NC: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2112 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2113 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2114 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2115 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2116 case Z80_CC_PO: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2117 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2118 case Z80_CC_PE: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2119 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2120 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2121 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
366
diff
changeset
|
2122 cond = CC_NZ; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2123 case Z80_CC_M: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2124 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2125 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2126 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2127 uint8_t *no_call_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2128 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2129 cycles(&opts->gen, 1);//Last of the above T states takes an extra cycle in the true case |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2130 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2131 mov_ir(code, address + 3, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2132 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2133 call(code, opts->write_16_highfirst);//T States: 3, 3 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2134 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2135 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2136 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2137 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2138 call_dst = code->cur + 256; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2139 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2140 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2141 *no_call_off = code->cur - (no_call_off+1); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
2142 break; |
682 | 2143 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2144 case Z80_RET: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2145 cycles(&opts->gen, num_cycles);//T States: 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2146 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2147 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2148 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2149 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2150 jmp_r(code, opts->gen.scratch1); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2151 break; |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2152 case Z80_RETCC: { |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2153 cycles(&opts->gen, num_cycles + 1);//T States: 5 |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2154 uint8_t cond = CC_Z; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2155 switch (inst->reg) |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2156 { |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2157 case Z80_CC_NZ: |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2158 cond = CC_NZ; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2159 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2160 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2161 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2162 case Z80_CC_NC: |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2163 cond = CC_NZ; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2164 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2165 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2166 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2167 case Z80_CC_PO: |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2168 cond = CC_NZ; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2169 case Z80_CC_PE: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2170 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2171 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2172 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
366
diff
changeset
|
2173 cond = CC_NZ; |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2174 case Z80_CC_M: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2175 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2176 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2177 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2178 uint8_t *no_call_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2179 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2180 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2181 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2182 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2183 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2184 jmp_r(code, opts->gen.scratch1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2185 *no_call_off = code->cur - (no_call_off+1); |
246
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2186 break; |
ed548c77b598
Implement RETCC in Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
243
diff
changeset
|
2187 } |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2188 case Z80_RETI: |
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2189 //For some systems, this may need a callback for signalling interrupt routine completion |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2190 cycles(&opts->gen, num_cycles);//T States: 4, 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2191 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2192 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2193 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2194 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2195 jmp_r(code, opts->gen.scratch1); |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2196 break; |
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2197 case Z80_RETN: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2198 cycles(&opts->gen, num_cycles);//T States: 4, 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2199 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, iff2), opts->gen.scratch2, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2200 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2201 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2202 call(code, opts->read_16);//T STates: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2203 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2204 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2205 jmp_r(code, opts->gen.scratch1); |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2206 break; |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2207 case Z80_RST: { |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2208 //RST is basically CALL to an address in page 0 |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2209 cycles(&opts->gen, num_cycles + 1);//T States: 5 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2210 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2211 mov_ir(code, address + 1, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2212 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2213 call(code, opts->write_16_highfirst);//T States: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2214 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2215 if (!call_dst) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2216 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2217 //fake address to force large displacement |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2218 call_dst = code->cur + 256; |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2219 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2220 jmp(code, call_dst); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2221 break; |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2222 } |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2223 case Z80_IN: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2224 if (inst->addr_mode == Z80_IMMED_INDIRECT) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2225 num_cycles += 3; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2226 } |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2227 cycles(&opts->gen, num_cycles);//T States: 4 3/4 |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2228 if (inst->addr_mode == Z80_IMMED_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2229 mov_ir(code, inst->immed, opts->gen.scratch1, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2230 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2231 mov_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2232 } |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2233 call(code, opts->read_io); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2234 if (inst->addr_mode != Z80_IMMED_INDIRECT) { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2235 or_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2236 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2237 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2238 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2239 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2240 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2241 } |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2242 if (inst->reg != Z80_UNUSED) { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2243 translate_z80_reg(inst, &dst_op, opts); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2244 if (dst_op.mode == MODE_REG_DIRECT) { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2245 mov_rr(code, opts->gen.scratch1, dst_op.base, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2246 } else { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2247 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2248 } |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2249 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2250 z80_save_reg(inst, opts); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2251 break; |
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2252 /*case Z80_INI: |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2253 case Z80_INIR: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2254 case Z80_IND: |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2255 case Z80_INDR:*/ |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2256 case Z80_OUT: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2257 if (inst->reg == Z80_A) { |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2258 num_cycles += 3; |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2259 } |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2260 cycles(&opts->gen, num_cycles);//T States: 4 3/4 |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2261 if ((inst->addr_mode & 0x1F) == Z80_IMMED_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2262 mov_ir(code, inst->immed, opts->gen.scratch2, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2263 } else { |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2264 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2265 mov_rr(code, opts->regs[Z80_C], opts->gen.scratch2, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2266 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2267 translate_z80_reg(inst, &src_op, opts); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2268 if (src_op.mode == MODE_REG_DIRECT) { |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2269 mov_rr(code, src_op.base, opts->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2270 } else if (src_op.mode == MODE_IMMED) { |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2271 mov_ir(code, src_op.disp, opts->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2272 } else { |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2273 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2274 } |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2275 call(code, opts->write_io); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2276 z80_save_reg(inst, opts); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2277 break; |
1040
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2278 case Z80_OUTI: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2279 cycles(&opts->gen, num_cycles + 1);//T States: 4, 5 |
1040
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2280 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2281 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2282 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2283 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2284 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2285 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2286 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2287 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2288 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2289 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2290 //increment HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2291 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2292 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2293 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2294 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2295 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2296 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2297 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2298 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2299 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2300 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2301 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2302 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2303 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2304 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2305 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2306 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2307 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2308 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2309 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2310 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2311 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2312 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2313 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2314 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2315 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2316 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2317 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2318 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2319 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2320 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2321 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2322 case Z80_OTIR: { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2323 code_ptr start = code->cur; |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2324 cycles(&opts->gen, num_cycles + 1);//T States: 4, 5 |
1040
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2325 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2326 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2327 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2328 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2329 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2330 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2331 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2332 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2333 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2334 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2335 //increment HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2336 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2337 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2338 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2339 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2340 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2341 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2342 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2343 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2344 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2345 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2346 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2347 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2348 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2349 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2350 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2351 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2352 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2353 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2354 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2355 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2356 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2357 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2358 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2359 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2360 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2361 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2362 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2363 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2364 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2365 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2366 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2367 cmp_ir(code, 0, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2368 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2369 cmp_irdisp(code, 0, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2370 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2371 code_ptr done = code->cur+1; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2372 jcc(code, CC_Z, code->cur+2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2373 cycles(&opts->gen, 5); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2374 jmp(code, start); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2375 *done = code->cur - (done + 1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2376 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2377 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2378 case Z80_OUTD: |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2379 cycles(&opts->gen, num_cycles + 1);//T States: 4, 5 |
1040
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2380 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2381 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2382 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2383 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2384 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2385 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2386 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2387 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2388 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2389 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2390 //decrement HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2391 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2392 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2393 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2394 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2395 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2396 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2397 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2398 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2399 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2400 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2401 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2402 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2403 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2404 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2405 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2406 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2407 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2408 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2409 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2410 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2411 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2412 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2413 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2414 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2415 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2416 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2417 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2418 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2419 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2420 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2421 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2422 case Z80_OTDR: { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2423 code_ptr start = code->cur; |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2424 cycles(&opts->gen, num_cycles + 1);//T States: 4, 5 |
1040
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2425 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2426 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2427 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2428 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2429 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2430 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2431 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2432 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2433 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2434 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2435 //increment HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2436 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2437 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2438 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2439 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2440 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2441 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2442 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2443 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2444 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2445 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2446 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2447 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2448 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2449 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2450 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2451 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2452 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2453 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2454 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2455 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2456 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2457 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2458 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2459 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2460 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2461 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2462 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2463 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2464 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2465 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2466 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2467 cmp_ir(code, 0, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2468 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2469 cmp_irdisp(code, 0, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2470 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2471 code_ptr done = code->cur+1; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2472 jcc(code, CC_Z, code->cur+2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2473 cycles(&opts->gen, 5); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2474 jmp(code, start); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2475 *done = code->cur - (done + 1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2476 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2477 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2478 default: { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2479 char disbuf[80]; |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2480 z80_disasm(inst, disbuf, address); |
259
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2481 FILE * f = fopen("zram.bin", "wb"); |
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2482 fwrite(context->mem_pointers[0], 1, 8 * 1024, f); |
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2483 fclose(f); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2484 fatal_error("unimplemented Z80 instruction: %s at %X\nZ80 RAM has been saved to zram.bin for debugging", disbuf, address); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2485 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2486 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2487 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2488 |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2489 uint8_t * z80_interp_handler(uint8_t opcode, z80_context * context) |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2490 { |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2491 if (!context->interp_code[opcode]) { |
755
7306b3967c51
Cleanup some warnings under clang through a combination of code fixes and supressing specific warnings
Michael Pavone <pavone@retrodev.com>
parents:
737
diff
changeset
|
2492 if (opcode == 0xCB || (opcode >= 0xDD && (opcode & 0xF) == 0xD)) { |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2493 fatal_error("Encountered prefix byte %X at address %X. Z80 interpeter doesn't support those yet.", opcode, context->pc); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2494 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2495 uint8_t codebuf[8]; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2496 memset(codebuf, 0, sizeof(codebuf)); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2497 codebuf[0] = opcode; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2498 z80inst inst; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2499 uint8_t * after = z80_decode(codebuf, &inst); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2500 if (after - codebuf > 1) { |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2501 fatal_error("Encountered multi-byte Z80 instruction at %X. Z80 interpeter doesn't support those yet.", context->pc); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2502 } |
652 | 2503 |
2504 z80_options * opts = context->options; | |
2505 code_info *code = &opts->gen.code; | |
2506 check_alloc_code(code, ZMAX_NATIVE_SIZE); | |
2507 context->interp_code[opcode] = code->cur; | |
2508 translate_z80inst(&inst, context, 0, 1); | |
2509 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, pc), opts->gen.scratch1, SZ_W); | |
2510 add_ir(code, after - codebuf, opts->gen.scratch1, SZ_W); | |
2511 call(code, opts->native_addr); | |
2512 jmp_r(code, opts->gen.scratch1); | |
715
1c2020d3e275
Call z80_handle_deferred after generating an insruction handler so that instructions like rst work correctly
Michael Pavone <pavone@retrodev.com>
parents:
712
diff
changeset
|
2513 z80_handle_deferred(context); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2514 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2515 return context->interp_code[opcode]; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2516 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2517 |
652 | 2518 code_info z80_make_interp_stub(z80_context * context, uint16_t address) |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2519 { |
652 | 2520 z80_options *opts = context->options; |
2521 code_info * code = &opts->gen.code; | |
2522 check_alloc_code(code, 32); | |
2523 code_info stub = {code->cur, NULL}; | |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2524 //TODO: make this play well with the breakpoint code |
652 | 2525 mov_ir(code, address, opts->gen.scratch1, SZ_W); |
2526 call(code, opts->read_8); | |
1044
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2527 //opcode fetch M-cycles have one extra T-state |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2528 cycles(&opts->gen, 1); |
1625555e346e
Properly handle redundant prefixes
Michael Pavone <pavone@retrodev.com>
parents:
1043
diff
changeset
|
2529 //TODO: increment R |
652 | 2530 check_cycles_int(&opts->gen, address); |
2531 call(code, opts->gen.save_context); | |
2532 mov_irdisp(code, address, opts->gen.context_reg, offsetof(z80_context, pc), SZ_W); | |
2533 push_r(code, opts->gen.context_reg); | |
712
382a2b5b70c0
Fix crash bug in Z80 interpreter
Michael Pavone <pavone@retrodev.com>
parents:
702
diff
changeset
|
2534 call_args(code, (code_ptr)z80_interp_handler, 2, opts->gen.scratch1, opts->gen.context_reg); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
2535 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); |
652 | 2536 pop_r(code, opts->gen.context_reg); |
2537 call(code, opts->gen.load_context); | |
2538 jmp_r(code, opts->gen.scratch1); | |
2539 stub.last = code->cur; | |
2540 return stub; | |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2541 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2542 |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2543 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2544 uint8_t * z80_get_native_address(z80_context * context, uint32_t address) |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2545 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2546 native_map_slot *map; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2547 if (address < 0x4000) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2548 address &= 0x1FFF; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2549 map = context->static_code_map; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2550 } else { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2551 address -= 0x4000; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2552 map = context->banked_code_map; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2553 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2554 if (!map->base || !map->offsets || map->offsets[address] == INVALID_OFFSET || map->offsets[address] == EXTENSION_WORD) { |
313
a13329645ea3
Fix terminal instruction detection in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
312
diff
changeset
|
2555 //dprintf("z80_get_native_address: %X NULL\n", address); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2556 return NULL; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2557 } |
313
a13329645ea3
Fix terminal instruction detection in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
312
diff
changeset
|
2558 //dprintf("z80_get_native_address: %X %p\n", address, map->base + map->offsets[address]); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2559 return map->base + map->offsets[address]; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2560 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2561 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2562 uint8_t z80_get_native_inst_size(z80_options * opts, uint32_t address) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2563 { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2564 //TODO: Fix for addresses >= 0x4000 |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2565 if (address >= 0x4000) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2566 return 0; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2567 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2568 return opts->gen.ram_inst_sizes[0][address & 0x1FFF]; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2569 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2570 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2571 void z80_map_native_address(z80_context * context, uint32_t address, uint8_t * native_address, uint8_t size, uint8_t native_size) |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2572 { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2573 uint32_t orig_address = address; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2574 native_map_slot *map; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2575 z80_options * opts = context->options; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2576 if (address < 0x4000) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2577 address &= 0x1FFF; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2578 map = context->static_code_map; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2579 opts->gen.ram_inst_sizes[0][address] = native_size; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2580 context->ram_code_flags[(address & 0x1C00) >> 10] |= 1 << ((address & 0x380) >> 7); |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2581 context->ram_code_flags[((address + size) & 0x1C00) >> 10] |= 1 << (((address + size) & 0x380) >> 7); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2582 } else { |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2583 //HERE |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2584 address -= 0x4000; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2585 map = context->banked_code_map; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2586 if (!map->offsets) { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2587 map->offsets = malloc(sizeof(int32_t) * 0xC000); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2588 memset(map->offsets, 0xFF, sizeof(int32_t) * 0xC000); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2589 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2590 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2591 if (!map->base) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2592 map->base = native_address; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2593 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2594 map->offsets[address] = native_address - map->base; |
253
3b34deba4ca0
Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents:
252
diff
changeset
|
2595 for(--size, orig_address++; size; --size, orig_address++) { |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2596 address = orig_address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2597 if (address < 0x4000) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2598 address &= 0x1FFF; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2599 map = context->static_code_map; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2600 } else { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2601 address -= 0x4000; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2602 map = context->banked_code_map; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2603 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2604 if (!map->offsets) { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2605 map->offsets = malloc(sizeof(int32_t) * 0xC000); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2606 memset(map->offsets, 0xFF, sizeof(int32_t) * 0xC000); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2607 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2608 map->offsets[address] = EXTENSION_WORD; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2609 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2610 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2611 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2612 #define INVALID_INSTRUCTION_START 0xFEEDFEED |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2613 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2614 uint32_t z80_get_instruction_start(native_map_slot * static_code_map, uint32_t address) |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2615 { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2616 //TODO: Fixme for address >= 0x4000 |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2617 if (!static_code_map->base || address >= 0x4000) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2618 return INVALID_INSTRUCTION_START; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2619 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2620 address &= 0x1FFF; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2621 if (static_code_map->offsets[address] == INVALID_OFFSET) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2622 return INVALID_INSTRUCTION_START; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2623 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2624 while (static_code_map->offsets[address] == EXTENSION_WORD) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2625 --address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2626 address &= 0x1FFF; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2627 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2628 return address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2629 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2630 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2631 z80_context * z80_handle_code_write(uint32_t address, z80_context * context) |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2632 { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2633 uint32_t inst_start = z80_get_instruction_start(context->static_code_map, address); |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2634 if (inst_start != INVALID_INSTRUCTION_START) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2635 code_ptr dst = z80_get_native_address(context, inst_start); |
899
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2636 code_info code = {dst, dst+32, 0}; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2637 z80_options * opts = context->options; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2638 dprintf("patching code at %p for Z80 instruction at %X due to write to %X\n", code.cur, inst_start, address); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2639 mov_ir(&code, inst_start, opts->gen.scratch1, SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2640 call(&code, opts->retrans_stub); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2641 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2642 return context; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2643 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2644 |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2645 uint8_t * z80_get_native_address_trans(z80_context * context, uint32_t address) |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2646 { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2647 uint8_t * addr = z80_get_native_address(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2648 if (!addr) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2649 translate_z80_stream(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2650 addr = z80_get_native_address(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2651 if (!addr) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2652 printf("Failed to translate %X to native code\n", address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2653 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2654 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2655 return addr; |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2656 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2657 |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2658 void z80_handle_deferred(z80_context * context) |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2659 { |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2660 z80_options * opts = context->options; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2661 process_deferred(&opts->gen.deferred, context, (native_addr_func)z80_get_native_address); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2662 if (opts->gen.deferred) { |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2663 translate_z80_stream(context, opts->gen.deferred->address); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2664 } |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2665 } |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2666 |
559
6b248602ab84
blastem builds and almost works on OS X now
Mike Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2667 extern void * z80_retranslate_inst(uint32_t address, z80_context * context, uint8_t * orig_start) asm("z80_retranslate_inst"); |
390
561fe3ea3fc8
Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
Mike Pavone <pavone@retrodev.com>
parents:
389
diff
changeset
|
2668 void * z80_retranslate_inst(uint32_t address, z80_context * context, uint8_t * orig_start) |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2669 { |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2670 char disbuf[80]; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2671 z80_options * opts = context->options; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2672 uint8_t orig_size = z80_get_native_inst_size(opts, address); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2673 code_info *code = &opts->gen.code; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2674 uint8_t *after, *inst = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2675 z80inst instbuf; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2676 dprintf("Retranslating code at Z80 address %X, native address %p\n", address, orig_start); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2677 after = z80_decode(inst, &instbuf); |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2678 #ifdef DO_DEBUG_PRINT |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2679 z80_disasm(&instbuf, disbuf, address); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2680 if (instbuf.op == Z80_NOP) { |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2681 printf("%X\t%s(%d)\n", address, disbuf, instbuf.immed); |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2682 } else { |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2683 printf("%X\t%s\n", address, disbuf); |
267
1788e3f29c28
Don't mix *H regs with the REX prefix
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
2684 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2685 #endif |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2686 if (orig_size != ZMAX_NATIVE_SIZE) { |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2687 check_alloc_code(code, ZMAX_NATIVE_SIZE); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2688 code_ptr start = code->cur; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2689 deferred_addr * orig_deferred = opts->gen.deferred; |
652 | 2690 translate_z80inst(&instbuf, context, address, 0); |
644
2d7e84ae818c
Temporarily comment out code to translate Z80 instructions in place as in rare cases it can stomp the next instruction if a branch goes from a short from to a long one
Michael Pavone <pavone@retrodev.com>
parents:
628
diff
changeset
|
2691 /* |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2692 if ((native_end - dst) <= orig_size) { |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2693 uint8_t * native_next = z80_get_native_address(context, address + after-inst); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2694 if (native_next && ((native_next == orig_start + orig_size) || (orig_size - (native_end - dst)) > 5)) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2695 remove_deferred_until(&opts->gen.deferred, orig_deferred); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2696 native_end = translate_z80inst(&instbuf, orig_start, context, address, 0); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2697 if (native_next == orig_start + orig_size && (native_next-native_end) < 2) { |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2698 while (native_end < orig_start + orig_size) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2699 *(native_end++) = 0x90; //NOP |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2700 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2701 } else { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2702 jmp(native_end, native_next); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2703 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2704 z80_handle_deferred(context); |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2705 return orig_start; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2706 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2707 }*/ |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2708 z80_map_native_address(context, address, start, after-inst, ZMAX_NATIVE_SIZE); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2709 code_info tmp_code = {orig_start, orig_start + 16}; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2710 jmp(&tmp_code, start); |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2711 tmp_code = *code; |
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2712 code->cur = start + ZMAX_NATIVE_SIZE; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2713 if (!z80_is_terminal(&instbuf)) { |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2714 jmp(&tmp_code, z80_get_native_address_trans(context, address + after-inst)); |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2715 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2716 z80_handle_deferred(context); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2717 return start; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2718 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2719 code_info tmp_code = *code; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2720 code->cur = orig_start; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2721 code->last = orig_start + ZMAX_NATIVE_SIZE; |
652 | 2722 translate_z80inst(&instbuf, context, address, 0); |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2723 code_info tmp2 = *code; |
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2724 *code = tmp_code; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2725 if (!z80_is_terminal(&instbuf)) { |
652 | 2726 |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2727 jmp(&tmp2, z80_get_native_address_trans(context, address + after-inst)); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2728 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2729 z80_handle_deferred(context); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2730 return orig_start; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2731 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2732 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2733 |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2734 void translate_z80_stream(z80_context * context, uint32_t address) |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2735 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2736 char disbuf[80]; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2737 if (z80_get_native_address(context, address)) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2738 return; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2739 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2740 z80_options * opts = context->options; |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
2741 uint32_t start_address = address; |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2742 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2743 do |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2744 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2745 z80inst inst; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2746 dprintf("translating Z80 code at address %X\n", address); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2747 do { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2748 uint8_t * existing = z80_get_native_address(context, address); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2749 if (existing) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2750 jmp(&opts->gen.code, existing); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2751 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2752 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2753 uint8_t * encoded, *next; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2754 encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2755 if (!encoded) { |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2756 code_info stub = z80_make_interp_stub(context, address); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2757 z80_map_native_address(context, address, stub.cur, 1, stub.last - stub.cur); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2758 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2759 } |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2760 //make sure prologue is in a contiguous chunk of code |
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2761 check_code_prologue(&opts->gen.code); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2762 next = z80_decode(encoded, &inst); |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2763 #ifdef DO_DEBUG_PRINT |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2764 z80_disasm(&inst, disbuf, address); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2765 if (inst.op == Z80_NOP) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2766 printf("%X\t%s(%d)\n", address, disbuf, inst.immed); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2767 } else { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2768 printf("%X\t%s\n", address, disbuf); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2769 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2770 #endif |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2771 code_ptr start = opts->gen.code.cur; |
652 | 2772 translate_z80inst(&inst, context, address, 0); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2773 z80_map_native_address(context, address, start, next-encoded, opts->gen.code.cur - start); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2774 address += next-encoded; |
255
572b935dd030
Properly handle wrapping around to 0 in translate_z80_stream
Mike Pavone <pavone@retrodev.com>
parents:
254
diff
changeset
|
2775 address &= 0xFFFF; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2776 } while (!z80_is_terminal(&inst)); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2777 process_deferred(&opts->gen.deferred, context, (native_addr_func)z80_get_native_address); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2778 if (opts->gen.deferred) { |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2779 address = opts->gen.deferred->address; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2780 dprintf("defferred address: %X\n", address); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2781 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2782 } while (opts->gen.deferred); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2783 } |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2784 |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2785 void init_z80_opts(z80_options * options, memmap_chunk const * chunks, uint32_t num_chunks, memmap_chunk const * io_chunks, uint32_t num_io_chunks, uint32_t clock_divider) |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2786 { |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2787 memset(options, 0, sizeof(*options)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2788 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2789 options->gen.memmap = chunks; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2790 options->gen.memmap_chunks = num_chunks; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2791 options->gen.address_size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2792 options->gen.address_mask = 0xFFFF; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2793 options->gen.max_address = 0x10000; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2794 options->gen.bus_cycles = 3; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2795 options->gen.clock_divider = clock_divider; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2796 options->gen.mem_ptr_off = offsetof(z80_context, mem_pointers); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2797 options->gen.ram_flags_off = offsetof(z80_context, ram_code_flags); |
620
9d6fed6501ba
Fix handling of code writes for Z80 core. This seems to get things close to being back to where they were before the big refactor that broke the Z80 core. Some problems remain. Notably the sound driver in Sonic 2 is still quite broken.
Michael Pavone <pavone@retrodev.com>
parents:
601
diff
changeset
|
2798 options->gen.ram_flags_shift = 7; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2799 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2800 options->flags = 0; |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2801 #ifdef X86_64 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2802 options->regs[Z80_B] = BH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2803 options->regs[Z80_C] = RBX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2804 options->regs[Z80_D] = CH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2805 options->regs[Z80_E] = RCX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2806 options->regs[Z80_H] = AH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2807 options->regs[Z80_L] = RAX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2808 options->regs[Z80_IXH] = DH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2809 options->regs[Z80_IXL] = RDX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2810 options->regs[Z80_IYH] = -1; |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2811 options->regs[Z80_IYL] = R8; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2812 options->regs[Z80_I] = -1; |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2813 options->regs[Z80_R] = RDI; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2814 options->regs[Z80_A] = R10; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2815 options->regs[Z80_BC] = RBX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2816 options->regs[Z80_DE] = RCX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2817 options->regs[Z80_HL] = RAX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2818 options->regs[Z80_SP] = R9; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2819 options->regs[Z80_AF] = -1; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2820 options->regs[Z80_IX] = RDX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2821 options->regs[Z80_IY] = R8; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2822 |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2823 options->gen.scratch1 = R13; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2824 options->gen.scratch2 = R14; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2825 #else |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2826 memset(options->regs, -1, sizeof(options->regs)); |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2827 options->regs[Z80_A] = RAX; |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2828 options->regs[Z80_R] = AH; |
1048
05ecef6c73b6
More efficient register usage in 32-bit mode
Michael Pavone <pavone@retrodev.com>
parents:
1047
diff
changeset
|
2829 options->regs[Z80_H] = BH; |
05ecef6c73b6
More efficient register usage in 32-bit mode
Michael Pavone <pavone@retrodev.com>
parents:
1047
diff
changeset
|
2830 options->regs[Z80_L] = RBX; |
05ecef6c73b6
More efficient register usage in 32-bit mode
Michael Pavone <pavone@retrodev.com>
parents:
1047
diff
changeset
|
2831 options->regs[Z80_HL] = RBX; |
05ecef6c73b6
More efficient register usage in 32-bit mode
Michael Pavone <pavone@retrodev.com>
parents:
1047
diff
changeset
|
2832 |
05ecef6c73b6
More efficient register usage in 32-bit mode
Michael Pavone <pavone@retrodev.com>
parents:
1047
diff
changeset
|
2833 options->regs[Z80_SP] = RDI; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2834 |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2835 options->gen.scratch1 = RCX; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2836 options->gen.scratch2 = RDX; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2837 #endif |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2838 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2839 options->gen.context_reg = RSI; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2840 options->gen.cycles = RBP; |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2841 options->gen.limit = -1; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2842 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2843 options->gen.native_code_map = malloc(sizeof(native_map_slot)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2844 memset(options->gen.native_code_map, 0, sizeof(native_map_slot)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2845 options->gen.deferred = NULL; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2846 options->gen.ram_inst_sizes = malloc(sizeof(uint8_t) * 0x2000 + sizeof(uint8_t *)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2847 options->gen.ram_inst_sizes[0] = (uint8_t *)(options->gen.ram_inst_sizes + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2848 memset(options->gen.ram_inst_sizes[0], 0, sizeof(uint8_t) * 0x2000); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2849 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2850 code_info *code = &options->gen.code; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2851 init_code_info(code); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2852 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2853 options->save_context_scratch = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2854 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2855 mov_rrdisp(code, options->gen.scratch2, options->gen.context_reg, offsetof(z80_context, scratch2), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2856 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2857 options->gen.save_context = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2858 for (int i = 0; i <= Z80_A; i++) |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2859 { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2860 int reg; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2861 uint8_t size; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2862 if (i < Z80_I) { |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2863 reg = i /2 + Z80_BC + (i > Z80_H ? 2 : 0); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2864 size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2865 } else { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2866 reg = i; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2867 size = SZ_B; |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2868 } |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2869 if (reg == Z80_R) { |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2870 and_ir(code, 0x7F, options->regs[Z80_R], SZ_B); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2871 or_rrdisp(code, options->regs[Z80_R], options->gen.context_reg, zr_off(Z80_R), SZ_B); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2872 } else if (options->regs[reg] >= 0) { |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2873 mov_rrdisp(code, options->regs[reg], options->gen.context_reg, zr_off(reg), size); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2874 if (reg == Z80_R) { |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2875 and_irdisp(code, 0x80, options->gen.context_reg, zr_off(reg), SZ_B); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2876 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2877 } |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2878 if (size == SZ_W) { |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2879 i++; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2880 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2881 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2882 if (options->regs[Z80_SP] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2883 mov_rrdisp(code, options->regs[Z80_SP], options->gen.context_reg, offsetof(z80_context, sp), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2884 } |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2885 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2886 add_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2887 mov_rrdisp(code, options->gen.cycles, options->gen.context_reg, offsetof(z80_context, current_cycle), SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2888 retn(code); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2889 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2890 options->load_context_scratch = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2891 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch1), options->gen.scratch1, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2892 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch2), options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2893 options->gen.load_context = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2894 for (int i = 0; i <= Z80_A; i++) |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2895 { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2896 int reg; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2897 uint8_t size; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2898 if (i < Z80_I) { |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2899 reg = i /2 + Z80_BC + (i > Z80_H ? 2 : 0); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2900 size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2901 } else { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2902 reg = i; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2903 size = SZ_B; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2904 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2905 if (options->regs[reg] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2906 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, regs) + i, options->regs[reg], size); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2907 } |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2908 if (size == SZ_W) { |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2909 i++; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2910 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2911 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2912 if (options->regs[Z80_SP] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2913 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, sp), options->regs[Z80_SP], SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2914 } |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2915 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2916 sub_rdispr(code, options->gen.context_reg, offsetof(z80_context, current_cycle), options->gen.cycles, SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2917 retn(code); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2918 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2919 options->native_addr = code->cur; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2920 call(code, options->gen.save_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2921 push_r(code, options->gen.context_reg); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2922 movzx_rr(code, options->gen.scratch1, options->gen.scratch1, SZ_W, SZ_D); |
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2923 call_args(code, (code_ptr)z80_get_native_address_trans, 2, options->gen.context_reg, options->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2924 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2925 pop_r(code, options->gen.context_reg); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2926 call(code, options->gen.load_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2927 retn(code); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2928 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2929 uint32_t tmp_stack_off; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2930 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2931 options->gen.handle_cycle_limit = code->cur; |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2932 //calculate call/stack adjust size |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2933 sub_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2934 call_noalign(code, options->gen.handle_cycle_limit); |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2935 uint32_t call_adjust_size = code->cur - options->gen.handle_cycle_limit; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2936 code->cur = options->gen.handle_cycle_limit; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2937 |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2938 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2939 add_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2940 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2941 code_ptr no_sync = code->cur+1; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2942 jcc(code, CC_B, no_sync); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2943 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2944 add_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2945 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, pc), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2946 call(code, options->save_context_scratch); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2947 tmp_stack_off = code->stack_off; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2948 pop_r(code, RAX); //return address in read/write func |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2949 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2950 pop_r(code, RBX); //return address in translated code |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2951 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2952 sub_ir(code, call_adjust_size, RAX, SZ_PTR); //adjust return address to point to the call + stack adjust that got us here |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2953 mov_rrdisp(code, RBX, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2954 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2955 restore_callee_save_regs(code); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2956 //return to caller of z80_run |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2957 retn(code); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2958 |
598
faad1927d836
Fix an off-by-one error in a branch destination in the generation of handle_cycle_limit for the Z80
Michael Pavone <pavone@retrodev.com>
parents:
597
diff
changeset
|
2959 *no_sync = code->cur - (no_sync + 1); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2960 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2961 add_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2962 retn(code); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2963 code->stack_off = tmp_stack_off; |
652 | 2964 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2965 options->gen.handle_code_write = (code_ptr)z80_handle_code_write; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2966 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2967 options->read_8 = gen_mem_fun(&options->gen, chunks, num_chunks, READ_8, &options->read_8_noinc); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2968 options->write_8 = gen_mem_fun(&options->gen, chunks, num_chunks, WRITE_8, &options->write_8_noinc); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2969 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2970 code_ptr skip_int = code->cur; |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2971 //calculate adjust size |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2972 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2973 uint32_t adjust_size = code->cur - skip_int; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2974 code->cur = skip_int; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2975 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2976 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2977 code_ptr skip_sync = code->cur + 1; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2978 jcc(code, CC_B, skip_sync); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2979 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2980 add_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2981 //save PC |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2982 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, pc), SZ_D); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2983 options->do_sync = code->cur; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2984 call(code, options->gen.save_context); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2985 tmp_stack_off = code->stack_off; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2986 //pop return address off the stack and save for resume later |
898
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2987 //pop_rind(code, options->gen.context_reg); |
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2988 pop_r(code, RAX); |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2989 add_ir(code, adjust_size, RAX, SZ_PTR); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2990 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
898
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2991 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); |
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2992 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2993 //restore callee saved registers |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2994 restore_callee_save_regs(code); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2995 //return to caller of z80_run |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2996 retn(code); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2997 *skip_sync = code->cur - (skip_sync+1); |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2998 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
2999 add_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3000 retn(code); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3001 code->stack_off = tmp_stack_off; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3002 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3003 options->gen.handle_cycle_limit_int = code->cur; |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3004 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3005 add_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.cycles, SZ_D); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3006 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, int_cycle), options->gen.cycles, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3007 jcc(code, CC_B, skip_int); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3008 //set limit to the cycle limit |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3009 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.scratch2, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3010 mov_rrdisp(code, options->gen.scratch2, options->gen.context_reg, offsetof(z80_context, target_cycle), SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3011 neg_r(code, options->gen.cycles, SZ_D); |
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3012 add_rr(code, options->gen.scratch2, options->gen.cycles, SZ_D); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3013 //disable interrupts |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
3014 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
3015 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3016 cycles(&options->gen, 7); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3017 //save return address (in scratch1) to Z80 stack |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3018 sub_ir(code, 2, options->regs[Z80_SP], SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3019 mov_rr(code, options->regs[Z80_SP], options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3020 //we need to do check_cycles and cycles outside of the write_8 call |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3021 //so that the stack has the correct depth if we need to return to C |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3022 //for a synchronization |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3023 check_cycles(&options->gen); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3024 cycles(&options->gen, 3); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3025 //save word to write before call to write_8_noinc |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3026 push_r(code, options->gen.scratch1); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3027 call(code, options->write_8_noinc); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3028 //restore word to write |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3029 pop_r(code, options->gen.scratch1); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3030 //write high byte to SP+1 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3031 mov_rr(code, options->regs[Z80_SP], options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3032 add_ir(code, 1, options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3033 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3034 check_cycles(&options->gen); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3035 cycles(&options->gen, 3); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3036 call(code, options->write_8_noinc); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3037 //dispose of return address as we'll be jumping somewhere else |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3038 add_ir(code, 16, RSP, SZ_PTR); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3039 //TODO: Support interrupt mode 0 and 2 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3040 mov_ir(code, 0x38, options->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3041 call(code, options->native_addr); |
663
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
3042 mov_rrind(code, options->gen.scratch1, options->gen.context_reg, SZ_PTR); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3043 tmp_stack_off = code->stack_off; |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
3044 restore_callee_save_regs(code); |
663
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
3045 //return to caller of z80_run to sync |
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
3046 retn(code); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3047 code->stack_off = tmp_stack_off; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3048 |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3049 //HACK |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3050 options->gen.address_size = SZ_D; |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3051 options->gen.address_mask = 0xFF; |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3052 options->read_io = gen_mem_fun(&options->gen, io_chunks, num_io_chunks, READ_8, NULL); |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3053 options->write_io = gen_mem_fun(&options->gen, io_chunks, num_io_chunks, WRITE_8, NULL); |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3054 options->gen.address_size = SZ_W; |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3055 options->gen.address_mask = 0xFFFF; |
652 | 3056 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3057 options->read_16 = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3058 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3059 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3060 //TODO: figure out how to handle the extra wait state for word reads to bank area |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
3061 //may also need special handling to avoid too much stack depth when access is blocked |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3062 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3063 call(code, options->read_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3064 mov_rr(code, options->gen.scratch1, options->gen.scratch2, SZ_B); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3065 #ifndef X86_64 |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3066 //scratch 2 is a caller save register in 32-bit builds and may be clobbered by something called from the read8 fun |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3067 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, scratch2), SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3068 #endif |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3069 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3070 add_ir(code, 1, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3071 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3072 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3073 call(code, options->read_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3074 shl_ir(code, 8, options->gen.scratch1, SZ_W); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3075 #ifdef X86_64 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3076 mov_rr(code, options->gen.scratch2, options->gen.scratch1, SZ_B); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3077 #else |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3078 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch2), options->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
3079 #endif |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3080 retn(code); |
652 | 3081 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3082 options->write_16_highfirst = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3083 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3084 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3085 push_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3086 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3087 add_ir(code, 1, options->gen.scratch2, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3088 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3089 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3090 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3091 pop_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3092 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3093 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3094 //TODO: Check if we can get away with TCO here |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3095 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3096 retn(code); |
652 | 3097 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3098 options->write_16_lowfirst = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3099 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3100 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3101 push_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3102 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3103 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3104 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3105 pop_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3106 add_ir(code, 1, options->gen.scratch2, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3107 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3108 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3109 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3110 //TODO: Check if we can get away with TCO here |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3111 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3112 retn(code); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3113 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3114 options->retrans_stub = code->cur; |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3115 tmp_stack_off = code->stack_off; |
899
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3116 //calculate size of patch |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3117 mov_ir(code, 0x7FFF, options->gen.scratch1, SZ_D); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3118 code->stack_off += sizeof(void *); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3119 if (code->stack_off & 0xF) { |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3120 sub_ir(code, 16 - (code->stack_off & 0xF), RSP, SZ_PTR); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3121 } |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3122 call_noalign(code, options->retrans_stub); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3123 uint32_t patch_size = code->cur - options->retrans_stub; |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3124 code->cur = options->retrans_stub; |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3125 code->stack_off = tmp_stack_off; |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3126 |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3127 //pop return address |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3128 pop_r(code, options->gen.scratch2); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3129 add_ir(code, 16-sizeof(void*), RSP, SZ_PTR); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3130 code->stack_off = tmp_stack_off; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3131 call(code, options->gen.save_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3132 //adjust pointer before move and call instructions that got us here |
899
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
3133 sub_ir(code, patch_size, options->gen.scratch2, SZ_PTR); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3134 push_r(code, options->gen.context_reg); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
3135 call_args(code, (code_ptr)z80_retranslate_inst, 3, options->gen.scratch1, options->gen.context_reg, options->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3136 pop_r(code, options->gen.context_reg); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3137 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3138 call(code, options->gen.load_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3139 jmp_r(code, options->gen.scratch1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3140 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3141 options->run = (z80_run_fun)code->cur; |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3142 tmp_stack_off = code->stack_off; |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
3143 save_callee_save_regs(code); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
3144 #ifdef X86_64 |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3145 mov_rr(code, RDI, options->gen.context_reg, SZ_PTR); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
3146 #else |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
3147 mov_rdispr(code, RSP, 5 * sizeof(int32_t), options->gen.context_reg, SZ_PTR); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
3148 #endif |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
3149 call(code, options->load_context_scratch); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3150 cmp_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3151 code_ptr no_extra = code->cur+1; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3152 jcc(code, CC_Z, no_extra); |
898
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
3153 sub_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3154 push_rdisp(code, options->gen.context_reg, offsetof(z80_context, extra_pc)); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3155 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3156 *no_extra = code->cur - (no_extra + 1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
3157 jmp_rind(code, options->gen.context_reg); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
3158 code->stack_off = tmp_stack_off; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3159 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3160 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
3161 void init_z80_context(z80_context * context, z80_options * options) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3162 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3163 memset(context, 0, sizeof(*context)); |
360
c42fae88d346
Fix sizeof expression passed to malloc in z80_init to avoid a minor memory error
Mike Pavone <pavone@retrodev.com>
parents:
335
diff
changeset
|
3164 context->static_code_map = malloc(sizeof(*context->static_code_map)); |
259
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
3165 context->static_code_map->base = NULL; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3166 context->static_code_map->offsets = malloc(sizeof(int32_t) * 0x2000); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3167 memset(context->static_code_map->offsets, 0xFF, sizeof(int32_t) * 0x2000); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
3168 context->banked_code_map = malloc(sizeof(native_map_slot)); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
3169 memset(context->banked_code_map, 0, sizeof(native_map_slot)); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3170 context->options = options; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3171 context->int_cycle = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3172 context->int_pulse_start = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3173 context->int_pulse_end = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3174 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3175 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3176 void z80_run(z80_context * context, uint32_t target_cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3177 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3178 if (context->reset || context->busack) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3179 context->current_cycle = target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3180 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3181 if (context->current_cycle < target_cycle) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3182 //busreq is sampled at the end of an m-cycle |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3183 //we can approximate that by running for a single m-cycle after a bus request |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3184 context->sync_cycle = context->busreq ? context->current_cycle + 3*context->options->gen.clock_divider : target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3185 if (!context->native_pc) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3186 context->native_pc = z80_get_native_address_trans(context, context->pc); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3187 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3188 while (context->current_cycle < context->sync_cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3189 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3190 if (context->int_pulse_end < context->current_cycle || context->int_pulse_end == CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3191 z80_next_int_pulse(context); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3192 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3193 if (context->iff1) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3194 context->int_cycle = context->int_pulse_start < context->int_enable_cycle ? context->int_enable_cycle : context->int_pulse_start; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3195 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3196 context->int_cycle = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3197 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3198 context->target_cycle = context->sync_cycle < context->int_cycle ? context->sync_cycle : context->int_cycle; |
670
f4f3e74b0ce6
Restore Z80 interrupt pulse duration and make a small improvement to debug print output
Michael Pavone <pavone@retrodev.com>
parents:
668
diff
changeset
|
3199 dprintf("Running Z80 from cycle %d to cycle %d. Int cycle: %d (%d - %d)\n", context->current_cycle, context->sync_cycle, context->int_cycle, context->int_pulse_start, context->int_pulse_end); |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3200 context->options->run(context); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3201 dprintf("Z80 ran to cycle %d\n", context->current_cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3202 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3203 if (context->busreq) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3204 context->busack = 1; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3205 context->current_cycle = target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3206 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3207 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3208 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3209 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3210 |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
3211 void z80_options_free(z80_options *opts) |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
3212 { |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
3213 free(opts->gen.native_code_map); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
3214 free(opts->gen.ram_inst_sizes); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
3215 free(opts); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
3216 } |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
3217 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3218 void z80_assert_reset(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3219 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3220 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3221 context->reset = 1; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3222 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3223 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3224 void z80_clear_reset(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3225 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3226 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3227 if (context->reset) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3228 //TODO: Handle case where reset is not asserted long enough |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3229 context->im = 0; |
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3230 context->iff1 = context->iff2 = 0; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3231 context->native_pc = NULL; |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3232 context->extra_pc = NULL; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3233 context->pc = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3234 context->reset = 0; |
676
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3235 if (context->busreq) { |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3236 //TODO: Figure out appropriate delay |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3237 context->busack = 1; |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3238 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3239 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3240 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3241 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3242 void z80_assert_busreq(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3243 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3244 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3245 context->busreq = 1; |
854
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3246 //this is an imperfect aproximation since most M-cycles take less tstates than the max |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3247 //and a short 3-tstate m-cycle can take an unbounded number due to wait states |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3248 if (context->current_cycle - cycle > MAX_MCYCLE_LENGTH * context->options->gen.clock_divider) { |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3249 context->busack = 1; |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3250 } |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3251 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3252 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3253 void z80_clear_busreq(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3254 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3255 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3256 context->busreq = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3257 context->busack = 0; |
844
74e161fe7d39
Small tweaks to timing of 68K/Z80 interactions based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
842
diff
changeset
|
3258 //there appears to be at least a 1 Z80 cycle delay between busreq |
74e161fe7d39
Small tweaks to timing of 68K/Z80 interactions based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
842
diff
changeset
|
3259 //being released and resumption of execution |
74e161fe7d39
Small tweaks to timing of 68K/Z80 interactions based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
842
diff
changeset
|
3260 context->current_cycle += context->options->gen.clock_divider; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3261 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3262 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3263 uint8_t z80_get_busack(z80_context * context, uint32_t cycle) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3264 { |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3265 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3266 return context->busack; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3267 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3268 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3269 void z80_adjust_cycles(z80_context * context, uint32_t deduction) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3270 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3271 if (context->current_cycle < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3272 fprintf(stderr, "WARNING: Deduction of %u cycles when Z80 cycle counter is only %u\n", deduction, context->current_cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3273 context->current_cycle = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3274 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3275 context->current_cycle -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3276 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3277 if (context->int_enable_cycle != CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3278 if (context->int_enable_cycle < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3279 context->int_enable_cycle = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3280 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3281 context->int_enable_cycle -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3282 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3283 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3284 if (context->int_pulse_start != CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3285 if (context->int_pulse_end < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3286 context->int_pulse_start = context->int_pulse_end = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3287 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3288 context->int_pulse_end -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3289 if (context->int_pulse_start < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3290 context->int_pulse_start = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3291 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3292 context->int_pulse_start -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3293 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3294 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3295 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3296 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3297 |
652 | 3298 uint32_t zbreakpoint_patch(z80_context * context, uint16_t address, code_ptr dst) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3299 { |
966
f765c2fc7508
Fix crash bug in Z80 debugger introduced with stack alignment changes
Michael Pavone <pavone@retrodev.com>
parents:
900
diff
changeset
|
3300 code_info code = {dst, dst+32}; |
659
759c38bf97f8
Minor Z80 core cleanup
Michael Pavone <pavone@retrodev.com>
parents:
657
diff
changeset
|
3301 mov_ir(&code, address, context->options->gen.scratch1, SZ_W); |
652 | 3302 call(&code, context->bp_stub); |
3303 return code.cur-dst; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3304 } |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3305 |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3306 void zcreate_stub(z80_context * context) |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3307 { |
652 | 3308 z80_options * opts = context->options; |
3309 code_info *code = &opts->gen.code; | |
894
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
3310 uint32_t start_stack_off = code->stack_off; |
652 | 3311 check_code_prologue(code); |
3312 context->bp_stub = code->cur; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3313 |
682 | 3314 //Calculate length of prologue |
652 | 3315 check_cycles_int(&opts->gen, 0); |
3316 int check_int_size = code->cur-context->bp_stub; | |
3317 code->cur = context->bp_stub; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3318 |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3319 //Calculate length of patch |
652 | 3320 int patch_size = zbreakpoint_patch(context, 0, code->cur); |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3321 |
682 | 3322 //Save context and call breakpoint handler |
652 | 3323 call(code, opts->gen.save_context); |
3324 push_r(code, opts->gen.scratch1); | |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
3325 call_args_abi(code, context->bp_handler, 2, opts->gen.context_reg, opts->gen.scratch1); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
3326 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR); |
682 | 3327 //Restore context |
652 | 3328 call(code, opts->gen.load_context); |
3329 pop_r(code, opts->gen.scratch1); | |
682 | 3330 //do prologue stuff |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3331 or_rr(code, opts->gen.cycles, opts->gen.cycles, SZ_D); |
652 | 3332 uint8_t * jmp_off = code->cur+1; |
1047
6b07af1515b5
Change cycle tracking code for Z80 core to only use a single register. Store low 7 bits of R in a reg and increment it appropriately.
Michael Pavone <pavone@retrodev.com>
parents:
1046
diff
changeset
|
3333 jcc(code, CC_NS, code->cur + 7); |
652 | 3334 pop_r(code, opts->gen.scratch1); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
3335 add_ir(code, check_int_size - patch_size, opts->gen.scratch1, SZ_PTR); |
652 | 3336 push_r(code, opts->gen.scratch1); |
3337 jmp(code, opts->gen.handle_cycle_limit_int); | |
3338 *jmp_off = code->cur - (jmp_off+1); | |
682 | 3339 //jump back to body of translated instruction |
652 | 3340 pop_r(code, opts->gen.scratch1); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
3341 add_ir(code, check_int_size - patch_size, opts->gen.scratch1, SZ_PTR); |
652 | 3342 jmp_r(code, opts->gen.scratch1); |
894
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
3343 code->stack_off = start_stack_off; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3344 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3345 |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3346 void zinsert_breakpoint(z80_context * context, uint16_t address, uint8_t * bp_handler) |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3347 { |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3348 context->bp_handler = bp_handler; |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3349 uint8_t bit = 1 << (address % 8); |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3350 if (!(bit & context->breakpoint_flags[address / 8])) { |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3351 context->breakpoint_flags[address / 8] |= bit; |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3352 if (!context->bp_stub) { |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3353 zcreate_stub(context); |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3354 } |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3355 uint8_t * native = z80_get_native_address(context, address); |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3356 if (native) { |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3357 zbreakpoint_patch(context, address, native); |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3358 } |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3359 } |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3360 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3361 |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3362 void zremove_breakpoint(z80_context * context, uint16_t address) |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3363 { |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3364 context->breakpoint_flags[address / 8] &= ~(1 << (address % 8)); |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3365 uint8_t * native = z80_get_native_address(context, address); |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3366 if (native) { |
652 | 3367 z80_options * opts = context->options; |
3368 code_info tmp_code = opts->gen.code; | |
3369 opts->gen.code.cur = native; | |
3370 opts->gen.code.last = native + 16; | |
3371 check_cycles_int(&opts->gen, address); | |
3372 opts->gen.code = tmp_code; | |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
3373 } |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3374 } |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3375 |