Mercurial > repos > blastem
annotate runtime.S @ 193:c66e4636f991
Implement support for self-modifying code
author | Mike Pavone <pavone@retrodev.com> |
---|---|
date | Tue, 15 Jan 2013 00:14:36 -0800 |
parents | e2918b5208eb |
children | 811163790e6c |
rev | line source |
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17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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1 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
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2 .global handle_cycle_limit |
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
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3 .global do_sync |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
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4 handle_cycle_limit: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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5 cmp 84(%rsi), %eax |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
6 jb skip_sync |
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
7 do_sync: |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
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8 call m68k_save_context |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
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9 mov %rsi, %rdi |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
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10 call sync_components |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
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11 mov %rax, %rsi |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
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12 call m68k_load_context |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
13 skip_sync: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
14 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
15 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
16 .global handle_cycle_limit_int |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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17 handle_cycle_limit_int: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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18 cmp 88(%rsi), %eax |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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19 jb skip_int |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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20 /* swap USP and SSP if not already in supervisor mode */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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21 bt $5, 5(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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22 jc already_supervisor |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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23 mov 72(%rsi), %edi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
24 mov %r15d, 72(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
25 mov %edi, %r15d |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
26 already_supervisor: |
175
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
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27 /* save PC */ |
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
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28 sub $4, %r15d |
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
29 mov %r15d, %edi |
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
30 call m68k_write_long_lowfirst |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
31 /* save status register on stack */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
32 sub $2, %r15d |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
33 mov %r15d, %edi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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34 call get_sr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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35 call m68k_write_word |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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36 /* update status register */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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37 andb $0xF8, 5(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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38 mov 92(%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
39 or $0x20, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
40 or %cl, 5(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
41 /* calculate interrupt vector address */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
42 mov 92(%rsi), %ecx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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43 shl $2, %ecx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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44 add $0x60, %ecx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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45 call m68k_read_long_scratch1 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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46 call m68k_native_addr_and_sync |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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47 add $24, %eax |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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48 /* discard function return address */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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49 pop %rdi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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50 jmp *%rcx |
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
51 ret |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
52 skip_int: |
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
53 cmp 84(%rsi), %eax |
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
54 jnb do_sync |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
55 ret |
87
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
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56 |
152
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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57 .global m68k_trap |
79958b95526f
Implement TRAP (untested)
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parents:
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58 m68k_trap: |
79958b95526f
Implement TRAP (untested)
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59 push %rdi |
79958b95526f
Implement TRAP (untested)
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60 push %rcx |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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61 /* swap USP and SSP if not already in supervisor mode */ |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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62 bt $5, 5(%rsi) |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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63 jc already_supervisor_trap |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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64 mov 72(%rsi), %edi |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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65 mov %r15d, 72(%rsi) |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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66 mov %edi, %r15d |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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67 already_supervisor_trap: |
175
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
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68 /* save PC */ |
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
69 sub $4, %r15d |
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
70 mov %r15d, %edi |
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
71 pop %rcx |
7504200cac86
Fix order of SR and PC saved in an exception stack frame
Mike Pavone <pavone@retrodev.com>
parents:
160
diff
changeset
|
72 call m68k_write_long_lowfirst |
152
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
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73 /* save status register on stack */ |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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74 sub $2, %r15d |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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75 mov %r15d, %edi |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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76 call get_sr |
79958b95526f
Implement TRAP (untested)
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parents:
150
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77 call m68k_write_word |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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78 /* update status register */ |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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79 andb $0xF8, 5(%rsi) |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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80 mov 92(%rsi), %cl |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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81 or $0x20, %cl |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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82 or %cl, 5(%rsi) |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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83 /* calculate interrupt vector address */ |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
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84 pop %rcx |
79958b95526f
Implement TRAP (untested)
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parents:
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85 shl $2, %ecx |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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86 add $0x80, %ecx |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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87 call m68k_read_long_scratch1 |
79958b95526f
Implement TRAP (untested)
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parents:
150
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88 call m68k_native_addr_and_sync |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
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89 add $24, %eax |
79958b95526f
Implement TRAP (untested)
Mike Pavone <pavone@retrodev.com>
parents:
150
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90 jmp *%rcx |
176
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
Mike Pavone <pavone@retrodev.com>
parents:
175
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91 |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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92 invalid_msg: |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
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93 .asciz "Invalid instruction at %X\n" |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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94 |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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95 .global m68k_invalid |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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96 m68k_invalid: |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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97 lea invalid_msg(%rip), %rdi |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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98 mov %ecx, %esi |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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99 xor %rax, %rax |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
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100 call printf |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
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101 mov $1, %rdi |
e2918b5208eb
Print a message when we try to run an invalid instruction, not when we try to translate it
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parents:
175
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102 call exit |
150
3e68e517cc01
Do a sync when interrupt mask changes so we can recompute the next interrupt cycle. Also fix a bug in which the SR part of ORI to SR was not being performed.
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
103 |
87
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
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|
104 int_dbg_msg: |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
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105 .asciz "Executing Interrupt!" |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
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106 print_int_dbg: |
60b5c9e2f4e0
vertical interrupts now work
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parents:
86
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|
107 call m68k_save_context |
60b5c9e2f4e0
vertical interrupts now work
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108 push %rsi |
60b5c9e2f4e0
vertical interrupts now work
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|
109 lea int_dbg_msg(%rip), %rdi |
60b5c9e2f4e0
vertical interrupts now work
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|
110 call puts |
60b5c9e2f4e0
vertical interrupts now work
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diff
changeset
|
111 pop %rsi |
60b5c9e2f4e0
vertical interrupts now work
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|
112 call m68k_load_context |
60b5c9e2f4e0
vertical interrupts now work
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|
113 ret |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
114 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
115 .global get_sr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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116 get_sr: |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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117 mov 5(%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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118 shl $8, %cx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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119 mov (%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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120 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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121 or %bl, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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122 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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123 or %dl, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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124 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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125 or %bh, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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126 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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127 or %dh, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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128 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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129 |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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130 .global set_sr |
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131 set_sr: |
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132 mov %cl, %dh |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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133 and $1, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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134 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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135 mov %cl, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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parents:
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changeset
|
136 and $1, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
137 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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138 mov %cl, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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139 and $1, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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140 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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141 mov %cl, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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142 and $1, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
143 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
144 and $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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145 mov %cl, (%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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146 shr $8, %cx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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147 mov %cl, 5(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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148 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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149 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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150 .global set_ccr |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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151 set_ccr: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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152 mov %cl, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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153 and $1, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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154 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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155 mov %cl, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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156 and $1, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
157 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
158 mov %cl, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
159 and $1, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
160 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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changeset
|
161 mov %cl, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
162 and $1, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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|
163 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
164 and $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
165 mov %cl, (%rsi) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
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|
166 ret |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
167 |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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changeset
|
168 do_vdp_port_write: |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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|
169 call m68k_save_context |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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|
170 mov %rcx, %rdx |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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|
171 call vdp_port_write |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
172 mov %rax, %rsi |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
173 call m68k_load_context |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
174 ret |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
175 |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
176 do_vdp_port_read: |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
177 mov %ecx, %edi |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
178 call m68k_save_context |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
179 call vdp_port_read |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
180 mov %rax, %rsi |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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diff
changeset
|
181 call m68k_load_context |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
182 mov 136(%rsi), %cx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
183 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
184 |
66 | 185 do_io_write: |
186 call m68k_save_context | |
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
187 and $0x1FFFF, %edi |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
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|
188 mov %ecx, %edx |
66 | 189 call io_write |
190 mov %rax, %rsi | |
191 call m68k_load_context | |
192 ret | |
193 do_io_read: | |
194 mov %ecx, %edi | |
153
42c031184e8a
Implement access to Z80 RAM
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parents:
152
diff
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|
195 and $0x1FFFF, %edi |
66 | 196 call m68k_save_context |
197 call io_read | |
198 mov %rax, %rsi | |
199 call m68k_load_context | |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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parents:
72
diff
changeset
|
200 mov 136(%rsi), %cl |
66 | 201 ret |
83
2c7267617d71
Implement Z80 reset and bus request registers.
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parents:
82
diff
changeset
|
202 |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
203 do_io_write_w: |
2c7267617d71
Implement Z80 reset and bus request registers.
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parents:
82
diff
changeset
|
204 call m68k_save_context |
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
205 and $0x1FFFF, %edi |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
206 mov %ecx, %edx |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
207 call io_write_w |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
208 mov %rax, %rsi |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
209 call m68k_load_context |
2c7267617d71
Implement Z80 reset and bus request registers.
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parents:
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diff
changeset
|
210 ret |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
211 do_io_read_w: |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
212 mov %ecx, %edi |
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
213 and $0x1FFFF, %edi |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
214 call m68k_save_context |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
215 call io_read_w |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
216 mov %rax, %rsi |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
217 call m68k_load_context |
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
218 mov 136(%rsi), %cx |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
219 ret |
66 | 220 |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
221 bad_access_msg: |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
222 .asciz "Program tried to access illegal 68K address %X\n" |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
223 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
224 .global m68k_write_word |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
225 .global try_fifo_write |
18
3e7bfde7606e
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226 m68k_write_word: |
64
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227 call inccycles |
18
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228 and $0xFFFFFF, %rdi |
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229 cmp $0x400000, %edi |
104
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230 jbe cart_w |
18
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231 cmp $0xE00000, %edi |
104
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|
232 jae workram_w |
54
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|
233 cmp $0xC00000, %edi |
104
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|
234 jae vdp_psg_w |
153
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|
235 cmp $0xA00000, %edi |
104
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|
236 jb not_io_w |
85
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237 cmp $0xA12000, %edi |
104
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238 jae not_io_w |
85
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239 jmp do_io_write_w |
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|
240 not_io_w: |
64
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241 ret |
18
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242 workram_w: |
193
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|
243 and $0xFFFF, %edi |
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244 mov %cx, (%r9, %rdi) |
193
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245 mov %edi, %ecx |
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246 shr $10, %ecx |
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247 bt %ecx, 160(%rsi) |
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248 jnc not_code |
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249 call m68k_save_context |
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250 call m68k_handle_code_write |
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251 mov %rax, %rsi |
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252 call m68k_load_context |
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253 not_code: |
64
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254 ret |
18
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255 cart_w: |
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256 mov %cx, (%r8, %rdi) |
64
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257 ret |
54
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258 vdp_psg_w: |
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259 test $0x2700E0, %edi |
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260 jnz crash |
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261 and $0x1F, %edi |
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262 cmp $4, %edi |
104
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263 jb try_fifo_write |
54
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264 jmp do_vdp_port_write |
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265 try_fifo_write: |
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266 push %rdx |
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267 push %rbx |
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268 /* fetch VDP context pointer from 68K context */ |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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269 mov 128(%rsi), %rdx |
149
139e5dcd6aa3
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270 /* check DMA flag */ |
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271 bt $6, 19(%rdx) |
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272 jc fifo_fallback |
54
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273 /* get fifo_cur and compare it to fifo_end */ |
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274 mov (%rdx), %rbx |
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275 cmp %rbx, 8(%rdx) |
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276 /* bail out if fifo is full */ |
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277 je fifo_fallback |
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278 /* populate FIFO entry */ |
138 | 279 mov %cx, 6(%rbx) /* value */ |
280 mov 16(%rdx), %cx | |
281 mov %cx, 4(%rbx) /* address */ | |
282 mov 18(%rdx), %cl | |
283 mov %cl, 8(%rbx) /* cd */ | |
284 movb $0, 9(%rbx) /* partial */ | |
54
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285 mov %eax, %ecx |
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286 shl $3, %ecx /* multiply by 68K cycle by 7 to get MCLK cycle */ |
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287 sub %eax, %ecx |
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288 mov %ecx, (%rbx) /* cycle */ |
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289 /* update fifo_cur and store back in 68K context */ |
138 | 290 add $12, %rbx |
54
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291 mov %rbx, (%rdx) |
138 | 292 /* update address register */ |
293 movzbw 35(%rdx), %bx | |
294 add %bx, 16(%rdx) | |
54
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|
295 /* clear pending flag */ |
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|
296 andb $0xEF, 19(%rdx) |
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297 pop %rbx |
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298 pop %rdx |
64
2b1a65f4b85d
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299 ret |
54
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|
300 fifo_fallback: |
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301 pop %rbx |
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302 pop %rdx |
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303 jmp do_vdp_port_write |
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304 crash: |
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changeset
|
305 mov %edi, %esi |
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diff
changeset
|
306 lea bad_access_msg(%rip), %rdi |
160
69ac23d42897
Fix crash in printf from "crash" function due to lack of clearing rax
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153
diff
changeset
|
307 xor %rax, %rax |
54
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|
308 call printf |
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changeset
|
309 mov $1, %rdi |
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|
310 call exit |
18
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311 |
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312 .global m68k_write_byte |
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313 m68k_write_byte: |
64
2b1a65f4b85d
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|
314 call inccycles |
18
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315 and $0xFFFFFF, %rdi |
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|
316 cmp $0x400000, %edi |
104
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317 jbe cart_wb |
18
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318 cmp $0xE00000, %edi |
104
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|
319 jae workram_wb |
66 | 320 cmp $0xC00000, %edi |
104
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|
321 jae vdp_psg_wb |
153
42c031184e8a
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|
322 cmp $0xA00000, %edi |
104
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changeset
|
323 jb not_io_wb |
85
1db2a0b655d1
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diff
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|
324 cmp $0xA12000, %edi |
104
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|
325 jae not_io_wb |
66 | 326 jmp do_io_write |
327 not_io_wb: | |
64
2b1a65f4b85d
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|
328 ret |
18
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|
329 workram_wb: |
83
2c7267617d71
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|
330 /* deal with byte swapping */ |
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|
331 xor $1, %edi |
18
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|
332 and $0xFFFF, %rdi |
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|
333 mov %cl, (%r9, %rdi) |
193
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|
334 mov %edi, %ecx |
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|
335 shr $10, %ecx |
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|
336 bt %ecx, 160(%rsi) |
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337 jnc not_code_b |
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338 xor $1, %edi |
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339 call m68k_save_context |
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340 call m68k_handle_code_write |
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341 mov %rax, %rsi |
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342 call m68k_load_context |
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343 not_code_b: |
64
2b1a65f4b85d
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|
344 ret |
18
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|
345 cart_wb: |
83
2c7267617d71
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|
346 /* deal with byte swapping */ |
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changeset
|
347 xor $1, %edi |
18
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changeset
|
348 mov %cl, (%r8, %rdi) |
64
2b1a65f4b85d
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changeset
|
349 ret |
66 | 350 vdp_psg_wb: |
351 push %rdx | |
352 mov %cl, %dl | |
353 and $0xFF, %cx | |
354 shl $8, %dx | |
355 or %dx, %cx | |
356 pop %rdx | |
357 jmp vdp_psg_w | |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
358 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
359 .global m68k_write_long_lowfirst |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
360 m68k_write_long_lowfirst: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
361 push %rdi |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
362 push %rcx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
363 add $2, %edi |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
364 call m68k_write_word |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
365 pop %rcx |
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
366 pop %rdi |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
367 shr $16, %ecx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
368 jmp m68k_write_word |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
369 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
370 .global m68k_write_long_highfirst |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
371 m68k_write_long_highfirst: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
372 push %rdi |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
373 push %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
374 shr $16, %ecx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
375 call m68k_write_word |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
376 pop %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
377 pop %rdi |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
378 add $2, %rdi |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
379 jmp m68k_write_word |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
380 |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
381 inccycles: |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
382 cmp %rbp, %rax |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
383 jnb do_limit |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
384 add $4, %rax |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
385 ret |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
386 do_limit: |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
387 push %rcx |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
388 push %rdi |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
389 call handle_cycle_limit |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
390 pop %rdi |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
391 pop %rcx |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
392 add $4, %rax |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
393 ret |
17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
394 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
395 .global m68k_read_word_scratch1 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
396 m68k_read_word_scratch1: |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
397 call inccycles |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
398 and $0xFFFFFF, %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
399 cmp $0x400000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
400 jbe cart |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
401 cmp $0xE00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
402 jae workram |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
403 cmp $0xC00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
404 jae vdp_psg |
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
405 cmp $0xA00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
406 jb not_io |
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
407 cmp $0xA12000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
408 jae not_io |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
409 call do_io_read_w |
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
410 ret |
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
411 not_io: |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
412 xor %cx, %cx |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
413 dec %cx |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
414 ret |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
415 workram: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
416 and $0xFFFF, %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
417 mov (%r9, %rcx), %cx |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
418 ret |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
419 vdp_psg: |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
420 test $0x2700E0, %ecx |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
421 jnz crash |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
422 and $0x1F, %ecx |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
423 jmp do_vdp_port_read |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
424 cart: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
425 mov (%r8, %rcx), %cx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
426 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
427 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
428 .global m68k_read_long_scratch1 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
429 m68k_read_long_scratch1: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
430 push %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
431 call m68k_read_word_scratch1 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
432 mov %cx, %di |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
433 pop %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
434 add $2, %ecx |
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
435 push %rdi |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
436 call m68k_read_word_scratch1 |
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
437 pop %rdi |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
438 and $0xFFFF, %ecx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
439 shl $16, %edi |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
440 or %edi, %ecx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
441 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
442 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
443 .global m68k_read_byte_scratch1 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
444 m68k_read_byte_scratch1: |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
445 call inccycles |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
446 and $0xFFFFFF, %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
447 cmp $0x400000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
448 jbe cart_b |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
449 cmp $0xE00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
450 jae workram_b |
137 | 451 cmp $0xC00000, %ecx |
452 jae vdp_psg_b | |
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
453 cmp $0xA00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
454 jb not_io_b |
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
455 cmp $0xA12000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
456 jae not_io_b |
66 | 457 jmp do_io_read |
458 not_io_b: | |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
459 xor %cl, %cl |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
460 dec %cl |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
461 ret |
137 | 462 vdp_psg_b: |
463 test $0x2700E0, %ecx | |
464 jnz crash | |
465 and $0x1F, %ecx | |
466 bt $0, %ecx | |
467 jnc vdp_swap | |
468 jmp do_vdp_port_read | |
469 vdp_swap: | |
470 call do_vdp_port_read | |
471 shr $8, %cx | |
472 ret | |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
473 workram_b: |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
474 /* deal with byte swapping */ |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
475 xor $1, %ecx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
476 and $0xFFFF, %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
477 mov (%r9, %rcx), %cl |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
478 ret |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
479 cart_b: |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
480 /* deal with byte swapping */ |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
481 xor $1, %ecx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
482 mov (%r8, %rcx), %cl |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
483 ret |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
484 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
485 .global m68k_modified_ret_addr |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
486 m68k_modified_ret_addr: |
145
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
487 add $16, %rsp |
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
488 call m68k_native_addr |
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
489 jmp *%rcx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
490 |
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
491 dyn_addr_msg: |
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
492 .asciz "Program needs dynamically calculated native address\n" |
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
493 |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
494 .global m68k_native_addr_and_sync |
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
495 m68k_native_addr_and_sync: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
496 call m68k_save_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
497 push %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
498 mov %rsi, %rdi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
499 call sync_components |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
500 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
501 push %rax |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
502 mov %rax, %rdi |
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
503 call get_native_address_trans |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
504 mov %rax, %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
505 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
506 call m68k_load_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
507 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
508 |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
509 .global m68k_native_addr |
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
510 m68k_native_addr: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
511 call m68k_save_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
512 push %rsi |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
513 mov %rsi, %rdi |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
514 mov %ecx, %esi |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
515 call get_native_address_trans |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
516 mov %rax, %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
517 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
518 call m68k_load_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
519 ret |
193
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
520 |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
521 .global m68k_retrans_stub |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
522 m68k_retrans_stub: |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
523 call m68k_save_context |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
524 push %rsi |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
525 call m68k_retranslate_inst |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
526 pop %rsi |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
527 mov %rax, %rcx |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
528 call m68k_load_context |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
176
diff
changeset
|
529 jmp *%rcx |
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
530 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
531 .global m68k_save_context |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
532 m68k_save_context: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
533 mov %bl, 1(%rsi) /* N Flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
534 mov %bh, 2(%rsi) /* V flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
535 mov %dl, 3(%rsi) /* Z flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
536 mov %dh, 4(%rsi) /* C flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
537 mov %r10d, 8(%rsi) /* d0 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
538 mov %r11d, 12(%rsi) /* d1 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
539 mov %r12d, 16(%rsi) /* d2 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
540 mov %r13d, 40(%rsi) /* a0 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
541 mov %r14d, 44(%rsi) /* a1 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
542 mov %r15d, 68(%rsi) /* a7 */ |
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
543 mov %eax, 80(%rsi) /* current cycle count */ |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
544 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
545 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
546 .global m68k_load_context |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
547 m68k_load_context: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
548 mov 1(%rsi), %bl /* N Flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
549 mov 2(%rsi), %bh /* V flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
550 mov 3(%rsi), %dl /* Z flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
551 mov 4(%rsi), %dh /* C flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
552 mov 8(%rsi), %r10d /* d0 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
553 mov 12(%rsi), %r11d /* d1 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
554 mov 16(%rsi), %r12d /* d2 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
555 mov 40(%rsi), %r13d /* a0 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
556 mov 44(%rsi), %r14d /* a1 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
557 mov 68(%rsi), %r15d /* a7 */ |
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
558 mov 76(%rsi), %ebp /* target cycle count */ |
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
559 mov 80(%rsi), %eax /* current cycle count */ |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
560 mov 96(%rsi), %r8d /* cartridge address */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
561 mov 104(%rsi), %r9d /* work ram address */ |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
562 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
563 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
564 .global m68k_start_context |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
565 m68k_start_context: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
566 call m68k_load_context |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
567 jmp *%rdi |