Mercurial > repos > blastem
annotate blastem.c @ 217:acd29e2664c6
Added testcases file. Some fixes to test generator for dealing with indexed mode with base and index reg the same. Added support for blastem headless mode in test runner.
author | Mike Pavone <pavone@retrodev.com> |
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date | Sat, 20 Apr 2013 00:29:14 -0700 |
parents | 2b1c2c28b261 |
children | 625f8e4d5fd2 |
rev | line source |
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1 #include "68kinst.h" |
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2 #include "m68k_to_x86.h" |
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3 #include "mem.h" |
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4 #include "vdp.h" |
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5 #include "render.h" |
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6 #include "blastem.h" |
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7 #include <stdio.h> |
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8 #include <stdlib.h> |
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9 #include <string.h> |
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10 |
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11 #define CARTRIDGE_WORDS 0x200000 |
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12 #define RAM_WORDS 32 * 1024 |
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13 #define Z80_RAM_BYTES 8 * 1024 |
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14 #define MCLKS_PER_68K 7 |
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15 //TODO: Figure out the exact value for this |
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16 #define MCLKS_PER_FRAME (MCLKS_LINE*262) |
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17 #define CYCLE_NEVER 0xFFFFFFFF |
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18 |
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19 uint16_t cart[CARTRIDGE_WORDS]; |
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20 uint16_t ram[RAM_WORDS]; |
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21 uint8_t z80_ram[Z80_RAM_BYTES]; |
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22 |
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23 io_port gamepad_1; |
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24 io_port gamepad_2; |
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25 |
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26 int headless = 0; |
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27 |
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28 #ifndef MIN |
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29 #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
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30 #endif |
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31 |
166 | 32 #define SMD_HEADER_SIZE 512 |
33 #define SMD_MAGIC1 0x03 | |
34 #define SMD_MAGIC2 0xAA | |
35 #define SMD_MAGIC3 0xBB | |
36 #define SMD_BLOCK_SIZE 0x4000 | |
37 | |
38 int load_smd_rom(long filesize, FILE * f) | |
39 { | |
40 uint8_t block[SMD_BLOCK_SIZE]; | |
41 filesize -= SMD_HEADER_SIZE; | |
42 fseek(f, SMD_HEADER_SIZE, SEEK_SET); | |
43 | |
44 uint16_t * dst = cart; | |
45 while (filesize > 0) { | |
46 fread(block, 1, SMD_BLOCK_SIZE, f); | |
47 for (uint8_t *low = block, *high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) { | |
48 *(dst++) = *high << 8 | *low; | |
49 } | |
50 filesize -= SMD_BLOCK_SIZE; | |
51 } | |
52 return 1; | |
53 } | |
54 | |
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55 int load_rom(char * filename) |
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56 { |
166 | 57 uint8_t header[10]; |
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58 FILE * f = fopen(filename, "rb"); |
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59 if (!f) { |
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60 return 0; |
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61 } |
166 | 62 fread(header, 1, sizeof(header), f); |
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63 fseek(f, 0, SEEK_END); |
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64 long filesize = ftell(f); |
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65 if (filesize/2 > CARTRIDGE_WORDS) { |
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66 //carts bigger than 4MB not currently supported |
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67 filesize = CARTRIDGE_WORDS*2; |
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68 } |
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69 fseek(f, 0, SEEK_SET); |
166 | 70 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) { |
71 int i; | |
72 for (i = 3; i < 8; i++) { | |
73 if (header[i] != 0) { | |
74 break; | |
75 } | |
76 } | |
77 if (i == 8) { | |
78 if (header[2]) { | |
79 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename); | |
80 exit(1); | |
81 } | |
82 return load_smd_rom(filesize, f); | |
83 } | |
84 } | |
85 fread(cart, 2, filesize/2, f); | |
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86 fclose(f); |
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87 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur) |
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88 { |
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89 *cur = (*cur >> 8) | (*cur << 8); |
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90 } |
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91 //TODO: Mirror ROM |
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92 return 1; |
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93 } |
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94 |
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95 uint16_t read_dma_value(uint32_t address) |
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96 { |
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97 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2 |
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98 if (address < 0x200000) { |
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99 return cart[address]; |
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100 } else if(address >= 0x700000) { |
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101 return ram[address & 0x7FFF]; |
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102 } |
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103 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area |
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104 return 0; |
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105 } |
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106 |
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107 #define VINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_68K) |
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108 |
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109 void adjust_int_cycle(m68k_context * context, vdp_context * v_context) |
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110 { |
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111 if (!(v_context->regs[REG_MODE_2] & 0x20 && ((context->status & 0x7) < 6)) || context->current_cycle >= VINT_CYCLE) { |
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112 context->int_cycle = CYCLE_NEVER; |
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113 context->target_cycle = context->sync_cycle; |
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114 } else if (context->int_cycle > VINT_CYCLE) { |
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115 context->int_cycle = VINT_CYCLE; |
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116 context->int_num = 6; |
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117 if (context->int_cycle < context->sync_cycle) { |
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118 context->target_cycle = context->int_cycle; |
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119 } |
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120 } |
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121 } |
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122 |
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123 int break_on_sync = 0; |
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124 |
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125 m68k_context * sync_components(m68k_context * context, uint32_t address) |
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126 { |
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127 //TODO: Handle sync targets smaller than a single frame |
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128 vdp_context * v_context = context->next_context; |
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129 uint32_t mclks = context->current_cycle * MCLKS_PER_68K; |
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130 if (mclks >= MCLKS_PER_FRAME) { |
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131 //printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks); |
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132 vdp_run_context(v_context, MCLKS_PER_FRAME); |
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133 if (!headless) { |
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134 break_on_sync |= wait_render_frame(v_context); |
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135 } |
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136 mclks -= MCLKS_PER_FRAME; |
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137 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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138 io_adjust_cycles(&gamepad_1, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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139 io_adjust_cycles(&gamepad_2, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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140 context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_68K; |
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141 if (mclks) { |
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142 vdp_run_context(v_context, mclks); |
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143 } |
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144 } else { |
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145 //printf("running VDP for %d cycles\n", mclks - v_context->cycles); |
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146 vdp_run_context(v_context, mclks); |
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147 } |
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148 adjust_int_cycle(context, v_context); |
198
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149 if (break_on_sync && address) { |
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150 break_on_sync = 0; |
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151 debugger(context, address); |
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152 } |
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153 return context; |
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154 } |
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155 |
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156 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value) |
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157 { |
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158 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle); |
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159 sync_components(context, 0); |
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160 vdp_context * v_context = context->next_context; |
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161 if (vdp_port < 0x10) { |
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162 int blocked; |
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163 if (vdp_port < 4) { |
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164 while (vdp_data_port_write(v_context, value) < 0) { |
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165 while(v_context->flags & FLAG_DMA_RUN) { |
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166 vdp_run_dma_done(v_context, MCLKS_PER_FRAME); |
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167 if (v_context->cycles >= MCLKS_PER_FRAME) { |
215
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168 if (!headless) { |
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169 wait_render_frame(v_context); |
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170 } |
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171 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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172 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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173 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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174 } |
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175 } |
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176 context->current_cycle = v_context->cycles / MCLKS_PER_68K; |
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177 } |
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178 } else if(vdp_port < 8) { |
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179 blocked = vdp_control_port_write(v_context, value); |
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180 if (blocked) { |
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181 while (blocked) { |
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182 while(v_context->flags & FLAG_DMA_RUN) { |
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183 vdp_run_dma_done(v_context, MCLKS_PER_FRAME); |
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184 if (v_context->cycles >= MCLKS_PER_FRAME) { |
215
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185 if (!headless) { |
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186 wait_render_frame(v_context); |
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187 } |
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188 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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189 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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190 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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191 } |
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192 } |
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193 if (blocked < 0) { |
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194 blocked = vdp_control_port_write(v_context, value); |
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195 } else { |
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196 blocked = 0; |
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197 } |
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198 } |
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199 context->current_cycle = v_context->cycles / MCLKS_PER_68K; |
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200 } else { |
186
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201 adjust_int_cycle(context, v_context); |
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202 } |
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203 } else { |
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204 printf("Illegal write to HV Counter port %X\n", vdp_port); |
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205 exit(1); |
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206 } |
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207 context->current_cycle = v_context->cycles/MCLKS_PER_68K; |
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208 } else if (vdp_port < 0x18) { |
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209 //TODO: Implement PSG |
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210 } else { |
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211 //TODO: Implement undocumented test register(s) |
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212 } |
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213 return context; |
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214 } |
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215 |
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216 m68k_context * vdp_port_read(uint32_t vdp_port, m68k_context * context) |
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217 { |
198
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218 sync_components(context, 0); |
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219 vdp_context * v_context = context->next_context; |
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220 if (vdp_port < 0x10) { |
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221 if (vdp_port < 4) { |
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222 context->value = vdp_data_port_read(v_context); |
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223 } else if(vdp_port < 8) { |
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224 context->value = vdp_control_port_read(v_context); |
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225 } else { |
137 | 226 context->value = vdp_hv_counter_read(v_context); |
227 //printf("HV Counter: %X at cycle %d\n", context->value, v_context->cycles); | |
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228 } |
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229 context->current_cycle = v_context->cycles/MCLKS_PER_68K; |
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230 } else { |
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231 printf("Illegal read from PSG or test register port %X\n", vdp_port); |
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232 exit(1); |
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233 } |
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234 return context; |
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235 } |
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236 |
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237 #define TH 0x40 |
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238 #define TH_TIMEOUT 8000 |
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239 #define Z80_ACK_DELAY 3 //TODO: Calculate this on the fly based on how synced up the Z80 and 68K clocks are |
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240 |
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241 uint8_t reset = 1; |
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242 uint8_t busreq = 0; |
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243 uint8_t busack = 0; |
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244 uint32_t busack_cycle = CYCLE_NEVER; |
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245 uint8_t new_busack = 0; |
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246 |
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247 void io_adjust_cycles(io_port * pad, uint32_t current_cycle, uint32_t deduction) |
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248 { |
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249 /*uint8_t control = pad->control | 0x80; |
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250 uint8_t th = control & pad->output; |
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251 if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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252 printf("adjust_cycles | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, current_cycle); |
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253 }*/ |
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254 if (current_cycle >= pad->timeout_cycle) { |
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255 pad->th_counter = 0; |
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256 } else { |
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257 pad->timeout_cycle -= deduction; |
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258 } |
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259 if (busack_cycle < CYCLE_NEVER && current_cycle < busack_cycle) { |
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260 busack_cycle -= deduction; |
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261 } |
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262 } |
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263 |
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264 void io_data_write(io_port * pad, m68k_context * context, uint8_t value) |
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265 { |
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266 if (pad->control & TH) { |
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267 //check if TH has changed |
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268 if ((pad->output & TH) ^ (value & TH)) { |
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269 if (context->current_cycle >= pad->timeout_cycle) { |
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270 pad->th_counter = 0; |
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271 } |
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272 if (!(value & TH)) { |
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273 pad->th_counter++; |
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274 } |
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275 pad->timeout_cycle = context->current_cycle + TH_TIMEOUT; |
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276 } |
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277 } |
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278 pad->output = value; |
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279 } |
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280 |
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281 void io_data_read(io_port * pad, m68k_context * context) |
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282 { |
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283 uint8_t control = pad->control | 0x80; |
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284 uint8_t th = control & pad->output; |
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285 uint8_t input; |
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286 if (context->current_cycle >= pad->timeout_cycle) { |
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287 pad->th_counter = 0; |
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288 } |
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289 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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290 printf("io_data_read | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, context->current_cycle); |
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291 }*/ |
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292 if (th) { |
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293 if (pad->th_counter == 3) { |
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294 input = pad->input[GAMEPAD_EXTRA]; |
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295 } else { |
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296 input = pad->input[GAMEPAD_TH1]; |
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297 } |
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298 } else { |
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299 if (pad->th_counter == 3) { |
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300 input = pad->input[GAMEPAD_TH0] | 0xF; |
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301 } else if(pad->th_counter == 4) { |
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302 input = pad->input[GAMEPAD_TH0] & 0x30; |
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303 } else { |
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304 input = pad->input[GAMEPAD_TH0] | 0xC; |
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305 } |
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306 } |
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307 context->value = ((~input) & (~control)) | (pad->output & control); |
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308 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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309 printf ("value: %X\n", context->value); |
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310 }*/ |
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311 } |
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312 |
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313 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value) |
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314 { |
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315 if (location < 0x10000) { |
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316 if (busack_cycle > context->current_cycle) { |
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317 busack = new_busack; |
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318 busack_cycle = CYCLE_NEVER; |
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319 } |
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320 if (!(busack || reset)) { |
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321 location &= 0x7FFF; |
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322 if (location < 0x4000) { |
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323 z80_ram[location & 0x1FFF] = value; |
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324 } |
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325 } |
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326 } else { |
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327 location &= 0x1FFF; |
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328 if (location < 0x100) { |
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329 switch(location/2) |
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330 { |
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331 case 0x1: |
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332 io_data_write(&gamepad_1, context, value); |
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333 break; |
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334 case 0x2: |
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335 io_data_write(&gamepad_2, context, value); |
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336 break; |
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337 case 0x3://PORT C Data |
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338 break; |
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339 case 0x4: |
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340 gamepad_1.control = value; |
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341 break; |
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342 case 0x5: |
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343 gamepad_2.control = value; |
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344 break; |
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345 } |
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346 } else { |
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347 if (location == 0x1100) { |
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348 if (busack_cycle > context->current_cycle) { |
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349 busack = new_busack; |
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350 busack_cycle = CYCLE_NEVER; |
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351 } |
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352 if (value & 1) { |
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353 busreq = 1; |
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354 if(!reset) { |
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355 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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356 new_busack = 0; |
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357 } |
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358 } else { |
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359 busreq = 0; |
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360 busack_cycle = CYCLE_NEVER; |
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361 busack = 1; |
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362 } |
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363 } else if (location == 0x1200) { |
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364 if (value & 1) { |
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365 if (reset && busreq) { |
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366 new_busack = 0; |
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367 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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368 } |
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369 reset = 0; |
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370 } else { |
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371 reset = 1; |
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372 } |
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373 } |
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374 } |
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375 } |
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376 return context; |
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377 } |
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378 |
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379 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value) |
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380 { |
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381 if (location < 0x10000) { |
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382 if (busack_cycle > context->current_cycle) { |
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383 busack = new_busack; |
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384 busack_cycle = CYCLE_NEVER; |
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385 } |
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386 if (!(busack || reset)) { |
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387 location &= 0x7FFF; |
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388 if (location < 0x4000) { |
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389 z80_ram[location & 0x1FFE] = value >> 8; |
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390 } |
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391 } |
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392 } else { |
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393 location &= 0x1FFF; |
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394 if (location < 0x100) { |
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395 switch(location/2) |
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396 { |
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397 case 0x1: |
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398 io_data_write(&gamepad_1, context, value); |
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399 break; |
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400 case 0x2: |
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401 io_data_write(&gamepad_2, context, value); |
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402 break; |
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403 case 0x3://PORT C Data |
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404 break; |
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405 case 0x4: |
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406 gamepad_1.control = value; |
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407 break; |
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408 case 0x5: |
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409 gamepad_2.control = value; |
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410 break; |
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411 } |
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412 } else { |
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413 //printf("IO Write of %X to %X @ %d\n", value, location, context->current_cycle); |
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414 if (location == 0x1100) { |
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415 if (busack_cycle > context->current_cycle) { |
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416 busack = new_busack; |
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417 busack_cycle = CYCLE_NEVER; |
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418 } |
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419 if (value & 0x100) { |
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420 busreq = 1; |
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421 if(!reset) { |
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422 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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423 new_busack = 0; |
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424 } |
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425 } else { |
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426 busreq = 0; |
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427 busack_cycle = CYCLE_NEVER; |
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428 busack = 1; |
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429 } |
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430 } else if (location == 0x1200) { |
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431 if (value & 0x100) { |
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432 if (reset && busreq) { |
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433 new_busack = 0; |
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434 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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435 } |
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436 reset = 0; |
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437 } else { |
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438 reset = 1; |
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439 } |
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440 } |
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441 } |
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442 } |
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443 return context; |
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444 } |
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445 |
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446 #define USA 0x80 |
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447 #define JAP 0x00 |
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448 #define EUR 0xC0 |
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449 #define NO_DISK 0x20 |
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450 uint8_t version_reg = NO_DISK | USA; |
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451 |
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452 m68k_context * io_read(uint32_t location, m68k_context * context) |
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453 { |
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454 if (location < 0x10000) { |
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455 if (busack_cycle > context->current_cycle) { |
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456 busack = new_busack; |
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457 busack_cycle = CYCLE_NEVER; |
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458 } |
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459 if (!(busack || reset)) { |
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460 location &= 0x7FFF; |
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461 if (location < 0x4000) { |
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462 context->value = z80_ram[location & 0x1FFF]; |
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463 } else { |
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464 context->value = 0xFF; |
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465 } |
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466 } else { |
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467 context->value = 0xFF; |
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468 } |
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469 } else { |
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470 location &= 0x1FFF; |
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471 if (location < 0x100) { |
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472 switch(location/2) |
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473 { |
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474 case 0x0: |
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475 //version bits should be 0 for now since we're not emulating TMSS |
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476 //Not sure about the other bits |
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477 context->value = version_reg; |
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478 break; |
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479 case 0x1: |
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480 io_data_read(&gamepad_1, context); |
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481 break; |
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482 case 0x2: |
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483 io_data_read(&gamepad_2, context); |
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484 break; |
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|
485 case 0x3://PORT C Data |
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486 break; |
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487 case 0x4: |
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488 context->value = gamepad_1.control; |
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489 break; |
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490 case 0x5: |
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491 context->value = gamepad_2.control; |
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492 break; |
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493 } |
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494 } else { |
153
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495 if (location == 0x1100) { |
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496 if (busack_cycle > context->current_cycle) { |
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497 busack = new_busack; |
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498 busack_cycle = CYCLE_NEVER; |
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499 } |
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500 context->value = reset || busack; |
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501 //printf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d)\n", context->value, context->current_cycle, reset, busack); |
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502 } else if (location == 0x1200) { |
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503 context->value = !reset; |
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504 } else { |
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505 printf("Byte read of unknown IO location: %X\n", location); |
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506 } |
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|
507 } |
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|
508 } |
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|
509 return context; |
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|
510 } |
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|
511 |
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|
512 m68k_context * io_read_w(uint32_t location, m68k_context * context) |
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513 { |
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514 if (location < 0x10000) { |
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515 if (busack_cycle > context->current_cycle) { |
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516 busack = new_busack; |
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517 busack_cycle = CYCLE_NEVER; |
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|
518 } |
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519 if (!(busack || reset)) { |
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|
520 location &= 0x7FFF; |
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521 if (location < 0x4000) { |
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522 context->value = z80_ram[location & 0x1FFE]; |
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523 context->value |= context->value << 8; |
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524 } else { |
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525 context->value = 0xFFFF; |
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526 } |
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527 } else { |
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528 context->value = 0xFFFF; |
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529 } |
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530 } else { |
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531 location &= 0x1FFF; |
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532 if (location < 0x100) { |
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533 switch(location/2) |
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534 { |
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535 case 0x0: |
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536 //version bits should be 0 for now since we're not emulating TMSS |
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537 //Not sure about the other bits |
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538 context->value = 0; |
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539 break; |
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540 case 0x1: |
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541 io_data_read(&gamepad_1, context); |
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542 break; |
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543 case 0x2: |
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544 io_data_read(&gamepad_2, context); |
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545 break; |
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546 case 0x3://PORT C Data |
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547 break; |
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548 case 0x4: |
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549 context->value = gamepad_1.control; |
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550 break; |
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551 case 0x5: |
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552 context->value = gamepad_2.control; |
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553 break; |
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|
554 case 0x6: |
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|
555 //PORT C Control |
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556 context->value = 0; |
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|
557 break; |
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|
558 } |
153
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559 context->value = context->value | (context->value << 8); |
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560 //printf("Word read to %X returned %d\n", location, context->value); |
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561 } else { |
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562 if (location == 0x1100) { |
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563 if (busack_cycle > context->current_cycle) { |
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564 busack = new_busack; |
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|
565 busack_cycle = CYCLE_NEVER; |
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566 } |
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567 context->value = (reset || busack) << 8; |
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|
568 //printf("Word read of BUSREQ returned %d\n", context->value); |
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569 } else if (location == 0x1200) { |
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570 context->value = (!reset) << 8; |
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571 } else { |
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572 printf("Word read of unknown IO location: %X\n", location); |
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573 } |
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574 } |
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575 } |
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576 return context; |
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577 } |
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578 |
184
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579 typedef struct bp_def { |
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580 struct bp_def * next; |
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581 uint32_t address; |
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582 uint32_t index; |
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583 } bp_def; |
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584 |
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585 bp_def * breakpoints = NULL; |
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|
586 uint32_t bp_index = 0; |
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587 |
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588 bp_def ** find_breakpoint(bp_def ** cur, uint32_t address) |
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589 { |
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166
diff
changeset
|
590 while (*cur) { |
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591 if ((*cur)->address == address) { |
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|
592 break; |
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593 } |
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|
594 cur = &((*cur)->next); |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
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|
595 } |
ebcbdd1c4cc8
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|
596 return cur; |
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|
597 } |
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|
598 |
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|
599 bp_def ** find_breakpoint_idx(bp_def ** cur, uint32_t index) |
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600 { |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
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166
diff
changeset
|
601 while (*cur) { |
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166
diff
changeset
|
602 if ((*cur)->index == index) { |
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|
603 break; |
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|
604 } |
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|
605 cur = &((*cur)->next); |
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|
606 } |
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|
607 return cur; |
ebcbdd1c4cc8
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|
608 } |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
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|
609 |
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|
610 char * find_param(char * buf) |
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|
611 { |
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|
612 for (; *buf; buf++) { |
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613 if (*buf == ' ') { |
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|
614 if (*(buf+1)) { |
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|
615 return buf+1; |
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|
616 } |
ebcbdd1c4cc8
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|
617 } |
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|
618 } |
ebcbdd1c4cc8
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|
619 return NULL; |
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|
620 } |
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|
621 |
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|
622 void strip_nl(char * buf) |
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623 { |
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624 for(; *buf; buf++) { |
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625 if (*buf == '\n') { |
ebcbdd1c4cc8
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|
626 *buf = 0; |
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|
627 return; |
ebcbdd1c4cc8
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|
628 } |
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|
629 } |
ebcbdd1c4cc8
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|
630 } |
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631 |
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|
632 m68k_context * debugger(m68k_context * context, uint32_t address) |
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633 { |
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634 static char last_cmd[1024]; |
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166
diff
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635 char input_buf[1024]; |
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636 static uint32_t branch_t; |
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|
637 static uint32_t branch_f; |
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|
638 m68kinst inst; |
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|
639 //probably not necessary, but let's play it safe |
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|
640 address &= 0xFFFFFF; |
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|
641 if (address == branch_t) { |
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|
642 bp_def ** f_bp = find_breakpoint(&breakpoints, branch_f); |
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643 if (!*f_bp) { |
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644 remove_breakpoint(context, branch_f); |
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645 } |
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646 branch_t = branch_f = 0; |
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647 } else if(address == branch_f) { |
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648 bp_def ** t_bp = find_breakpoint(&breakpoints, branch_t); |
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649 if (!*t_bp) { |
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650 remove_breakpoint(context, branch_t); |
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651 } |
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652 branch_t = branch_f = 0; |
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653 } |
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654 //Check if this is a user set breakpoint, or just a temporary one |
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655 bp_def ** this_bp = find_breakpoint(&breakpoints, address); |
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656 if (*this_bp) { |
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657 printf("Breakpoint %d hit\n", (*this_bp)->index); |
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658 } else { |
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659 remove_breakpoint(context, address); |
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660 } |
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661 uint16_t * pc; |
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662 if (address < 0x400000) { |
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663 pc = cart + address/2; |
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664 } else if(address > 0xE00000) { |
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665 pc = ram + (address & 0xFFFF)/2; |
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666 } else { |
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667 fprintf(stderr, "Entered debugger at address %X\n", address); |
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668 exit(1); |
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669 } |
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670 uint16_t * after_pc = m68k_decode(pc, &inst, address); |
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671 m68k_disasm(&inst, input_buf); |
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672 printf("%X: %s\n", address, input_buf); |
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673 uint32_t after = address + (after_pc-pc)*2; |
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674 int debugging = 1; |
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675 while (debugging) { |
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676 fputs(">", stdout); |
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677 if (!fgets(input_buf, sizeof(input_buf), stdin)) { |
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678 fputs("fgets failed", stderr); |
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679 break; |
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680 } |
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681 strip_nl(input_buf); |
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682 //hitting enter repeats last command |
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683 if (input_buf[0]) { |
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684 strcpy(last_cmd, input_buf); |
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685 } else { |
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686 strcpy(input_buf, last_cmd); |
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687 } |
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688 char * param; |
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689 char format[8]; |
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690 uint32_t value; |
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691 bp_def * new_bp; |
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692 switch(input_buf[0]) |
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693 { |
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694 case 'c': |
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695 puts("Continuing"); |
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696 debugging = 0; |
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697 break; |
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698 case 'b': |
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699 param = find_param(input_buf); |
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700 if (!param) { |
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701 fputs("b command requires a parameter\n", stderr); |
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702 break; |
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703 } |
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704 value = strtol(param, NULL, 16); |
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705 insert_breakpoint(context, value, (uint8_t *)debugger); |
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706 new_bp = malloc(sizeof(bp_def)); |
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707 new_bp->next = breakpoints; |
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708 new_bp->address = value; |
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709 new_bp->index = bp_index++; |
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710 breakpoints = new_bp; |
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711 printf("Breakpoint %d set at %X\n", new_bp->index, value); |
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712 break; |
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713 case 'a': |
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714 param = find_param(input_buf); |
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715 if (!param) { |
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716 fputs("a command requires a parameter\n", stderr); |
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717 break; |
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718 } |
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719 value = strtol(param, NULL, 16); |
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720 insert_breakpoint(context, value, (uint8_t *)debugger); |
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721 debugging = 0; |
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722 break; |
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723 case 'd': |
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724 param = find_param(input_buf); |
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725 if (!param) { |
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726 fputs("b command requires a parameter\n", stderr); |
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727 break; |
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728 } |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
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|
729 value = atoi(param); |
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730 this_bp = find_breakpoint_idx(&breakpoints, value); |
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|
731 if (!*this_bp) { |
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732 fprintf(stderr, "Breakpoint %d does not exist\n", value); |
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|
733 break; |
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734 } |
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735 new_bp = *this_bp; |
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736 *this_bp = (*this_bp)->next; |
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737 free(new_bp); |
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738 break; |
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739 case 'p': |
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740 strcpy(format, "%s: %d\n"); |
ebcbdd1c4cc8
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|
741 if (input_buf[1] == '/') { |
ebcbdd1c4cc8
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|
742 switch (input_buf[2]) |
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743 { |
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744 case 'x': |
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745 case 'X': |
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|
746 case 'd': |
ebcbdd1c4cc8
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|
747 case 'c': |
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|
748 format[5] = input_buf[2]; |
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749 break; |
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|
750 default: |
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|
751 fprintf(stderr, "Unrecognized format character: %c\n", input_buf[2]); |
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166
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752 } |
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|
753 } |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
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|
754 param = find_param(input_buf); |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
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755 if (!param) { |
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756 fputs("p command requires a parameter\n", stderr); |
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757 break; |
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758 } |
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759 if (param[0] == 'd' && param[1] >= '0' && param[1] <= '7') { |
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760 value = context->dregs[param[1]-'0']; |
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761 } else if (param[0] == 'a' && param[1] >= '0' && param[1] <= '7') { |
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762 value = context->aregs[param[1]-'0']; |
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763 } else if (param[0] == 'S' && param[1] == 'R') { |
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764 value = (context->status << 8); |
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765 for (int flag = 0; flag < 5; flag++) { |
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766 value |= context->flags[flag] << (4-flag); |
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767 } |
185
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768 } else if(param[0] == 'c') { |
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769 value = context->current_cycle; |
184
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770 } else if (param[0] == '0' && param[1] == 'x') { |
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771 uint32_t p_addr = strtol(param+2, NULL, 16); |
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772 value = read_dma_value(p_addr/2); |
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773 } else { |
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774 fprintf(stderr, "Unrecognized parameter to p: %s\n", param); |
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775 break; |
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776 } |
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777 printf(format, param, value); |
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778 break; |
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779 case 'n': |
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780 //TODO: Deal with jmp, dbcc, rtr and rte |
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781 if (inst.op == M68K_RTS) { |
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782 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1); |
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783 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) { |
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784 if (inst.extra.cond = COND_TRUE) { |
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785 after = inst.address + 2 + inst.src.params.immed; |
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786 } else { |
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787 branch_f = after; |
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788 branch_t = inst.address + 2 + inst.src.params.immed; |
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789 insert_breakpoint(context, branch_t, (uint8_t *)debugger); |
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790 } |
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791 } |
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792 insert_breakpoint(context, after, (uint8_t *)debugger); |
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793 debugging = 0; |
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794 break; |
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795 case 'q': |
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796 puts("Quitting"); |
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797 exit(0); |
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798 break; |
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799 default: |
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800 fprintf(stderr, "Unrecognized debugger command %s\n", input_buf); |
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801 break; |
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802 } |
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803 } |
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804 return context; |
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805 } |
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806 |
211 | 807 void init_run_cpu(vdp_context * vcontext, int debug, FILE * address_log) |
808 { | |
809 m68k_context context; | |
810 x86_68k_options opts; | |
811 init_x86_68k_opts(&opts); | |
812 opts.address_log = address_log; | |
813 init_68k_context(&context, opts.native_code_map, &opts); | |
814 | |
815 context.next_context = vcontext; | |
816 //cartridge ROM | |
817 context.mem_pointers[0] = cart; | |
818 context.target_cycle = context.sync_cycle = MCLKS_PER_FRAME/MCLKS_PER_68K; | |
819 //work RAM | |
820 context.mem_pointers[1] = ram; | |
821 uint32_t address; | |
822 /*address = cart[0x68/2] << 16 | cart[0x6A/2]; | |
823 translate_m68k_stream(address, &context); | |
824 address = cart[0x70/2] << 16 | cart[0x72/2]; | |
825 translate_m68k_stream(address, &context); | |
826 address = cart[0x78/2] << 16 | cart[0x7A/2]; | |
827 translate_m68k_stream(address, &context);*/ | |
828 address = cart[2] << 16 | cart[3]; | |
829 translate_m68k_stream(address, &context); | |
830 if (debug) { | |
831 insert_breakpoint(&context, address, (uint8_t *)debugger); | |
832 } | |
833 m68k_reset(&context); | |
834 } | |
835 | |
88
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836 int main(int argc, char ** argv) |
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837 { |
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838 if (argc < 2) { |
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839 fputs("Usage: blastem FILENAME\n", stderr); |
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840 return 1; |
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841 } |
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842 if(!load_rom(argv[1])) { |
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843 fprintf(stderr, "Failed to open %s for reading\n", argv[1]); |
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844 return 1; |
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845 } |
184
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846 int width = -1; |
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847 int height = -1; |
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848 int debug = 0; |
197
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849 FILE *address_log = NULL; |
184
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850 for (int i = 2; i < argc; i++) { |
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851 if (argv[i][0] == '-') { |
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852 switch(argv[i][1]) { |
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853 case 'd': |
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854 debug = 1; |
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855 break; |
197
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856 case 'l': |
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857 address_log = fopen("address.log", "w"); |
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858 break; |
215
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859 case 'v': |
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860 headless = 1; |
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861 break; |
184
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862 default: |
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863 fprintf(stderr, "Unrecognized switch %s\n", argv[i]); |
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864 return 1; |
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865 } |
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866 } else if (width < 0) { |
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867 width = atoi(argv[i]); |
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868 } else if (height < 0) { |
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869 height = atoi(argv[i]); |
88
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870 } |
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871 } |
184
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872 width = width < 320 ? 320 : width; |
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873 height = height < 240 ? (width/320) * 240 : height; |
215
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|
874 if (!headless) { |
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875 render_init(width, height); |
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|
876 } |
88
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|
877 vdp_context v_context; |
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|
878 |
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|
879 init_vdp_context(&v_context); |
211 | 880 init_run_cpu(&v_context, debug, address_log); |
88
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881 return 0; |
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882 } |