Mercurial > repos > blastem
annotate gen_x86.c @ 26:a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
author | Mike Pavone <pavone@retrodev.com> |
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date | Sat, 08 Dec 2012 16:46:47 -0800 |
parents | 3e7bfde7606e |
children | d2e43d64e999 |
rev | line source |
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1 #include "gen_x86.h" |
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2 #include "68kinst.h" |
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3 #include <stddef.h> |
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4 #include <stdio.h> |
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5 |
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6 #define REX_RM_FIELD 0x1 |
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7 #define REX_SIB_FIELD 0x2 |
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8 #define REX_REG_FIELD 0x4 |
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9 #define REX_QUAD 0x8 |
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10 |
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11 #define OP_ADD 0x00 |
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12 #define OP_OR 0x08 |
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13 #define PRE_2BYTE 0x0F |
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14 #define OP_ADC 0x10 |
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15 #define OP_SBB 0x18 |
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16 #define OP_AND 0x20 |
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17 #define OP_SUB 0x28 |
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18 #define OP_XOR 0x30 |
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19 #define OP_CMP 0x38 |
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20 #define PRE_REX 0x40 |
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21 #define OP_PUSH 0x50 |
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22 #define OP_POP 0x58 |
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23 #define PRE_SIZE 0x66 |
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24 #define OP_JCC 0x70 |
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25 #define OP_IMMED_ARITH 0x80 |
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26 #define OP_MOV 0x88 |
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27 #define OP_PUSHF 0x9C |
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28 #define OP_POPF 0x9D |
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29 #define OP_MOV_I8R 0xB0 |
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30 #define OP_MOV_IR 0xB8 |
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31 #define OP_RETN 0xC3 |
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32 #define OP_MOV_IEA 0xC6 |
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33 #define OP_CALL 0xE8 |
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34 #define OP_JMP 0xE9 |
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35 #define OP_JMP_BYTE 0xEB |
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36 #define OP_CALL_EA 0xFF |
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37 |
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38 #define OP2_JCC 0x80 |
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39 #define OP2_SETCC 0x90 |
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40 |
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41 #define OP_EX_ADDI 0x0 |
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42 #define OP_EX_ORI 0x1 |
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43 #define OP_EX_ADCI 0x2 |
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44 #define OP_EX_SBBI 0x3 |
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45 #define OP_EX_ANDI 0x4 |
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46 #define OP_EX_SUBI 0x5 |
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47 #define OP_EX_XORI 0x6 |
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48 #define OP_EX_CMPI 0x7 |
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49 |
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50 #define BIT_IMMED_RAX 0x4 |
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51 #define BIT_DIR 0x2 |
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52 #define BIT_SIZE 0x1 |
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53 |
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54 |
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55 enum { |
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56 X86_RAX = 0, |
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57 X86_RCX, |
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58 X86_RDX, |
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59 X86_RBX, |
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60 X86_RSP, |
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61 X86_RBP, |
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62 X86_RSI, |
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63 X86_RDI, |
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64 X86_AH=4, |
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65 X86_CH, |
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66 X86_DH, |
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67 X86_BH, |
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68 X86_R8=0, |
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69 X86_R9, |
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70 X86_R10, |
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71 X86_R11, |
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72 X86_R12, |
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73 X86_R13, |
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74 X86_R14, |
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75 X86_R15 |
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76 } x86_regs_enc; |
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77 |
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78 uint8_t * x86_rr_sizedir(uint8_t * out, uint8_t opcode, uint8_t src, uint8_t dst, uint8_t size) |
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79 { |
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80 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix |
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81 uint8_t tmp; |
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82 if (size == SZ_W) { |
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83 *(out++) = PRE_SIZE; |
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84 } |
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85 if (size == SZ_B && dst >= RSP && dst <= RDI) { |
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86 opcode |= BIT_DIR; |
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87 tmp = dst; |
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88 dst = src; |
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89 src = dst; |
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90 } |
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91 if (size == SZ_Q || src >= R8 || dst >= R8 || (size == SZ_B && src >= RSP && src <= RDI)) { |
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92 *out = PRE_REX; |
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93 if (size == SZ_Q) { |
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94 *out |= REX_QUAD; |
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95 } |
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96 if (src >= R8) { |
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97 *out |= REX_REG_FIELD; |
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98 src -= (R8 - X86_R8); |
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99 } |
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100 if (dst >= R8) { |
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101 *out |= REX_RM_FIELD; |
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102 dst -= (R8 - X86_R8); |
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103 } |
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104 out++; |
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105 } |
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106 if (size == SZ_B) { |
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107 if (src >= AH && src <= BH) { |
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108 src -= (AH-X86_AH); |
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109 } |
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110 if (dst >= AH && dst <= BH) { |
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111 dst -= (AH-X86_AH); |
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112 } |
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113 } else { |
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114 opcode |= BIT_SIZE; |
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115 } |
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116 *(out++) = opcode; |
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117 *(out++) = MODE_REG_DIRECT | dst | (src << 3); |
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118 return out; |
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119 } |
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120 |
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121 uint8_t * x86_rrdisp8_sizedir(uint8_t * out, uint8_t opcode, uint8_t reg, uint8_t base, int8_t disp, uint8_t size, uint8_t dir) |
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122 { |
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123 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix |
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124 uint8_t tmp; |
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125 if (size == SZ_W) { |
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126 *(out++) = PRE_SIZE; |
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127 } |
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128 if (size == SZ_Q || reg >= R8 || base >= R8 || (size == SZ_B && reg >= RSP && reg <= RDI)) { |
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129 *out = PRE_REX; |
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130 if (size == SZ_Q) { |
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131 *out |= REX_QUAD; |
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132 } |
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133 if (reg >= R8) { |
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134 *out |= REX_REG_FIELD; |
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135 reg -= (R8 - X86_R8); |
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136 } |
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137 if (base >= R8) { |
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138 *out |= REX_RM_FIELD; |
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139 base -= (R8 - X86_R8); |
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140 } |
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141 out++; |
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142 } |
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143 if (size == SZ_B) { |
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144 if (reg >= AH && reg <= BH) { |
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145 reg -= (AH-X86_AH); |
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146 } |
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147 } else { |
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148 opcode |= BIT_SIZE; |
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149 } |
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150 *(out++) = opcode | dir; |
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151 *(out++) = MODE_REG_DISPLACE8 | base | (reg << 3); |
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152 if (base == RSP) { |
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153 //add SIB byte, with no index and RSP as base |
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154 *(out++) = (RSP << 3) | RSP; |
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155 } |
14
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156 *(out++) = disp; |
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157 return out; |
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158 } |
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159 |
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160 uint8_t * x86_rrind_sizedir(uint8_t * out, uint8_t opcode, uint8_t reg, uint8_t base, uint8_t size, uint8_t dir) |
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161 { |
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162 //TODO: Deal with the fact that AH, BH, CH and DH can only be in the R/M param when there's a REX prefix |
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163 uint8_t tmp; |
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164 if (size == SZ_W) { |
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165 *(out++) = PRE_SIZE; |
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166 } |
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167 if (size == SZ_Q || reg >= R8 || base >= R8 || (size == SZ_B && reg >= RSP && reg <= RDI)) { |
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168 *out = PRE_REX; |
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169 if (size == SZ_Q) { |
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170 *out |= REX_QUAD; |
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171 } |
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172 if (reg >= R8) { |
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173 *out |= REX_REG_FIELD; |
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174 reg -= (R8 - X86_R8); |
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175 } |
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176 if (base >= R8) { |
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177 *out |= REX_RM_FIELD; |
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178 base -= (R8 - X86_R8); |
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179 } |
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180 out++; |
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181 } |
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182 if (size == SZ_B) { |
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183 if (reg >= AH && reg <= BH) { |
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184 reg -= (AH-X86_AH); |
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185 } |
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186 } else { |
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187 opcode |= BIT_SIZE; |
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188 } |
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189 *(out++) = opcode | dir; |
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190 *(out++) = MODE_REG_INDIRECT | base | (reg << 3); |
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191 if (base == RSP) { |
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192 //add SIB byte, with no index and RSP as base |
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193 *(out++) = (RSP << 3) | RSP; |
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194 } |
14
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195 return out; |
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196 } |
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197 |
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198 uint8_t * x86_ir(uint8_t * out, uint8_t opcode, uint8_t op_ex, uint8_t al_opcode, int32_t val, uint8_t dst, uint8_t size) |
14
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199 { |
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200 uint8_t sign_extend = 0; |
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201 if ((size == SZ_D || size == SZ_Q) && val <= 0x7F && val >= -0x80) { |
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202 sign_extend = 1; |
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203 opcode |= BIT_DIR; |
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204 } |
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205 if (size == SZ_W) { |
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206 *(out++) = PRE_SIZE; |
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207 } |
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208 if (dst == RAX && !sign_extend) { |
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209 if (size != SZ_B) { |
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210 al_opcode |= BIT_SIZE; |
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211 if (size == SZ_Q) { |
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212 *out = PRE_REX | REX_QUAD; |
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213 } |
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214 } |
14
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215 *(out++) = al_opcode | BIT_IMMED_RAX; |
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216 } else { |
15
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217 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) { |
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218 *out = PRE_REX; |
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219 if (size == SZ_Q) { |
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220 *out |= REX_QUAD; |
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221 } |
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222 if (dst >= R8) { |
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223 *out |= REX_RM_FIELD; |
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224 dst -= (R8 - X86_R8); |
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225 } |
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226 out++; |
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227 } |
14
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228 if (dst >= AH && dst <= BH) { |
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229 dst -= (AH-X86_AH); |
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230 } |
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231 if (size != SZ_B) { |
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232 opcode |= BIT_SIZE; |
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233 } |
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234 *(out++) = opcode; |
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235 *(out++) = MODE_REG_DIRECT | dst | (op_ex << 3); |
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236 } |
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237 *(out++) = val; |
15
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238 if (size != SZ_B && !sign_extend) { |
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239 val >>= 8; |
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240 *(out++) = val; |
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241 if (size != SZ_W) { |
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242 val >>= 8; |
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243 *(out++) = val; |
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244 val >>= 8; |
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245 *(out++) = val; |
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246 } |
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247 } |
14
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248 return out; |
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249 } |
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250 |
18
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251 uint8_t * x86_irdisp8(uint8_t * out, uint8_t opcode, uint8_t op_ex, int32_t val, uint8_t dst, int8_t disp, uint8_t size) |
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252 { |
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253 uint8_t sign_extend = 0; |
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254 if ((size == SZ_D || size == SZ_Q) && val <= 0x7F && val >= -0x80) { |
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255 sign_extend = 1; |
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256 opcode |= BIT_DIR; |
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257 } |
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258 if (size == SZ_W) { |
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259 *(out++) = PRE_SIZE; |
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260 } |
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261 |
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262 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) { |
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263 *out = PRE_REX; |
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264 if (size == SZ_Q) { |
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265 *out |= REX_QUAD; |
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266 } |
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267 if (dst >= R8) { |
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268 *out |= REX_RM_FIELD; |
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269 dst -= (R8 - X86_R8); |
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270 } |
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271 out++; |
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272 } |
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273 if (dst >= AH && dst <= BH) { |
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274 dst -= (AH-X86_AH); |
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275 } |
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276 if (size != SZ_B) { |
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277 opcode |= BIT_SIZE; |
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278 } |
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279 *(out++) = opcode; |
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280 *(out++) = MODE_REG_DISPLACE8 | dst | (op_ex << 3); |
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281 *(out++) = disp; |
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282 *(out++) = val; |
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283 if (size != SZ_B && !sign_extend) { |
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284 val >>= 8; |
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285 *(out++) = val; |
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286 if (size != SZ_W) { |
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287 val >>= 8; |
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288 *(out++) = val; |
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289 val >>= 8; |
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290 *(out++) = val; |
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291 } |
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292 } |
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293 return out; |
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294 } |
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295 |
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296 |
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297 uint8_t * add_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
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298 { |
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299 return x86_rr_sizedir(out, OP_ADD, src, dst, size); |
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300 } |
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301 |
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302 uint8_t * add_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size) |
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303 { |
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304 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ADDI, OP_ADD, val, dst, size); |
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305 } |
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306 |
18
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307 uint8_t * add_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size) |
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308 { |
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309 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ADDI, val, dst_base, disp, size); |
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310 } |
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311 |
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312 uint8_t * add_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size) |
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313 { |
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314 return x86_rrdisp8_sizedir(out, OP_ADD, src, dst_base, disp, size, 0); |
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315 } |
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316 |
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317 uint8_t * add_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size) |
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318 { |
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319 return x86_rrdisp8_sizedir(out, OP_ADD, dst, src_base, disp, size, BIT_DIR); |
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320 } |
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321 |
14
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322 uint8_t * or_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
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323 { |
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324 return x86_rr_sizedir(out, OP_OR, src, dst, size); |
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325 } |
15
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326 uint8_t * or_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size) |
14
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327 { |
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328 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ORI, OP_OR, val, dst, size); |
14
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|
329 } |
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|
330 |
18
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331 uint8_t * or_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size) |
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|
332 { |
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333 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ORI, val, dst_base, disp, size); |
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|
334 } |
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|
335 |
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|
336 uint8_t * or_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size) |
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337 { |
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338 return x86_rrdisp8_sizedir(out, OP_OR, src, dst_base, disp, size, 0); |
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339 } |
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340 |
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|
341 uint8_t * or_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size) |
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|
342 { |
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343 return x86_rrdisp8_sizedir(out, OP_OR, dst, src_base, disp, size, BIT_DIR); |
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|
344 } |
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|
345 |
14
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|
346 uint8_t * and_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
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|
347 { |
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|
348 return x86_rr_sizedir(out, OP_AND, src, dst, size); |
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changeset
|
349 } |
2bdad0f52f42
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changeset
|
350 |
15
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14
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|
351 uint8_t * and_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size) |
14
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changeset
|
352 { |
15
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Make x86 generator generic with respect to operand size for immediate parameters.
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|
353 return x86_ir(out, OP_IMMED_ARITH, OP_EX_ANDI, OP_AND, val, dst, size); |
14
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changeset
|
354 } |
2bdad0f52f42
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Mike Pavone <pavone@retrodev.com>
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changeset
|
355 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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15
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|
356 uint8_t * and_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size) |
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357 { |
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358 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_ANDI, val, dst_base, disp, size); |
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359 } |
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360 |
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361 uint8_t * and_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size) |
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15
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|
362 { |
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363 return x86_rrdisp8_sizedir(out, OP_AND, src, dst_base, disp, size, 0); |
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15
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|
364 } |
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|
365 |
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366 uint8_t * and_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size) |
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367 { |
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368 return x86_rrdisp8_sizedir(out, OP_AND, dst, src_base, disp, size, BIT_DIR); |
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|
369 } |
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370 |
14
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371 uint8_t * xor_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
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|
372 { |
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373 return x86_rr_sizedir(out, OP_XOR, src, dst, size); |
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|
374 } |
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|
375 |
15
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|
376 uint8_t * xor_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size) |
14
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|
377 { |
15
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378 return x86_ir(out, OP_IMMED_ARITH, OP_EX_XORI, OP_XOR, val, dst, size); |
14
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|
379 } |
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|
380 |
18
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381 uint8_t * xor_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size) |
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|
382 { |
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383 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_XORI, val, dst_base, disp, size); |
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15
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|
384 } |
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|
385 |
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|
386 uint8_t * xor_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size) |
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|
387 { |
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388 return x86_rrdisp8_sizedir(out, OP_XOR, src, dst_base, disp, size, 0); |
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Mike Pavone <pavone@retrodev.com>
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|
389 } |
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|
390 |
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391 uint8_t * xor_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size) |
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15
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|
392 { |
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393 return x86_rrdisp8_sizedir(out, OP_XOR, dst, src_base, disp, size, BIT_DIR); |
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|
394 } |
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M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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|
395 |
14
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|
396 uint8_t * sub_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
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|
397 { |
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398 return x86_rr_sizedir(out, OP_SUB, src, dst, size); |
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changeset
|
399 } |
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changeset
|
400 |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
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14
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changeset
|
401 uint8_t * sub_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size) |
14
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changeset
|
402 { |
15
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Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
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changeset
|
403 return x86_ir(out, OP_IMMED_ARITH, OP_EX_SUBI, OP_SUB, val, dst, size); |
14
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parents:
diff
changeset
|
404 } |
2bdad0f52f42
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
405 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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15
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changeset
|
406 uint8_t * sub_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
15
diff
changeset
|
407 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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|
408 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_SUBI, val, dst_base, disp, size); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
409 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
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changeset
|
410 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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|
411 uint8_t * sub_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
412 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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15
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|
413 return x86_rrdisp8_sizedir(out, OP_SUB, src, dst_base, disp, size, 0); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
414 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
415 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
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changeset
|
416 uint8_t * sub_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
417 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
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|
418 return x86_rrdisp8_sizedir(out, OP_SUB, dst, src_base, disp, size, BIT_DIR); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
419 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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15
diff
changeset
|
420 |
14
2bdad0f52f42
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
421 uint8_t * cmp_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
422 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
423 return x86_rr_sizedir(out, OP_CMP, src, dst, size); |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
424 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
425 |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
426 uint8_t * cmp_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size) |
14
2bdad0f52f42
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
427 { |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
428 return x86_ir(out, OP_IMMED_ARITH, OP_EX_CMPI, OP_CMP, val, dst, size); |
14
2bdad0f52f42
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
429 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
430 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
431 uint8_t * cmp_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
432 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
433 return x86_irdisp8(out, OP_IMMED_ARITH, OP_EX_CMPI, val, dst_base, disp, size); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
434 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
435 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
436 uint8_t * cmp_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
437 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
438 return x86_rrdisp8_sizedir(out, OP_CMP, src, dst_base, disp, size, 0); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
439 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
440 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
441 uint8_t * cmp_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
442 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
443 return x86_rrdisp8_sizedir(out, OP_CMP, dst, src_base, disp, size, BIT_DIR); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
444 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
445 |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
446 uint8_t * mov_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
447 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
448 return x86_rr_sizedir(out, OP_MOV, src, dst, size); |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
449 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
450 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
451 uint8_t * mov_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
452 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
453 return x86_rrdisp8_sizedir(out, OP_MOV, src, dst_base, disp, size, 0); |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
454 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
455 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
456 uint8_t * mov_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
457 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
458 return x86_rrdisp8_sizedir(out, OP_MOV, dst, src_base, disp, size, BIT_DIR); |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
459 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
460 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
461 uint8_t * mov_rrind(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
462 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
463 return x86_rrind_sizedir(out, OP_MOV, src, dst, size, 0); |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
464 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
465 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
466 uint8_t * mov_rindr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
467 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
468 return x86_rrind_sizedir(out, OP_MOV, dst, src, size, BIT_DIR); |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
469 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
470 |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
471 uint8_t * mov_ir(uint8_t * out, int64_t val, uint8_t dst, uint8_t size) |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
472 { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
473 uint8_t sign_extend = 0; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
474 if (size == SZ_Q && val <= 0x7FFFFFFF && val >= -2147483648) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
475 sign_extend = 1; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
476 } |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
477 if (size == SZ_W) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
478 *(out++) = PRE_SIZE; |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
479 } |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
480 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
481 *out = PRE_REX; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
482 if (size == SZ_Q) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
483 *out |= REX_QUAD; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
484 } |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
485 if (dst >= R8) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
486 *out |= REX_RM_FIELD; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
487 dst -= (R8 - X86_R8); |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
488 } |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
489 out++; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
490 } |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
491 if (dst >= AH && dst <= BH) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
492 dst -= (AH-X86_AH); |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
493 } |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
494 if (size == SZ_B) { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
495 *(out++) = OP_MOV_I8R | dst; |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
496 } else if (size == SZ_Q && sign_extend) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
497 *(out++) = OP_MOV_IEA | BIT_SIZE; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
498 *(out++) = MODE_REG_DIRECT | dst; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
499 } else { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
500 *(out++) = OP_MOV_IR | dst; |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
501 } |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
502 *(out++) = val; |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
503 if (size != SZ_B) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
504 val >>= 8; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
505 *(out++) = val; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
506 if (size != SZ_W) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
507 val >>= 8; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
508 *(out++) = val; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
509 val >>= 8; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
510 *(out++) = val; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
511 if (size == SZ_Q && !sign_extend) { |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
512 val >>= 8; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
513 *(out++) = val; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
514 val >>= 8; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
515 *(out++) = val; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
516 val >>= 8; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
517 *(out++) = val; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
518 val >>= 8; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
519 *(out++) = val; |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
520 } |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
521 } |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
522 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
523 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
524 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
525 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
526 uint8_t * mov_irdisp8(uint8_t * out, int32_t val, uint8_t dst, int8_t disp, uint8_t size) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
527 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
528 if (size == SZ_W) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
529 *(out++) = PRE_SIZE; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
530 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
531 if (size == SZ_Q || dst >= R8 || (size == SZ_B && dst >= RSP && dst <= RDI)) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
532 *out = PRE_REX; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
533 if (size == SZ_Q) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
534 *out |= REX_QUAD; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
535 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
536 if (dst >= R8) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
537 *out |= REX_RM_FIELD; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
538 dst -= (R8 - X86_R8); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
539 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
540 out++; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
541 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
542 if (dst >= AH && dst <= BH) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
543 dst -= (AH-X86_AH); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
544 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
545 *(out++) = OP_MOV_IEA | (size == SZ_B ? 0 : BIT_SIZE); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
546 *(out++) = MODE_REG_DISPLACE8 | dst; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
547 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
548 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
549 *(out++) = val; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
550 if (size != SZ_B) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
551 val >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
552 *(out++) = val; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
553 if (size != SZ_W) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
554 val >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
555 *(out++) = val; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
556 val >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
557 *(out++) = val; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
558 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
559 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
560 return out; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
561 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
562 |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
563 uint8_t * pushf(uint8_t * out) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
564 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
565 *(out++) = OP_PUSHF; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
566 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
567 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
568 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
569 uint8_t * popf(uint8_t * out) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
570 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
571 *(out++) = OP_POPF; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
572 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
573 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
574 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
575 uint8_t * push_r(uint8_t * out, uint8_t reg) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
576 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
577 if (reg >= R8) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
578 *(out++) = PRE_REX | REX_RM_FIELD; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
579 reg -= R8 - X86_R8; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
580 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
581 *(out++) = OP_PUSH | reg; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
582 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
583 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
584 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
585 uint8_t * pop_r(uint8_t * out, uint8_t reg) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
586 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
587 if (reg >= R8) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
588 *(out++) = PRE_REX | REX_RM_FIELD; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
589 reg -= R8 - X86_R8; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
590 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
591 *(out++) = OP_POP | reg; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
592 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
593 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
594 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
595 uint8_t * setcc_r(uint8_t * out, uint8_t cc, uint8_t dst) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
596 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
597 if (dst >= R8) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
598 *(out++) = PRE_REX | REX_RM_FIELD; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
599 dst -= R8 - X86_R8; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
600 } else if (dst >= RSP && dst <= RDI) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
601 *(out++) = PRE_REX; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
602 } else if (dst >= AH && dst <= BH) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
603 dst -= AH - X86_AH; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
604 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
605 *(out++) = PRE_2BYTE; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
606 *(out++) = OP2_SETCC | cc; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
607 *(out++) = MODE_REG_DIRECT | dst; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
608 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
609 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
610 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
611 uint8_t * setcc_rind(uint8_t * out, uint8_t cc, uint8_t dst) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
612 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
613 if (dst >= R8) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
614 *(out++) = PRE_REX | REX_RM_FIELD; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
615 dst -= R8 - X86_R8; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
616 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
617 *(out++) = PRE_2BYTE; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
618 *(out++) = OP2_SETCC | cc; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
619 *(out++) = MODE_REG_INDIRECT | dst; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
620 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
621 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
622 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
623 uint8_t * jcc(uint8_t * out, uint8_t cc, uint8_t * dest) |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
624 { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
625 ptrdiff_t disp = dest-(out+2); |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
626 if (disp <= 0x7F && disp >= -0x80) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
627 *(out++) = OP_JCC | cc; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
628 *(out++) = disp; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
629 } else { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
630 disp = dest-(out+6); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
631 if (disp <= 0x7FFFFFFF && disp >= -2147483648) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
632 *(out++) = PRE_2BYTE; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
633 *(out++) = OP2_JCC | cc; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
634 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
635 disp >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
636 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
637 disp >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
638 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
639 disp >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
640 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
641 } else { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
642 printf("%p - %p = %lX\n", dest, out + 6, disp); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
643 return NULL; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
644 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
645 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
646 return out; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
647 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
648 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
649 uint8_t * jmp(uint8_t * out, uint8_t * dest) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
650 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
651 ptrdiff_t disp = dest-(out+2); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
652 if (disp <= 0x7F && disp >= -0x80) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
653 *(out++) = OP_JMP_BYTE; |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
654 *(out++) = disp; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
655 } else { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
656 disp = dest-(out+5); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
657 if (disp <= 0x7FFFFFFF && disp >= -2147483648) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
658 *(out++) = OP_JMP; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
659 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
660 disp >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
661 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
662 disp >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
663 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
664 disp >>= 8; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
665 *(out++) = disp; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
666 } else { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
667 printf("%p - %p = %lX\n", dest, out + 6, disp); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
668 return NULL; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
669 } |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
670 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
671 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
672 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
673 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
674 uint8_t * call(uint8_t * out, uint8_t * fun) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
675 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
676 ptrdiff_t disp = fun-(out+5); |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
677 if (disp <= 0x7FFFFFFF && disp >= -2147483648) { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
678 *(out++) = OP_CALL; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
679 *(out++) = disp; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
680 disp >>= 8; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
681 *(out++) = disp; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
682 disp >>= 8; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
683 *(out++) = disp; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
684 disp >>= 8; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
685 *(out++) = disp; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
686 } else { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
687 //TODO: Implement far call??? |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
688 printf("%p - %p = %lX\n", fun, out + 5, disp); |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
689 return NULL; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
690 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
691 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
692 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
693 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
694 uint8_t * retn(uint8_t * out) |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
695 { |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
696 *(out++) = OP_RETN; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
697 return out; |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
698 } |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
699 |
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
700 |