Mercurial > repos > blastem
annotate vdp.c @ 1893:7b62e6805e6a
Only look at low 24-bits of reset vector in ROM type detection heuristic
author | Michael Pavone <pavone@retrodev.com> |
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date | Thu, 05 Dec 2019 09:33:30 -0800 |
parents | 179a2ac29f27 |
children | 55d034719345 |
rev | line source |
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467
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "vdp.h" |
75 | 7 #include "blastem.h" |
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8 #include <stdlib.h> |
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9 #include <string.h> |
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10 #include "render.h" |
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11 #include "util.h" |
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12 |
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13 #define NTSC_INACTIVE_START 224 |
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14 #define PAL_INACTIVE_START 240 |
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15 #define MODE4_INACTIVE_START 192 |
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16 #define BUF_BIT_PRIORITY 0x40 |
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17 #define MAP_BIT_PRIORITY 0x8000 |
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18 #define MAP_BIT_H_FLIP 0x800 |
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19 #define MAP_BIT_V_FLIP 0x1000 |
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20 |
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21 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1) |
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22 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2) |
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23 |
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24 #define MCLKS_SLOT_H40 16 |
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25 #define MCLKS_SLOT_H32 20 |
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26 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after |
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27 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one |
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28 #define VINT_SLOT_MODE4 4 |
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29 #define HSYNC_SLOT_H40 230 |
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30 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17) |
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31 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results |
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32 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results |
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33 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result |
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34 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results |
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35 #define LINE_CHANGE_H40 165 |
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36 #define LINE_CHANGE_H32 133 |
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37 #define LINE_CHANGE_MODE4 249 |
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38 #define VBLANK_START_H40 (LINE_CHANGE_H40+2) |
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39 #define VBLANK_START_H32 (LINE_CHANGE_H32+2) |
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40 #define FIFO_LATENCY 3 |
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41 |
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42 #define BORDER_TOP_V24 27 |
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43 #define BORDER_TOP_V28 11 |
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44 #define BORDER_TOP_V24_PAL 54 |
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45 #define BORDER_TOP_V28_PAL 38 |
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46 #define BORDER_TOP_V30_PAL 30 |
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47 |
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48 #define BORDER_BOT_V24 24 |
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49 #define BORDER_BOT_V28 8 |
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50 #define BORDER_BOT_V24_PAL 48 |
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51 #define BORDER_BOT_V28_PAL 32 |
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52 #define BORDER_BOT_V30_PAL 24 |
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53 |
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54 enum { |
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55 INACTIVE = 0, |
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56 PREPARING, //used for line 0x1FF |
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57 ACTIVE |
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58 }; |
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59 |
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60 static int32_t color_map[1 << 12]; |
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61 static uint16_t mode4_address_map[0x4000]; |
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62 static uint32_t planar_to_chunky[256]; |
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63 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255}; |
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64 |
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65 static uint8_t debug_base[][3] = { |
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66 {127, 127, 127}, //BG |
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67 {0, 0, 127}, //A |
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68 {127, 0, 0}, //Window |
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69 {0, 127, 0}, //B |
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70 {127, 0, 127} //Sprites |
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71 }; |
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72 |
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73 static uint32_t calc_crop(uint32_t crop, uint32_t border) |
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74 { |
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75 return crop >= border ? 0 : border - crop; |
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76 } |
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77 |
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78 static void update_video_params(vdp_context *context) |
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79 { |
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80 uint32_t top_crop = render_overscan_top(); |
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81 uint32_t bot_crop = render_overscan_bot(); |
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82 uint32_t border_top; |
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83 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
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84 if (context->regs[REG_MODE_2] & BIT_PAL) { |
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85 if (context->flags2 & FLAG2_REGION_PAL) { |
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86 context->inactive_start = PAL_INACTIVE_START; |
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87 border_top = BORDER_TOP_V30_PAL; |
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88 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V30_PAL); |
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89 } else { |
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90 //the behavior here is rather weird and needs more investigation |
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91 context->inactive_start = 0xF0; |
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92 border_top = 1; |
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93 context->border_bot = calc_crop(bot_crop, 3); |
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94 } |
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95 } else { |
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96 context->inactive_start = NTSC_INACTIVE_START; |
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97 if (context->flags2 & FLAG2_REGION_PAL) { |
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98 border_top = BORDER_TOP_V28_PAL; |
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99 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28_PAL); |
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100 } else { |
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101 border_top = BORDER_TOP_V28; |
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102 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28); |
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103 } |
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104 } |
1335
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Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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105 if (context->regs[REG_MODE_4] & BIT_H40) { |
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Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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106 context->max_sprites_frame = MAX_SPRITES_FRAME; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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107 context->max_sprites_line = MAX_SPRITES_LINE; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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108 } else { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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109 context->max_sprites_frame = MAX_SPRITES_FRAME_H32; |
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Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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110 context->max_sprites_line = MAX_SPRITES_LINE_H32; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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111 } |
1325
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Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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112 if (context->state == INACTIVE) { |
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113 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active |
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114 if (context->vcounter < context->inactive_start) { |
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115 context->state = ACTIVE; |
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116 } else if (context->vcounter == 0x1FF) { |
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117 context->state = PREPARING; |
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118 } |
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119 } |
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120 } else { |
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121 context->inactive_start = MODE4_INACTIVE_START; |
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122 if (context->flags2 & FLAG2_REGION_PAL) { |
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123 border_top = BORDER_TOP_V24_PAL; |
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124 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24_PAL); |
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125 } else { |
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126 border_top = BORDER_TOP_V24; |
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127 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24); |
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128 } |
1325
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129 if (!(context->regs[REG_MODE_1] & BIT_MODE_4)){ |
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130 context->state = INACTIVE; |
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131 } else if (context->state == INACTIVE) { |
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132 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active |
58bfbed6cdb5
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133 if (context->vcounter < context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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134 context->state = ACTIVE; |
58bfbed6cdb5
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135 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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136 else if (context->vcounter == 0x1FF) { |
58bfbed6cdb5
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137 context->state = PREPARING; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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138 } |
58bfbed6cdb5
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139 } |
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140 } |
1881
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141 context->border_top = calc_crop(top_crop, border_top); |
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142 context->top_offset = border_top - context->border_top; |
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143 } |
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144 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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145 static uint8_t color_map_init_done; |
426
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146 |
1640
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Small cleanup of vdp_context struct layout and removal of separately allocated buffers
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147 vdp_context *init_vdp_context(uint8_t region_pal) |
20
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Mostly broken VDP core and savestate viewer
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148 { |
1640
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149 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE); |
505
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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150 if (headless) { |
1881
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151 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(uint32_t)); |
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152 context->output_pitch = LINEBUF_SIZE * sizeof(uint32_t); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
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503
diff
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153 } else { |
1436
40c3be9f1af7
Fix timing of VDP ODD flag toggle
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1432
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154 context->cur_buffer = FRAMEBUFFER_ODD; |
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155 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
156 } |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
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157 context->sprite_draws = MAX_SPRITES_LINE; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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470
diff
changeset
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158 context->fifo_write = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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470
diff
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159 context->fifo_read = -1; |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
160 context->regs[REG_HINT] = context->hint_counter = 0xFF; |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
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161 |
426
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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162 if (!color_map_init_done) { |
add9e2f5c0e3
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163 uint8_t b,g,r; |
add9e2f5c0e3
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164 for (uint16_t color = 0; color < (1 << 12); color++) { |
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165 if (color & FBUF_SHADOW) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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166 b = levels[(color >> 9) & 0x7]; |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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167 g = levels[(color >> 5) & 0x7]; |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
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168 r = levels[(color >> 1) & 0x7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
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169 } else if(color & FBUF_HILIGHT) { |
add9e2f5c0e3
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diff
changeset
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170 b = levels[((color >> 9) & 0x7) + 7]; |
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diff
changeset
|
171 g = levels[((color >> 5) & 0x7) + 7]; |
add9e2f5c0e3
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changeset
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172 r = levels[((color >> 1) & 0x7) + 7]; |
1120
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Somewhat broken implementation of Mode 4
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diff
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173 } else if(color & FBUF_MODE4) { |
1127
cb4771f4543a
Fix Mode 4 color mapping
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parents:
1125
diff
changeset
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174 b = levels[(color >> 4 & 0xC) | (color >> 6 & 0x2)]; |
1125
fba485949723
Brighten up Mode 4 colors
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parents:
1124
diff
changeset
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175 g = levels[(color >> 2 & 0x8) | (color >> 1 & 0x4) | (color >> 4 & 0x2)]; |
fba485949723
Brighten up Mode 4 colors
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parents:
1124
diff
changeset
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176 r = levels[(color << 1 & 0xC) | (color >> 1 & 0x2)]; |
426
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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177 } else { |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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178 b = levels[(color >> 8) & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
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179 g = levels[(color >> 4) & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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diff
changeset
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180 r = levels[color & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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181 } |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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changeset
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182 color_map[color] = render_map_color(r, g, b); |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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diff
changeset
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183 } |
1120
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Somewhat broken implementation of Mode 4
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184 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++) |
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Somewhat broken implementation of Mode 4
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185 { |
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186 uint16_t mode5_addr = mode4_addr & 0x3DFD; |
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Somewhat broken implementation of Mode 4
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187 mode5_addr |= mode4_addr << 8 & 0x200; |
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Somewhat broken implementation of Mode 4
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188 mode5_addr |= mode4_addr >> 8 & 2; |
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Somewhat broken implementation of Mode 4
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parents:
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189 mode4_address_map[mode4_addr] = mode5_addr; |
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Somewhat broken implementation of Mode 4
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190 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
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191 for (uint32_t planar = 0; planar < 256; planar++) |
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192 { |
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193 uint32_t chunky = 0; |
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194 for (int bit = 7; bit >= 0; bit--) |
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195 { |
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196 chunky = chunky << 4; |
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197 chunky |= planar >> bit & 1; |
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198 } |
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199 planar_to_chunky[planar] = chunky; |
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200 } |
426
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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424
diff
changeset
|
201 color_map_init_done = 1; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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424
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202 } |
437
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203 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++) |
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204 { |
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205 uint8_t src = color & DBG_SRC_MASK; |
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206 if (src > DBG_SRC_S) { |
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207 context->debugcolors[color] = 0; |
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208 } else { |
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209 uint8_t r,g,b; |
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210 b = debug_base[src][0]; |
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211 g = debug_base[src][1]; |
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212 r = debug_base[src][2]; |
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213 if (color & DBG_PRIORITY) |
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214 { |
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215 if (b) { |
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216 b += 48; |
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217 } |
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218 if (g) { |
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219 g += 48; |
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220 } |
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221 if (r) { |
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222 r += 48; |
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223 } |
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224 } |
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225 if (color & DBG_SHADOW) { |
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226 b /= 2; |
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227 g /= 2; |
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228 r /=2 ; |
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229 } |
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230 if (color & DBG_HILIGHT) { |
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231 if (b) { |
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232 b += 72; |
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233 } |
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234 if (g) { |
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235 g += 72; |
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236 } |
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237 if (r) { |
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238 r += 72; |
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239 } |
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240 } |
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241 context->debugcolors[color] = render_map_color(r, g, b); |
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242 } |
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243 } |
623
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Fix most of the breakage caused by the vcounter/hcounter changes
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244 if (region_pal) { |
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245 context->flags2 |= FLAG2_REGION_PAL; |
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Fix most of the breakage caused by the vcounter/hcounter changes
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246 } |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
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1163
diff
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247 update_video_params(context); |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
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1878
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248 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * context->border_top); |
1640
3602f3b20072
Small cleanup of vdp_context struct layout and removal of separately allocated buffers
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1639
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249 return context; |
20
f664eeb55cb4
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250 } |
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251 |
884
252dfd29831d
Selecting a second game from the menu now works
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822
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252 void vdp_free(vdp_context *context) |
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253 { |
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254 free(context); |
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255 } |
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|
256 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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1077
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257 static int is_refresh(vdp_context * context, uint32_t slot) |
460
788ba843a731
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diff
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258 { |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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621
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|
259 if (context->regs[REG_MODE_4] & BIT_H40) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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|
260 return slot == 250 || slot == 26 || slot == 59 || slot == 90 || slot == 122 || slot == 154; |
460
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diff
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|
261 } else { |
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diff
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|
262 //TODO: Figure out which slots are refresh when display is off in 32-cell mode |
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diff
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|
263 //These numbers are guesses based on H40 numbers |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
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|
264 return slot == 243 || slot == 19 || slot == 51 || slot == 83 || slot == 115; |
460
788ba843a731
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diff
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|
265 //The numbers below are the refresh slots during active display |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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|
266 //return (slot == 29 || slot == 61 || slot == 93 || slot == 125); |
460
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diff
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|
267 } |
788ba843a731
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parents:
454
diff
changeset
|
268 } |
788ba843a731
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454
diff
changeset
|
269 |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
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parents:
1150
diff
changeset
|
270 static void increment_address(vdp_context *context) |
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|
271 { |
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|
272 context->address += context->regs[REG_AUTOINC]; |
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|
273 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
681e8a13b261
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diff
changeset
|
274 context->address++; |
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|
275 } |
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1150
diff
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|
276 } |
681e8a13b261
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diff
changeset
|
277 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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parents:
1077
diff
changeset
|
278 static void render_sprite_cells(vdp_context * context) |
20
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parents:
diff
changeset
|
279 { |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
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|
280 if (context->cur_slot > MAX_SPRITES_LINE) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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|
281 context->cur_slot--; |
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Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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|
282 return; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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|
283 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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|
284 if (context->cur_slot < 0) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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|
285 return; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
286 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
287 sprite_draw * d = context->sprite_draw_list + context->cur_slot; |
1871
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
288 uint16_t address = d->address; |
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
289 address += context->sprite_x_offset * d->height * 4; |
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
290 context->serial_address = address; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
291 uint16_t dir; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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diff
changeset
|
292 int16_t x; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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parents:
1834
diff
changeset
|
293 if (d->h_flip) { |
1871
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
294 x = d->x_pos + 7 + 8 * (d->width - context->sprite_x_offset - 1); |
1866
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Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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diff
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|
295 dir = -1; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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diff
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|
296 } else { |
1871
e75b788caedd
Fix debug register output regression in border region
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diff
changeset
|
297 x = d->x_pos + context->sprite_x_offset * 8; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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diff
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|
298 dir = 1; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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|
299 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
diff
changeset
|
300 if (d->x_pos) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
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1834
diff
changeset
|
301 context->flags |= FLAG_CAN_MASK; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
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302 if (!(context->flags & FLAG_MASKED)) { |
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303 x -= 128; |
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304 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x); |
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305 uint8_t collide = 0; |
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306 if (x >= 8 && x < 312) { |
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307 //sprite is fully visible |
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308 for (; address != ((context->serial_address+4) & 0xFFFF); address++) { |
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309 uint8_t pixel = context->vdpmem[address] >> 4; |
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310 if (!(context->linebuf[x] & 0xF)) { |
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311 context->linebuf[x] = pixel | d->pal_priority; |
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312 } else { |
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313 collide |= pixel; |
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314 } |
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315 x += dir; |
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316 pixel = context->vdpmem[address] & 0xF; |
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317 if (!(context->linebuf[x] & 0xF)) { |
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318 context->linebuf[x] = pixel | d->pal_priority; |
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319 } else { |
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320 collide |= pixel; |
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321 } |
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322 x += dir; |
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323 } |
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324 } else if (x > -8 && x < 327) { |
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325 //sprite is partially visible |
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326 for (; address != ((context->serial_address+4) & 0xFFFF); address++) { |
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327 if (x >= 0 && x < 320) { |
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328 uint8_t pixel = context->vdpmem[address] >> 4; |
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329 if (!(context->linebuf[x] & 0xF)) { |
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330 context->linebuf[x] = pixel | d->pal_priority; |
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331 } else { |
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332 collide |= pixel; |
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333 } |
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334 } |
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335 x += dir; |
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336 if (x >= 0 && x < 320) { |
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337 uint8_t pixel = context->vdpmem[address] & 0xF; |
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338 if (!(context->linebuf[x] & 0xF)) { |
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339 context->linebuf[x] = pixel | d->pal_priority; |
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340 } else { |
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341 collide |= pixel; |
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342 } |
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343 } |
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344 x += dir; |
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345 } |
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346 } |
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347 if (collide) { |
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348 context->flags2 |= FLAG2_SPRITE_COLLIDE; |
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349 } |
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350 } |
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351 } else if (context->flags & FLAG_CAN_MASK) { |
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352 context->flags |= FLAG_MASKED; |
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353 context->flags &= ~FLAG_CAN_MASK; |
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354 } |
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355 |
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356 context->sprite_x_offset++; |
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357 if (context->sprite_x_offset == d->width) { |
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358 d->x_pos = 0; |
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359 context->sprite_x_offset = 0; |
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360 context->cur_slot--; |
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361 } |
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362 } |
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363 |
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364 static void fetch_sprite_cells_mode4(vdp_context * context) |
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365 { |
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366 if (context->sprite_index >= context->sprite_draws) { |
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367 sprite_draw * d = context->sprite_draw_list + context->sprite_index; |
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368 uint32_t address = mode4_address_map[d->address & 0x3FFF]; |
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369 context->fetch_tmp[0] = context->vdpmem[address]; |
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370 context->fetch_tmp[1] = context->vdpmem[address + 1]; |
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371 } |
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372 } |
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373 |
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374 static void render_sprite_cells_mode4(vdp_context * context) |
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375 { |
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376 if (context->sprite_index >= context->sprite_draws) { |
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377 sprite_draw * d = context->sprite_draw_list + context->sprite_index; |
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378 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1; |
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379 pixels |= planar_to_chunky[context->fetch_tmp[1]]; |
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380 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF]; |
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381 pixels |= planar_to_chunky[context->vdpmem[address]] << 3; |
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382 pixels |= planar_to_chunky[context->vdpmem[address + 1]] << 2; |
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383 int x = d->x_pos & 0xFF; |
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384 for (int i = 28; i >= 0; i -= 4, x++) |
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385 { |
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386 if (context->linebuf[x] && (pixels >> i & 0xF)) { |
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|
387 if ( |
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388 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8) |
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389 || ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256) |
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390 ) { |
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391 context->flags2 |= FLAG2_SPRITE_COLLIDE; |
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392 } |
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393 } else { |
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394 context->linebuf[x] = pixels >> i & 0xF; |
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395 } |
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396 } |
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397 context->sprite_index--; |
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398 } |
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399 } |
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|
400 |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
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|
401 static uint32_t mode5_sat_address(vdp_context *context) |
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|
402 { |
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|
403 uint32_t addr = context->regs[REG_SAT] << 9; |
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|
404 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) { |
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|
405 addr &= 0xFFFF; |
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|
406 } |
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SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
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|
407 if (context->regs[REG_MODE_4] & BIT_H40) { |
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|
408 addr &= 0x1FC00; |
df3d690cb2c3
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|
409 } |
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SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
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|
410 return addr; |
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SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
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|
411 } |
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SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
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|
412 |
322
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
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318
diff
changeset
|
413 void vdp_print_sprite_table(vdp_context * context) |
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
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changeset
|
414 { |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
415 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
416 uint16_t sat_address = mode5_sat_address(context); |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
417 uint16_t current_index = 0; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
418 uint8_t count = 0; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
419 do { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
420 uint16_t address = current_index * 8 + sat_address; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
421 uint16_t cache_address = current_index * 4; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
422 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
423 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
424 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 | context->sat_cache[cache_address+1]) & 0x1FF; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
425 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
426 uint16_t link = context->sat_cache[cache_address+3] & 0x7F; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
427 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
428 uint8_t pri = context->vdpmem[address + 4] >> 7; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
429 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
430 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
431 current_index = link; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
432 count++; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
433 } while (current_index != 0 && count < 80); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
434 } else { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
435 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
436 for (int i = 0; i < 64; i++) |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
437 { |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
438 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]]; |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
439 if (y == 0xD0) { |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
440 break; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
441 } |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
442 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]]; |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
443 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2]] * 32 |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
444 + (context->regs[REG_STILE_BASE] << 11 & 0x2000); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
445 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
446 tile_address &= ~32; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
447 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
448 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
449 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
450 } |
322
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
451 } |
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
452 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
453 #define VRAM_READ 0 //0000 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
454 #define VRAM_WRITE 1 //0001 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
455 //2 would trigger register write 0010 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
456 #define CRAM_WRITE 3 //0011 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
457 #define VSRAM_READ 4 //0100 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
458 #define VSRAM_WRITE 5//0101 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
459 //6 would trigger regsiter write 0110 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
460 //7 is a mystery //0111 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
461 #define CRAM_READ 8 //1000 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
462 //9 is also a mystery //1001 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
463 //A would trigger register write 1010 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
464 //B is a mystery 1011 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
465 #define VRAM_READ8 0xC //1100 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
466 //D is a mystery 1101 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
467 //E would trigger register write 1110 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
468 //F is a mystery 1111 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
469 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
470 //Possible theory on how bits work |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
471 //CD0 = Read/Write flag |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
472 //CD2,(CD1|CD3) = RAM type |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
473 // 00 = VRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
474 // 01 = CRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
475 // 10 = VSRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
476 // 11 = VRAM8 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
477 //Would result in |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
478 // 7 = VRAM8 write |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
479 // 9 = CRAM write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
480 // B = CRAM write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
481 // D = VRAM8 write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
482 // F = VRAM8 write alais |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
483 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
484 #define DMA_START 0x20 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
485 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
486 static const char * cd_name(uint8_t cd) |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
487 { |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
488 switch (cd & 0xF) |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
489 { |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
490 case VRAM_READ: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
491 return "VRAM read"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
492 case VRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
493 return "VRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
494 case CRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
495 return "CRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
496 case VSRAM_READ: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
497 return "VSRAM read"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
498 case VSRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
499 return "VSRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
500 case VRAM_READ8: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
501 return "VRAM read (undocumented 8-bit mode)"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
502 default: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
503 return "invalid"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
504 } |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
505 } |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
506 |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
507 void vdp_print_reg_explain(vdp_context * context) |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
508 { |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
509 char * hscroll[] = {"full", "7-line", "cell", "line"}; |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
510 printf("**Mode Group**\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
511 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n" |
1331
9bba5ff5beb8
Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents:
1325
diff
changeset
|
512 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n" |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
513 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
514 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", |
757
483f7e7926a6
More clang warning cleanup
Michael Pavone <pavone@retrodev.com>
parents:
748
diff
changeset
|
515 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0, |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
516 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
517 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", |
1331
9bba5ff5beb8
Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents:
1325
diff
changeset
|
518 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64, |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
519 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full", |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
520 hscroll[context->regs[REG_MODE_3] & 0x3], |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
521 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled"); |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
522 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
523 printf("\n**Table Group**\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
524 "02: %.2X | Scroll A Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
525 "03: %.2X | Window Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
526 "04: %.2X | Scroll B Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
527 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
528 "0D: %.2X | HScroll Data Table: $%.4X\n", |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
529 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
530 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
531 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
532 context->regs[REG_SAT], mode5_sat_address(context), |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
533 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
534 } else { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
535 printf("\n**Table Group**\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
536 "02: %.2X | Background Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
537 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
538 "06: %.2X | Sprite Tile Base: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
539 "08: %.2X | Background X Scroll: %d\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
540 "09: %.2X | Background Y Scroll: %d\n", |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
541 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
542 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
543 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
544 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL], |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
545 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
546 |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
547 } |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
548 char * sizes[] = {"32", "64", "invalid", "128"}; |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
549 printf("\n**Misc Group**\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
550 "07: %.2X | Backdrop Color: $%X\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
551 "0A: %.2X | H-Int Counter: %u\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
552 "0F: %.2X | Auto-increment: $%X\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
553 "10: %.2X | Scroll A/B Size: %sx%s\n", |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
554 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR], |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
555 context->regs[REG_HINT], context->regs[REG_HINT], |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
556 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC], |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
557 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]); |
621
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
558 char * src_types[] = {"68K", "68K", "Copy", "Fill"}; |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
559 printf("\n**DMA Group**\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
560 "13: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
561 "14: %.2X | DMA Length: $%.4X words\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
562 "15: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
563 "16: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
564 "17: %.2X | DMA Source Address: $%.6X, Type: %s\n", |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
565 context->regs[REG_DMALEN_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
566 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
567 context->regs[REG_DMASRC_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
568 context->regs[REG_DMASRC_M], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
569 context->regs[REG_DMASRC_H], |
629
9089951a1994
Small fix to display of DMA source address in vr debug command
Michael Pavone <pavone@retrodev.com>
parents:
624
diff
changeset
|
570 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L] << 1, |
621
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
571 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]); |
1628
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
572 uint8_t old_flags = context->flags; |
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
573 uint8_t old_flags2 = context->flags2; |
438
b3cee2fe690b
Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents:
437
diff
changeset
|
574 printf("\n**Internal Group**\n" |
b3cee2fe690b
Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents:
437
diff
changeset
|
575 "Address: %X\n" |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
576 "CD: %X - %s\n" |
647
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
577 "Pending: %s\n" |
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
578 "VCounter: %d\n" |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
579 "HCounter: %d\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
580 "VINT Pending: %s\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
581 "HINT Pending: %s\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
582 "Status: %X\n", |
1150
322d28e6f13c
Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1149
diff
changeset
|
583 context->address, context->cd, cd_name(context->cd), |
322d28e6f13c
Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1149
diff
changeset
|
584 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none", |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
585 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false", |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
586 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_control_port_read(context)); |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
587 printf("\nDebug Register: %X | Output disabled: %s, Force Layer: %d\n", context->test_port, |
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
588 (context->test_port & TEST_BIT_DISABLE) ? "true" : "false", context->test_port >> 7 & 3 |
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
589 ); |
1628
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
590 //restore flags as calling vdp_control_port_read can change them |
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
591 context->flags = old_flags; |
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
592 context->flags2 = old_flags2; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
593 } |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
594 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
595 static uint8_t is_active(vdp_context *context) |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
596 { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
597 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
598 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
599 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
600 static void scan_sprite_table(uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
601 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
602 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) { |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
603 line += 1; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
604 uint16_t ymask, ymin; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
605 uint8_t height_mult; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
606 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
607 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
608 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
609 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
610 } |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
611 ymask = 0x3FF; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
612 ymin = 256; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
613 height_mult = 16; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
614 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
615 ymask = 0x1FF; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
616 ymin = 128; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
617 height_mult = 8; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
618 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
619 context->sprite_index &= 0x7F; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
620 //TODO: Implement squirelly behavior documented by Kabuto |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
621 if (context->sprite_index >= context->max_sprites_frame) { |
38
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
622 context->sprite_index = 0; |
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
623 return; |
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
624 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
625 uint16_t address = context->sprite_index * 4; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
626 line += ymin; |
1346
f7ca42e020fd
Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1344
diff
changeset
|
627 line &= ymask; |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
628 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
629 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult; |
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
630 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
631 if (y <= line && line < (y + height)) { |
27
aa1c47fab3f1
Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents:
26
diff
changeset
|
632 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
633 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2]; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
634 context->sprite_info_list[context->slot_counter++].index = context->sprite_index; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
635 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
636 context->sprite_index = context->sat_cache[address+3] & 0x7F; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
637 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
638 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
639 //TODO: Implement squirelly behavior documented by Kabuto |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
640 if (context->sprite_index >= context->max_sprites_frame) { |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
641 context->sprite_index = 0; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
642 return; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
643 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
644 address = context->sprite_index * 4; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
645 y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
646 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult; |
323
8c01b4154480
Properly mask sprite X and Y coordinates
Mike Pavone <pavone@retrodev.com>
parents:
322
diff
changeset
|
647 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
648 if (y <= line && line < (y + height)) { |
27
aa1c47fab3f1
Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents:
26
diff
changeset
|
649 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
650 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2]; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
651 context->sprite_info_list[context->slot_counter++].index = context->sprite_index; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
652 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
653 context->sprite_index = context->sat_cache[address+3] & 0x7F; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
654 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
655 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
656 //TODO: Seems like the overflow flag should be set here if we run out of sprite info slots without hitting the end of the list |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
657 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
658 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
659 static void scan_sprite_table_mode4(vdp_context * context) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
660 { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
661 if (context->sprite_index < MAX_SPRITES_FRAME_H32) { |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
662 uint32_t line = context->vcounter; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
663 line &= 0xFF; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
664 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
665 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index]; |
1138
25268334a24c
Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents:
1137
diff
changeset
|
666 uint32_t y = context->vdpmem[sat_address+1]; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
667 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
668 |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
669 if (y == 0xd0) { |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
670 context->sprite_index = MAX_SPRITES_FRAME_H32; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
671 return; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
672 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
673 if (y <= line && line < (y + size)) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
674 if (!context->slot_counter) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
675 context->sprite_index = MAX_SPRITES_FRAME_H32; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
676 context->flags |= FLAG_DOT_OFLOW; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
677 return; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
678 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
679 context->sprite_info_list[--(context->slot_counter)].size = size; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
680 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
681 context->sprite_info_list[context->slot_counter].y = y; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
682 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
683 context->sprite_index++; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
684 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
685 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
686 if (context->sprite_index < MAX_SPRITES_FRAME_H32) { |
1138
25268334a24c
Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents:
1137
diff
changeset
|
687 y = context->vdpmem[sat_address]; |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
688 if (y == 0xd0) { |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
689 context->sprite_index = MAX_SPRITES_FRAME_H32; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
690 return; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
691 } else { |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
692 if (y <= line && line < (y + size)) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
693 if (!context->slot_counter) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
694 context->sprite_index = MAX_SPRITES_FRAME_H32; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
695 context->flags |= FLAG_DOT_OFLOW; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
696 return; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
697 } |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
698 context->sprite_info_list[--(context->slot_counter)].size = size; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
699 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
700 context->sprite_info_list[context->slot_counter].y = y; |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
701 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
702 context->sprite_index++; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
703 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
704 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
705 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
706 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
707 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
708 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
709 static void read_sprite_x(uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
710 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
711 if (context->cur_slot == context->max_sprites_line) { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
712 context->cur_slot = 0; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
713 } |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
714 if (context->cur_slot < context->slot_counter) { |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
715 if (context->sprite_draws) { |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
716 line += 1; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
717 //in tiles |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
718 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
719 //in pixels |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
720 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
721 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
722 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
723 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
724 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
725 } |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
726 height *= 2; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
727 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
728 uint16_t ymask, ymin; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
729 if (context->double_res) { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
730 ymask = 0x3FF; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
731 ymin = 256; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
732 } else { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
733 ymask = 0x1FF; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
734 ymin = 128; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
735 } |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
736 uint16_t att_addr = mode5_sat_address(context) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
737 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
738 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
739 uint8_t row; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
740 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4; |
1346
f7ca42e020fd
Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1344
diff
changeset
|
741 line = (line + ymin) & ymask; |
1338
3706b683cd48
Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1337
diff
changeset
|
742 int16_t y = ((context->sat_cache[cache_addr] << 8 | context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
743 if (tileinfo & MAP_BIT_V_FLIP) { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
744 row = (y + height - 1) - line; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
745 } else { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
746 row = line-y; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
747 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
748 row &= ymask >> 4; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
749 uint16_t address; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
750 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
751 address = ((tileinfo & 0x3FF) << 6) + row * 4; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
752 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
753 address = ((tileinfo & 0x7FF) << 5) + row * 4; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
754 } |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
755 context->sprite_draws--; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
756 context->sprite_draw_list[context->sprite_draws].x_pos = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
757 context->sprite_draw_list[context->sprite_draws].address = address; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
758 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
759 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
760 context->sprite_draw_list[context->sprite_draws].width = width; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
761 context->sprite_draw_list[context->sprite_draws].height = height; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
763 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
764 context->cur_slot++; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
766 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
767 static void read_sprite_x_mode4(vdp_context * context) |
427
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
768 { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
769 if (context->cur_slot >= context->slot_counter) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
770 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
771 address = mode4_address_map[address]; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
772 --context->sprite_draws; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
773 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
774 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
775 tile_address &= ~32; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
776 } |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
777 tile_address += (context->vcounter - context->sprite_info_list[context->cur_slot].y)* 4; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
778 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1]; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
779 context->sprite_draw_list[context->sprite_draws].address = tile_address; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
780 context->cur_slot--; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
781 } |
427
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
782 } |
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
783 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
784 #define CRAM_BITS 0xEEE |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
785 #define VSRAM_BITS 0x7FF |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
786 #define VSRAM_DIRTY_BITS 0xF800 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
787 |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
788 //rough estimate of slot number at which border display starts |
1270
687d3969416b
Adjust correspondance between slot number and actual video output to better match video signal measurements and analysis of Outrunners behavior on hardware. Partially fixes ticket:13
Michael Pavone <pavone@retrodev.com>
parents:
1269
diff
changeset
|
789 #define BG_START_SLOT 6 |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
790 |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
791 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value) |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
792 { |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
793 context->colors[index] = color_map[value & CRAM_BITS]; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
794 context->colors[index + SHADOW_OFFSET] = color_map[(value & CRAM_BITS) | FBUF_SHADOW]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
795 context->colors[index + HIGHLIGHT_OFFSET] = color_map[(value & CRAM_BITS) | FBUF_HILIGHT]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
796 context->colors[index + MODE4_OFFSET] = color_map[(value & CRAM_BITS) | FBUF_MODE4]; |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
797 } |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
798 |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
799 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value) |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
800 { |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
801 context->cram[addr] = value; |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
802 update_color_map(context, addr, value); |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
803 } |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
804 |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
805 static void write_cram(vdp_context * context, uint16_t address, uint16_t value) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
806 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
807 uint16_t addr; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
808 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
809 addr = (address/2) & (CRAM_SIZE-1); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
810 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
811 addr = address & 0x1F; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
812 value = (value << 1 & 0xE) | (value << 2 & 0xE0) | (value & 0xE00); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
813 } |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
814 write_cram_internal(context, addr, value); |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
815 |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
816 if (context->hslot >= BG_START_SLOT && ( |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
817 context->vcounter < context->inactive_start + context->border_bot |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
818 || context->vcounter > 0x200 - context->border_top |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
819 )) { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
820 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2; |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
821 if (context->hslot < bg_end_slot) { |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
822 uint32_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + MODE4_OFFSET]; |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
823 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color; |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
824 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
825 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
826 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
827 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
828 static void vdp_advance_dma(vdp_context * context) |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
829 { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
830 context->regs[REG_DMASRC_L] += 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
831 if (!context->regs[REG_DMASRC_L]) { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
832 context->regs[REG_DMASRC_M] += 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
833 } |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
834 context->address += context->regs[REG_AUTOINC]; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
835 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
836 context->regs[REG_DMALEN_H] = dma_len >> 8; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
837 context->regs[REG_DMALEN_L] = dma_len; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
838 if (!dma_len) { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
839 context->flags &= ~FLAG_DMA_RUN; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
840 context->cd &= 0xF; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
841 } |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
842 } |
1019
e34334e6c682
Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
Michael Pavone <pavone@retrodev.com>
parents:
1001
diff
changeset
|
843 |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
844 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value) |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
845 { |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
846 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
847 if (!(address & 4)) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
848 uint32_t sat_address = mode5_sat_address(context); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
849 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
850 uint16_t cache_address = address - sat_address; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
851 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
852 context->sat_cache[cache_address] = value >> 8; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
853 context->sat_cache[cache_address^1] = value; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
854 } |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
855 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
856 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
857 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
858 |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
859 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value) |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
860 { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
861 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
862 if (!(address & 4)) { |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
863 uint32_t sat_address = mode5_sat_address(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
864 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
865 uint16_t cache_address = address - sat_address; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
866 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
867 context->sat_cache[cache_address] = value; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
868 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
869 } |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
870 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
871 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
872 |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
873 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value) |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
874 { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
875 address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
876 address ^= 1; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
877 //TODO: Support an option to actually have 128KB of VRAM |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
878 context->vdpmem[address] = value; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
879 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
880 |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
881 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value) |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
882 { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
883 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
884 address &= 0xFFFF; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
885 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
886 address = mode4_address_map[address & 0x3FFF]; |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
887 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
888 context->vdpmem[address] = value; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
889 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
890 |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
891 #define DMA_FILL 0x80 |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
892 #define DMA_COPY 0xC0 |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
893 #define DMA_TYPE_MASK 0xC0 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
894 static void external_slot(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
895 { |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
896 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) { |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
897 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1); |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
898 fifo_entry * cur = context->fifo + context->fifo_read; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
899 cur->cycle = context->cycles; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
900 cur->address = context->address; |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
901 cur->partial = 1; |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
902 vdp_advance_dma(context); |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
903 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
904 fifo_entry * start = context->fifo + context->fifo_read; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
905 if (context->fifo_read >= 0 && start->cycle <= context->cycles) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
906 switch (start->cd & 0xF) |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
907 { |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
908 case VRAM_WRITE: |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
909 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) == (BIT_128K_VRAM|BIT_MODE_5)) { |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
910 vdp_check_update_sat(context, start->address, start->value); |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
911 write_vram_word(context, start->address, start->value); |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
912 } else { |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
913 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value; |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
914 vdp_check_update_sat_byte(context, start->address ^ 1, byte); |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
915 write_vram_byte(context, start->address ^ 1, byte); |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
916 if (!start->partial) { |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
917 start->address = start->address ^ 1; |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
918 start->partial = 1; |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
919 //skip auto-increment and removal of entry from fifo |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
920 return; |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
921 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
922 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
923 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
924 case CRAM_WRITE: { |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
925 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
926 if (start->partial == 3) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
927 uint16_t val; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
928 if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
929 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) | start->value << 8; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
930 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
931 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
932 val = (context->cram[address] & 0xFF00) | start->value; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
933 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
934 write_cram(context, start->address, val); |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
935 } else { |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
936 write_cram(context, start->address, start->partial ? context->fifo[context->fifo_write].value : start->value); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
937 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
938 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
939 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
940 case VSRAM_WRITE: |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
941 if (((start->address/2) & 63) < VSRAM_SIZE) { |
1432
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
942 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
943 if (start->partial == 3) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
944 if (start->address & 1) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
945 context->vsram[(start->address/2) & 63] &= 0xFF; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
946 context->vsram[(start->address/2) & 63] |= start->value << 8; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
947 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
948 context->vsram[(start->address/2) & 63] &= 0xFF00; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
949 context->vsram[(start->address/2) & 63] |= start->value; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
950 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
951 } else { |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
952 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
953 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
954 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
955 |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
956 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
957 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
958 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1); |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
959 if (context->fifo_read == context->fifo_write) { |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
960 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) { |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
961 context->flags |= FLAG_DMA_RUN; |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
962 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
963 context->fifo_read = -1; |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
964 } |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
965 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
966 if (context->flags & FLAG_READ_FETCHED) { |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
967 write_vram_byte(context, context->address ^ 1, context->prefetch); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
968 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
969 //Update DMA state |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
970 vdp_advance_dma(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
971 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
972 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
973 } else { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
974 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L] ^ 1]; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
975 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
976 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
977 } |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
978 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED|FLAG_PENDING))) { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
979 switch(context->cd & 0xF) |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
980 { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
981 case VRAM_READ: |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
982 if (context->flags2 & FLAG2_READ_PENDING) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
983 context->prefetch |= context->vdpmem[context->address | 1]; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
984 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
985 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
986 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
987 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
988 } else { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
989 //TODO: 128K VRAM Mode |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
990 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
991 context->flags2 |= FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
992 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
993 break; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
994 case VRAM_READ8: { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
995 uint32_t address = context->address ^ 1; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
996 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
997 address = mode4_address_map[address & 0x3FFF]; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
998 } |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
999 context->prefetch = context->vdpmem[address]; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1000 context->prefetch |= context->fifo[context->fifo_write].value & 0xFF00; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1001 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1002 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
1003 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1004 break; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1005 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1006 case CRAM_READ: |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1007 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1008 context->prefetch |= context->fifo[context->fifo_write].value & ~CRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1009 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1010 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
1011 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1012 break; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1013 case VSRAM_READ: { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1014 uint16_t address = (context->address /2) & 63; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1015 if (address >= VSRAM_SIZE) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1016 address = 0; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1017 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1018 context->prefetch = context->vsram[address] & VSRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1019 context->prefetch |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1020 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1021 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
1022 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1023 break; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1024 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1025 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1026 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1027 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1028 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1029 static void run_dma_src(vdp_context * context, int32_t slot) |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1030 { |
75 | 1031 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode |
1032 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations | |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
1033 if (context->fifo_write == context->fifo_read) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1034 return; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1035 } |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1036 fifo_entry * cur = NULL; |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1037 if (!(context->regs[REG_DMASRC_H] & 0x80)) |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1038 { |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1039 //68K -> VDP |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
1040 if (slot == -1 || !is_refresh(context, slot-1)) { |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1041 cur = context->fifo + context->fifo_write; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
1042 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1043 cur->address = context->address; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1044 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1045 cur->cd = context->cd; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1046 cur->partial = 0; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1047 if (context->fifo_read < 0) { |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1048 context->fifo_read = context->fifo_write; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1049 } |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1050 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1051 vdp_advance_dma(context); |
75 | 1052 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1053 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1054 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1055 |
40 | 1056 #define WINDOW_RIGHT 0x80 |
1057 #define WINDOW_DOWN 0x80 | |
1058 | |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1059 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1060 { |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1061 uint16_t window_line_shift, v_offset_mask, vscroll_shift; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1062 if (context->double_res) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1063 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1064 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1065 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1066 } |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1067 window_line_shift = 4; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1068 v_offset_mask = 0xF; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1069 vscroll_shift = 4; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1070 } else { |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1071 window_line_shift = 3; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1072 v_offset_mask = 0x7; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1073 vscroll_shift = 3; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1074 } |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1075 //TODO: Further research on vscroll latch behavior and the "first column bug" |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1076 if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1077 if (!column) { |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1078 if (context->regs[REG_MODE_4] & BIT_H40) { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1079 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1080 //ends up fetching the last value on the VSRAM bus in the H40 case |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1081 //getting the last latched value should be close enough for now |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1082 if (!vsram_off) { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1083 context->vscroll_latch[0] = context->vscroll_latch[1]; |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1084 } |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1085 } else { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1086 //supposedly it's always forced to 0 in the H32 case |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1087 context->vscroll_latch[0] = context->vscroll_latch[1] = 0; |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1088 } |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1089 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1090 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off]; |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1091 } |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1092 } |
40 | 1093 if (!vsram_off) { |
1094 uint16_t left_col, right_col; | |
1095 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { | |
920
e64168bb2b25
Fix calculation of window start column when it's on the right side. This removes graphical glitches in Afterburner 2, Fireshark and Dungeons and Dragons: Warriors of the Eternal Sun and probably others
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
1096 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1097 right_col = 42; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1098 } else { |
40 | 1099 left_col = 0; |
1100 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; | |
1101 if (right_col) { | |
1102 right_col += 2; | |
1103 } | |
1104 } | |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1105 uint16_t top_line, bottom_line; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1106 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) { |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1107 top_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1108 bottom_line = context->double_res ? 481 : 241; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1109 } else { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1110 top_line = 0; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1111 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1112 } |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1113 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1114 uint16_t address = context->regs[REG_WINDOW] << 10; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1115 uint16_t line_offset, offset, mask; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
1116 if (context->regs[REG_MODE_4] & BIT_H40) { |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1117 address &= 0xF000; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1118 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1119 mask = 0x7F; |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
1120 |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1121 } else { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1122 address &= 0xF800; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1123 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1124 mask = 0x3F; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1125 } |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1126 if (context->double_res) { |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1127 mask <<= 1; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1128 mask |= 1; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1129 } |
42
6653e67a6811
Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents:
41
diff
changeset
|
1130 offset = address + line_offset + (((column - 2) * 2) & mask); |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1131 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1132 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]); |
42
6653e67a6811
Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents:
41
diff
changeset
|
1133 offset = address + line_offset + (((column - 1) * 2) & mask); |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1134 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1135 context->v_offset = (line) & v_offset_mask; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1136 context->flags |= FLAG_WINDOW; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1137 return; |
40 | 1138 } |
1139 context->flags &= ~FLAG_WINDOW; | |
1140 } | |
1290
aa1a8eb5bb2b
Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents:
1289
diff
changeset
|
1141 //TODO: Verify behavior for 0x20 case |
aa1a8eb5bb2b
Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents:
1289
diff
changeset
|
1142 uint16_t vscroll = 0xFF | (context->regs[REG_SCROLL] & 0x30) << 4; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1143 if (context->double_res) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1144 vscroll <<= 1; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1145 vscroll |= 1; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1146 } |
710
4cd8823f79e3
First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Michael Pavone <pavone@retrodev.com>
parents:
708
diff
changeset
|
1147 vscroll &= context->vscroll_latch[vsram_off] + line; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1148 context->v_offset = vscroll & v_offset_mask; |
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
1149 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1150 vscroll >>= vscroll_shift; |
1887
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1151 //TODO: Verify the behavior for a setting of 2 |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1152 static const uint16_t hscroll_masks[] = {0x1F, 0x3F, 0x1F, 0x7F}; |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1153 static const uint16_t v_shifts[] = {6, 7, 0, 8}; |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1154 uint16_t hscroll_mask = hscroll_masks[context->regs[REG_SCROLL] & 0x3]; |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1155 uint16_t v_shift = v_shifts[context->regs[REG_SCROLL] & 0x3]; |
28 | 1156 uint16_t hscroll, offset; |
1157 for (int i = 0; i < 2; i++) { | |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1158 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask; |
1887
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1159 offset = address + (((vscroll << v_shift) + hscroll*2) & 0x1FFF); |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1160 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset); |
28 | 1161 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
1162 if (i) { | |
1163 context->col_2 = col_val; | |
1164 } else { | |
1165 context->col_1 = col_val; | |
1166 } | |
1167 } | |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1168 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1169 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1170 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1171 { |
25
4d0c20ad815a
Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents:
24
diff
changeset
|
1172 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1173 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1174 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1175 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1176 { |
25
4d0c20ad815a
Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents:
24
diff
changeset
|
1177 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1178 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1179 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1180 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1181 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1182 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1183 //add row |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1184 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1185 if (column < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1186 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1187 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1188 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1189 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1190 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1191 address += (vscroll >> 3) * 2 * 32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1192 //add column |
1136
52f25c41abdd
Fix horizontal scrolling in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1135
diff
changeset
|
1193 address += ((column - (context->hscroll_a >> 3)) & 31) * 2; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1194 //adjust for weird VRAM mapping in Mode 4 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1195 address = mode4_address_map[address]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1196 context->col_1 = (context->vdpmem[address] << 8) | context->vdpmem[address+1]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1197 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1198 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1199 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1200 { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1201 uint16_t address; |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1202 uint16_t vflip_base; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1203 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1204 address = ((col & 0x3FF) << 6); |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1205 vflip_base = 60; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1206 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1207 address = ((col & 0x7FF) << 5); |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1208 vflip_base = 28; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1209 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1210 if (col & MAP_BIT_V_FLIP) { |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1211 address += vflip_base - 4 * context->v_offset; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1212 } else { |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1213 address += 4 * context->v_offset; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1214 } |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1215 uint8_t pal_priority = (col >> 9) & 0x70; |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1216 uint32_t bits = *((uint32_t *)(&context->vdpmem[address])); |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1217 tmp_buf += offset; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1218 if (col & MAP_BIT_H_FLIP) { |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1219 uint32_t shift = 28; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1220 for (int i = 0; i < 4; i++) |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1221 { |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1222 uint8_t right = pal_priority | ((bits >> shift) & 0xF); |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1223 shift -= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1224 *(tmp_buf++) = pal_priority | ((bits >> shift) & 0xF); |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1225 shift -= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1226 *(tmp_buf++) = right; |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1227 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1228 } else { |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1229 for (int i = 0; i < 4; i++) |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1230 { |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1231 uint8_t right = pal_priority | (bits & 0xF); |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1232 bits >>= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1233 *(tmp_buf++) = pal_priority | (bits & 0xF); |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1234 bits >>= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1235 *(tmp_buf++) = right; |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1236 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1237 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1238 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1239 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1240 static void render_map_1(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1241 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1242 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1243 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1244 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1245 static void render_map_2(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1246 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1247 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1248 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1249 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1250 static void render_map_3(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1251 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1252 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1253 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1254 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1255 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1256 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1257 //calculate pixel row to fetch |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1258 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1259 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1260 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1261 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1262 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1263 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1264 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1265 vscroll &= 7; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1266 if (context->col_1 & 0x400) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1267 vscroll = 7 - vscroll; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1268 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1269 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1270 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1271 context->fetch_tmp[0] = context->vdpmem[address]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1272 context->fetch_tmp[1] = context->vdpmem[address+1]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1273 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1274 |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1275 static uint8_t composite_normal(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1276 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1277 uint8_t pixel = bg_index; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1278 uint8_t src = DBG_SRC_BG; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1279 if (plane_b & 0xF) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1280 pixel = plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1281 src = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1282 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1283 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1284 pixel = plane_a; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1285 src = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1286 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1287 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1288 pixel = sprite; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1289 src = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1290 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1291 *debug_dst = src; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1292 return pixel; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1293 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1294 typedef struct { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1295 uint8_t index, intensity; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1296 } sh_pixel; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1297 |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1298 static sh_pixel composite_highlight(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1299 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1300 uint8_t pixel = bg_index; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1301 uint8_t src = DBG_SRC_BG; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1302 uint8_t intensity = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1303 if (plane_b & 0xF) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1304 pixel = plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1305 src = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1306 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1307 intensity = plane_b & BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1308 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1309 pixel = plane_a; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1310 src = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1311 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1312 intensity |= plane_a & BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1313 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1314 if ((sprite & 0x3F) == 0x3E) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1315 intensity += BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1316 } else if ((sprite & 0x3F) == 0x3F) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1317 intensity = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1318 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1319 pixel = sprite; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1320 src = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1321 if ((pixel & 0xF) == 0xE) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1322 intensity = BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1323 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1324 intensity |= pixel & BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1325 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1326 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1327 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1328 *debug_dst = src; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1329 return (sh_pixel){.index = pixel, .intensity = intensity}; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1330 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1331 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1332 static void render_normal(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off) |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1333 { |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1334 uint8_t *sprite_buf = context->linebuf + col * 8; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1335 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1336 memset(dst, 0, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1337 memset(debug_dst, DBG_SRC_BG, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1338 dst += 8; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1339 debug_dst += 8; |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1340 sprite_buf += 8; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1341 plane_a_off += 8; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1342 plane_b_off += 8; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1343 for (int i = 0; i < 8; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1344 { |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1345 uint8_t sprite, plane_a, plane_b; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1346 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1347 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1348 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1349 debug_dst++; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1350 } |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1351 } else { |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1352 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1353 { |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1354 uint8_t sprite, plane_a, plane_b; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1355 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1356 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1357 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1358 debug_dst++; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1359 } |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1360 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1361 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1362 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1363 static void render_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off) |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1364 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1365 int start = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1366 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1367 memset(dst, SHADOW_OFFSET + (context->regs[REG_BG_COLOR] & 0x3F), 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1368 memset(debug_dst, DBG_SRC_BG | DBG_SHADOW, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1369 dst += 8; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1370 debug_dst += 8; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1371 start = 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1372 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1373 uint8_t *sprite_buf = context->linebuf + col * 8 + start; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1374 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1375 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1376 uint8_t sprite, plane_a, plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1377 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1378 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1379 sprite = *sprite_buf; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1380 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, context->regs[REG_BG_COLOR]); |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1381 uint8_t final_pixel; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1382 if (pixel.intensity == BUF_BIT_PRIORITY << 1) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1383 final_pixel = (pixel.index & 0x3F) + HIGHLIGHT_OFFSET; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1384 } else if (pixel.intensity) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1385 final_pixel = pixel.index & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1386 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1387 final_pixel = (pixel.index & 0x3F) + SHADOW_OFFSET; |
1652
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1388 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1389 debug_dst++; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1390 *(dst++) = final_pixel; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1391 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1392 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1393 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1394 static void render_testreg(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off, uint8_t output_disabled, uint8_t test_layer) |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1395 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1396 if (output_disabled) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1397 switch (test_layer) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1398 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1399 case 0: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1400 for (int i = 0; i < 16; i++) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1401 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1402 *(dst++) = 0x3F; //TODO: confirm this on hardware |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1403 *(debug_dst++) = DBG_SRC_BG; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1404 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1405 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1406 case 1: { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1407 uint8_t *sprite_buf = context->linebuf + col * 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1408 for (int i = 0; i < 16; i++) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1409 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1410 *(dst++) = *(sprite_buf++) & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1411 *(debug_dst++) = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1412 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1413 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1414 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1415 case 2: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1416 for (int i = 0; i < 16; i++) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1417 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1418 *(dst++) = context->tmp_buf_a[(plane_a_off++) & SCROLL_BUFFER_MASK] & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1419 *(debug_dst++) = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1420 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1421 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1422 case 3: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1423 for (int i = 0; i < 16; i++) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1424 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1425 *(dst++) = context->tmp_buf_b[(plane_b_off++) & SCROLL_BUFFER_MASK] & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1426 *(debug_dst++) = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1427 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1428 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1429 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1430 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1431 int start = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1432 uint8_t *sprite_buf = context->linebuf + col * 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1433 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1434 //TODO: Confirm how test register interacts with column 0 blanking |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1435 uint8_t pixel = 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1436 uint8_t src = DBG_SRC_BG; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1437 for (int i = 0; i < 8; ++i) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1438 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1439 switch (test_layer) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1440 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1441 case 1: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1442 pixel &= sprite_buf[i]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1443 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1444 src = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1445 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1446 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1447 case 2: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1448 pixel &= context->tmp_buf_a[(plane_a_off + i) & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1449 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1450 src = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1451 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1452 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1453 case 3: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1454 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1455 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1456 src = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1457 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1458 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1459 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1460 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1461 *(dst++) = pixel; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1462 *(debug_dst++) = src; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1463 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1464 plane_a_off += 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1465 plane_b_off += 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1466 sprite_buf += 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1467 start = 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1468 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1469 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1470 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1471 uint8_t sprite, plane_a, plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1472 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1473 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1474 sprite = *sprite_buf; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1475 uint8_t pixel = composite_normal(context, debug_dst, sprite, plane_a, plane_b, 0x3F) & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1476 switch (test_layer) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1477 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1478 case 1: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1479 pixel &= sprite; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1480 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1481 *debug_dst = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1482 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1483 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1484 case 2: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1485 pixel &= plane_a; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1486 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1487 *debug_dst = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1488 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1489 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1490 case 3: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1491 pixel &= plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1492 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1493 *debug_dst = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1494 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1495 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1496 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1497 debug_dst++; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1498 *(dst++) = pixel; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1499 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1500 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1501 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1502 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1503 static void render_testreg_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off, uint8_t output_disabled, uint8_t test_layer) |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1504 { |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1505 int start = 0; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1506 uint8_t *sprite_buf = context->linebuf + col * 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1507 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1508 //TODO: Confirm how test register interacts with column 0 blanking |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1509 uint8_t pixel = 0x3F; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1510 uint8_t src = DBG_SRC_BG | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1511 for (int i = 0; i < 8; ++i) |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1512 { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1513 switch (test_layer) |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1514 { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1515 case 1: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1516 pixel &= sprite_buf[i]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1517 if (pixel) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1518 src = DBG_SRC_S | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1519 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1520 break; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1521 case 2: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1522 pixel &= context->tmp_buf_a[(plane_a_off + i) & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1523 if (pixel) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1524 src = DBG_SRC_A | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1525 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1526 break; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1527 case 3: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1528 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1529 if (pixel) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1530 src = DBG_SRC_B | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1531 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1532 break; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1533 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1534 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1535 *(dst++) = SHADOW_OFFSET + pixel; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1536 *(debug_dst++) = src; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1537 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1538 plane_a_off += 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1539 plane_b_off += 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1540 sprite_buf += 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1541 start = 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1542 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1543 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1544 { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1545 uint8_t sprite, plane_a, plane_b; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1546 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1547 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1548 sprite = *sprite_buf; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1549 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, 0x3F); |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1550 if (output_disabled) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1551 pixel.index = 0x3F; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1552 } else { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1553 pixel.index &= 0x3F; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1554 } |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1555 switch (test_layer) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1556 { |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1557 case 1: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1558 pixel.index &= sprite; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1559 if (pixel.index) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1560 *debug_dst = DBG_SRC_S; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1561 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1562 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1563 case 2: |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1564 pixel.index &= plane_a; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1565 if (pixel.index) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1566 *debug_dst = DBG_SRC_A; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1567 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1568 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1569 case 3: |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1570 pixel.index &= plane_b; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1571 if (pixel.index) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1572 *debug_dst = DBG_SRC_B; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1573 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1574 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1575 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1576 if (pixel.intensity == BUF_BIT_PRIORITY << 1) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1577 pixel.index += HIGHLIGHT_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1578 } else if (!pixel.intensity) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1579 pixel.index += SHADOW_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1580 } |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1581 debug_dst++; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1582 *(dst++) = pixel.index; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1583 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1584 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1585 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1586 static void render_map_output(uint32_t line, int32_t col, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1587 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1588 uint8_t *dst; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1589 uint8_t *debug_dst; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1590 uint8_t output_disabled = (context->test_port & TEST_BIT_DISABLE) != 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1591 uint8_t test_layer = context->test_port >> 7 & 3; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
1592 if (context->state == PREPARING && !test_layer) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1593 if (col) { |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1594 col -= 2; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1595 dst = context->compositebuf + BORDER_LEFT + col * 8; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1596 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1597 dst = context->compositebuf; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1598 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1599 memset(dst, 0, BORDER_LEFT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1600 context->done_composite = dst + BORDER_LEFT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1601 return; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1602 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1603 memset(dst, 0, 16); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1604 context->done_composite = dst + 16; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1605 return; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1606 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1607 line &= 0xFF; |
1180
e2b81a0f8fd8
Undo poorly thought out minor optimization that screwed up rendering
Michael Pavone <pavone@retrodev.com>
parents:
1179
diff
changeset
|
1608 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context); |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1609 uint8_t *sprite_buf; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1610 uint8_t sprite, plane_a, plane_b; |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1611 int plane_a_off, plane_b_off; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1612 if (col) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1613 { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1614 col-=2; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1615 dst = context->compositebuf + BORDER_LEFT + col * 8; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1616 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1617 |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1618 |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1619 uint8_t a_src, src; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1620 if (context->flags & FLAG_WINDOW) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1621 plane_a_off = context->buf_a_off; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1622 a_src = DBG_SRC_W; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1623 } else { |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1624 plane_a_off = context->buf_a_off - context->hscroll_a_fine; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1625 a_src = DBG_SRC_A; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1626 } |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1627 plane_b_off = context->buf_b_off - context->hscroll_b_fine; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1628 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7)); |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1629 |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1630 if (context->regs[REG_MODE_4] & BIT_HILIGHT) { |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1631 if (output_disabled || test_layer) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1632 render_testreg_highlight(context, col, dst, debug_dst, plane_a_off, plane_b_off, output_disabled, test_layer); |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1633 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1634 render_highlight(context, col, dst, debug_dst, plane_a_off, plane_b_off); |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1635 } |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1636 } else { |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1637 if (output_disabled || test_layer) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1638 render_testreg(context, col, dst, debug_dst, plane_a_off, plane_b_off, output_disabled, test_layer); |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1639 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1640 render_normal(context, col, dst, debug_dst, plane_a_off, plane_b_off); |
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
1641 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1642 } |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1643 dst += 16; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1644 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1645 dst = context->compositebuf; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1646 debug_dst = context->layer_debug_buf; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1647 uint8_t pixel = 0; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1648 if (output_disabled) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1649 pixel = 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1650 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1651 if (test_layer) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1652 switch(test_layer) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1653 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1654 case 1: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1655 memset(dst, 0, BORDER_LEFT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1656 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT); |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1657 dst += BORDER_LEFT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1658 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1659 case 2: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1660 //plane A |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1661 //TODO: Deal with Window layer |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1662 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1663 i = 0; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1664 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine + (16 - BORDER_LEFT); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1665 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK); |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1666 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1667 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1668 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK]; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1669 *debug_dst = DBG_SRC_A; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1670 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1671 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1672 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1673 case 3: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1674 //plane B |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1675 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1676 i = 0; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1677 uint8_t buf_off = context->buf_b_off - context->hscroll_b_fine + (16 - BORDER_LEFT); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1678 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK); |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1679 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1680 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1681 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK]; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1682 *debug_dst = DBG_SRC_B; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1683 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1684 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1685 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1686 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1687 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1688 memset(dst, pixel, BORDER_LEFT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1689 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT); |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1690 dst += BORDER_LEFT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1691 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1692 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1693 context->done_composite = dst; |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1694 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1695 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1696 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1697 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1698 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1699 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1700 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1701 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1702 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1703 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1704 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1705 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1706 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1707 vscroll &= 7; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1708 if (context->col_1 & 0x400) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1709 //vflip |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1710 vscroll = 7 - vscroll; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1711 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1712 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1713 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1714 pixels |= planar_to_chunky[context->fetch_tmp[1]]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1715 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1716 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1717 pixels |= planar_to_chunky[context->vdpmem[address]] << 3; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1718 pixels |= planar_to_chunky[context->vdpmem[address+1]] << 2; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1719 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1720 int i, i_inc, i_limit; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1721 if (context->col_1 & 0x200) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1722 //hflip |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1723 i = 0; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1724 i_inc = 4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1725 i_limit = 32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1726 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1727 i = 28; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1728 i_inc = -4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1729 i_limit = -4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1730 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1731 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) | (context->col_1 >> 6 & 0x40); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1732 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1733 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1734 *dst = (pixels >> i & 0xF) | pal_priority; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1735 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1736 context->buf_a_off = (context->buf_a_off + 8) & 15; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1737 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1738 uint8_t *dst = context->compositebuf + col * 8 + BORDER_LEFT; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1739 uint8_t *debug_dst = context->layer_debug_buf + col * 8 + BORDER_LEFT; |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1740 if (context->state == PREPARING) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1741 memset(dst, 0, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1742 memset(debug_dst, DBG_SRC_BG, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1743 context->done_composite = dst + 8; |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1744 return; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1745 } |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1746 |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1747 if (col || !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1748 uint8_t *sprite_src = context->linebuf + col * 8; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1749 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1750 sprite_src += 8; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1751 } |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1752 for (int i = 0; i < 8; i++, sprite_src++) |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1753 { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1754 uint8_t *bg_src = context->tmp_buf_a + ((8 + i + col * 8 - (context->hscroll_a & 0x7)) & 15); |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1755 if ((*bg_src & 0x4F) > 0x40 || !*sprite_src) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1756 //background plane has priority and is opaque or sprite layer is transparent |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1757 uint8_t pixel = *bg_src & 0x1F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1758 *(dst++) = pixel + MODE4_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1759 *(debug_dst++) = pixel ? DBG_SRC_A : DBG_SRC_BG; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1760 } else { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1761 //sprite layer is opaque and not covered by high priority BG pixels |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1762 *(dst++) = (*sprite_src | 0x10) + MODE4_OFFSET; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1763 *(debug_dst++) = DBG_SRC_S; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1764 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1765 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1766 context->done_composite = dst; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1767 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1768 memset(dst, 0, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1769 memset(dst, DBG_SRC_BG, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1770 context->done_composite = dst + 8; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1771 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1772 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1773 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1774 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19}; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1775 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1776 static void vdp_advance_line(vdp_context *context) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1777 { |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1778 #ifdef TIMING_DEBUG |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1779 static uint32_t last_line = 0xFFFFFFFF; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1780 if (last_line != 0xFFFFFFFF) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1781 uint32_t diff = context->cycles - last_line; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1782 if (diff != MCLKS_LINE) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1783 printf("Line %d took %d cycles\n", context->vcounter, diff); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1784 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1785 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1786 last_line = context->cycles; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1787 #endif |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1788 uint16_t jump_start, jump_end; |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1789 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1790 if (is_mode_5) { |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1791 if (context->flags2 & FLAG2_REGION_PAL) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1792 if (context->regs[REG_MODE_2] & BIT_PAL) { |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1793 jump_start = 0x10B; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1794 jump_end = 0x1D2; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1795 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1796 jump_start = 0x103; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1797 jump_end = 0x1CA; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1798 } |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1799 } else if (context->regs[REG_MODE_2] & BIT_PAL) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1800 jump_start = 0x100; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1801 jump_end = 0x1FA; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1802 } else { |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1803 jump_start = 0xEB; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1804 jump_end = 0x1E5; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1805 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1806 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1807 jump_start = 0xDB; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1808 jump_end = 0x1D5; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1809 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1810 |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1811 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM | 1 << VDP_DEBUG_COMPOSITE)) { |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1812 uint32_t line = context->vcounter; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1813 if (line >= jump_end) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1814 line -= jump_end - jump_start; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1815 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1816 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1817 |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1818 if (total_lines - line <= context->border_top) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1819 line -= total_lines - context->border_top; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1820 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1821 line += context->border_top; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1822 } |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1823 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1824 uint32_t *fb = context->debug_fbs[VDP_DEBUG_CRAM] + context->debug_fb_pitch[VDP_DEBUG_CRAM] * line / sizeof(uint32_t); |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1825 for (int i = 0; i < 64; i++) |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1826 { |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1827 for (int x = 0; x < 8; x++) |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1828 { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1829 *(fb++) = context->colors[i]; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1830 } |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1831 } |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1832 } |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1833 if ( |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1834 context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE) |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1835 && line < (context->inactive_start + context->border_bot + context->border_top) |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1836 ) { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1837 uint32_t *fb = context->debug_fbs[VDP_DEBUG_COMPOSITE] + context->debug_fb_pitch[VDP_DEBUG_COMPOSITE] * line / sizeof(uint32_t); |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1838 for (int i = 0; i < LINEBUF_SIZE; i++) |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1839 { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1840 *(fb++) = context->debugcolors[context->layer_debug_buf[i]]; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1841 } |
1299
da1ffc4026c4
Fix latching of V32 mode bit
Michael Pavone <pavone@retrodev.com>
parents:
1290
diff
changeset
|
1842 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1843 } |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1844 |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1845 context->vcounter++; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1846 if (context->vcounter == jump_start) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1847 context->vcounter = jump_end; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1848 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1849 context->vcounter &= 0x1FF; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1850 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1851 if (context->state == PREPARING) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1852 context->state = ACTIVE; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1853 } |
1377
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1854 if (context->vcounter == 0x1FF) { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1855 context->flags2 &= ~FLAG2_PAUSE; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1856 } |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1857 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1858 if (context->state != ACTIVE) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1859 context->hint_counter = context->regs[REG_HINT]; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1860 } else if (context->hint_counter) { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1861 context->hint_counter--; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1862 } else { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1863 context->flags2 |= FLAG2_HINT_PENDING; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1864 context->pending_hint_start = context->cycles; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1865 context->hint_counter = context->regs[REG_HINT]; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1866 } |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1867 } |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1868 |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1869 static void vdp_update_per_frame_debug(vdp_context *context) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1870 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1871 if (context->enabled_debuggers & (1 << VDP_DEBUG_PLANE)) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1872 uint32_t pitch; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1873 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_PLANE], &pitch); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1874 uint16_t hscroll_mask; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1875 uint16_t v_mul; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1876 uint16_t vscroll_mask = 0x1F | (context->regs[REG_SCROLL] & 0x30) << 1; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1877 switch(context->regs[REG_SCROLL] & 0x3) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1878 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1879 case 0: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1880 hscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1881 v_mul = 64; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1882 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1883 case 0x1: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1884 hscroll_mask = 0x3F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1885 v_mul = 128; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1886 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1887 case 0x2: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1888 //TODO: Verify this behavior |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1889 hscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1890 v_mul = 0; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1891 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1892 case 0x3: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1893 hscroll_mask = 0x7F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1894 v_mul = 256; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1895 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1896 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1897 uint16_t table_address; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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diff
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|
1898 switch(context->debug_modes[VDP_DEBUG_PLANE] % 3) |
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WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1899 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1900 case 0: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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1629
diff
changeset
|
1901 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1902 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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1629
diff
changeset
|
1903 case 1: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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1629
diff
changeset
|
1904 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1905 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1906 case 2: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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diff
changeset
|
1907 table_address = context->regs[REG_WINDOW] << 10; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1908 if (context->regs[REG_MODE_4] & BIT_H40) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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diff
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|
1909 table_address &= 0xF000; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1910 v_mul = 128; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1911 hscroll_mask = 0x3F; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1912 } else { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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diff
changeset
|
1913 table_address &= 0xF800; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1914 v_mul = 64; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1915 hscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1916 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1917 vscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1918 break; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1919 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1920 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR & 0x3F]]; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1921 for (uint16_t row = 0; row < 128; row++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1922 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1923 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1924 for (uint16_t col = 0; col < 128; col++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1925 { |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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1629
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changeset
|
1926 uint16_t address = row_address + (col & hscroll_mask) * 2; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1927 //pccv hnnn nnnn nnnn |
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|
1928 // |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1929 uint16_t entry = context->vdpmem[address] << 8 | context->vdpmem[address + 1]; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1930 uint8_t pal = entry >> 9 & 0x30; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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diff
changeset
|
1931 |
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|
1932 uint32_t *dst = fb + (row * pitch * 8 / sizeof(uint32_t)) + col * 8; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1933 address = (entry & 0x7FF) * 32; |
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|
1934 int y_diff = 4; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1935 if (entry & 0x1000) { |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1936 y_diff = -4; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1937 address += 7 * 4; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1938 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1939 int x_diff = 1; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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diff
changeset
|
1940 if (entry & 0x800) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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diff
changeset
|
1941 x_diff = -1; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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changeset
|
1942 address += 3; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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diff
changeset
|
1943 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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diff
changeset
|
1944 for (int y = 0; y < 8; y++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1945 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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diff
changeset
|
1946 uint16_t trow_address = address; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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|
1947 uint32_t *row_dst = dst; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1948 for (int x = 0; x < 4; x++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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diff
changeset
|
1949 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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diff
changeset
|
1950 uint8_t byte = context->vdpmem[trow_address]; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1951 trow_address += x_diff; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1952 uint8_t left, right; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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diff
changeset
|
1953 if (x_diff > 0) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1954 left = byte >> 4; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1955 right = byte & 0xF; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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changeset
|
1956 } else { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1957 left = byte & 0xF; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1958 right = byte >> 4; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1959 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1960 *(row_dst++) = left ? context->colors[left|pal] : bg_color; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1961 *(row_dst++) = right ? context->colors[right|pal] : bg_color; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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changeset
|
1962 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1963 address += y_diff; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1964 dst += pitch / sizeof(uint32_t); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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changeset
|
1965 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
1966 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
1967 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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parents:
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changeset
|
1968 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_PLANE], 1024); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1969 } |
1634
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1970 |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1971 if (context->enabled_debuggers & (1 << VDP_DEBUG_VRAM)) { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1972 uint32_t pitch; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1973 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_VRAM], &pitch); |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1974 |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1975 uint8_t pal = (context->debug_modes[VDP_DEBUG_VRAM] % 4) << 4; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1976 for (int y = 0; y < 512; y++) |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1977 { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1978 uint32_t *line = fb + y * pitch / sizeof(uint32_t); |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1979 int row = y >> 4; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1980 int yoff = y >> 1 & 7; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1981 for (int col = 0; col < 64; col++) |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1982 { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1983 uint16_t address = (row * 64 + col) * 32 + yoff * 4; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1984 for (int x = 0; x < 4; x++) |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1985 { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1986 uint8_t byte = context->vdpmem[address++]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1987 uint8_t left = byte >> 4 | pal; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1988 uint8_t right = byte & 0xF | pal; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1989 *(line++) = context->colors[left]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1990 *(line++) = context->colors[left]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1991 *(line++) = context->colors[right]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1992 *(line++) = context->colors[right]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1993 } |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1994 } |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1995 } |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1996 |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1997 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_VRAM], 1024); |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1998 } |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1999 |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2000 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2001 uint32_t starting_line = 512 - 32*4; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2002 uint32_t *line = context->debug_fbs[VDP_DEBUG_CRAM] |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2003 + context->debug_fb_pitch[VDP_DEBUG_CRAM] * starting_line / sizeof(uint32_t); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2004 for (int pal = 0; pal < 4; pal ++) |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2005 { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2006 uint32_t *cur; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2007 for (int y = 0; y < 31; y++) |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2008 { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2009 cur = line; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2010 for (int offset = 0; offset < 16; offset++) |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2011 { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2012 for (int x = 0; x < 31; x++) |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2013 { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2014 *(cur++) = context->colors[pal * 16 + offset]; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2015 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2016 *(cur++) = 0xFF000000; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2017 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2018 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2019 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2020 cur = line; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2021 for (int x = 0; x < 512; x++) |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2022 { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2023 *(cur++) = 0xFF000000; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2024 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2025 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2026 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2027 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_CRAM], 512); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2028 context->debug_fbs[VDP_DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_CRAM], &context->debug_fb_pitch[VDP_DEBUG_CRAM]); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2029 } |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2030 if (context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE)) { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2031 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], LINEBUF_SIZE); |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2032 context->debug_fbs[VDP_DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], &context->debug_fb_pitch[VDP_DEBUG_COMPOSITE]); |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2033 } |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
2034 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
2035 |
1629
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2036 void vdp_force_update_framebuffer(vdp_context *context) |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2037 { |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2038 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top; |
1629
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2039 |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2040 uint16_t to_fill = lines_max - context->output_lines; |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2041 memset( |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2042 ((char *)context->fb) + context->output_pitch * context->output_lines, |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2043 0, |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2044 to_fill * context->output_pitch |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2045 ); |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2046 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2047 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch); |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
2048 vdp_update_per_frame_debug(context); |
1629
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2049 } |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2050 |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2051 static void advance_output_line(vdp_context *context) |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2052 { |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2053 //This function is kind of gross because of the need to deal with vertical border busting via mode changes |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2054 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top; |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2055 uint32_t output_line = context->vcounter; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2056 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2057 //vcounter increment occurs much later in Mode 4 |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2058 output_line++; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2059 } |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2060 |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2061 if (context->output_lines == lines_max || (!context->pushed_frame && output_line == context->inactive_start + context->border_top)) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2062 //we've either filled up a full frame or we're at the bottom of screen in the current defined mode + border crop |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2063 if (!headless) { |
1436
40c3be9f1af7
Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents:
1432
diff
changeset
|
2064 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2065 uint8_t is_even = context->flags2 & FLAG2_EVEN_FIELD; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2066 if (context->vcounter <= context->inactive_start && (context->regs[REG_MODE_4] & BIT_INTERLACE)) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2067 is_even = !is_even; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2068 } |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2069 context->cur_buffer = is_even ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2070 context->pushed_frame = 1; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2071 context->fb = NULL; |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2072 } |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2073 vdp_update_per_frame_debug(context); |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2074 context->h40_lines = 0; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2075 context->frame++; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2076 context->output_lines = 0; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2077 } |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2078 |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2079 if (output_line < context->inactive_start + context->border_bot) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2080 if (context->output_lines) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2081 output_line = context->output_lines++;//context->border_top + context->vcounter; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2082 } else if (!output_line && !context->border_top) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2083 //top border is completely cropped so we won't hit the case below |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2084 output_line = 0; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2085 context->output_lines = 1; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2086 context->pushed_frame = 0; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2087 } else { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2088 context->output_lines = output_line + 1; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2089 } |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2090 } else if (output_line >= 0x200 - context->border_top) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2091 if (output_line == 0x200 - context->border_top) { |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2092 //We're at the top of the display, force context->output_lines to be zero to avoid |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2093 //potential screen rolling if the mode is changed at an inopportune time |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2094 context->output_lines = 0; |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2095 context->pushed_frame = 0; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
2096 } |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2097 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top); |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2098 } else { |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2099 context->output = NULL; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2100 return; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2101 } |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2102 if (!context->fb) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2103 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch); |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2104 } |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2105 output_line += context->top_offset; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2106 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * output_line); |
1271
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
2107 #ifdef DEBUG_FB_FILL |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2108 for (int i = 0; i < LINEBUF_SIZE; i++) |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2109 { |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2110 context->output[i] = 0xFFFF00FF; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2111 } |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2112 #endif |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2113 if (context->output && (context->regs[REG_MODE_4] & BIT_H40)) { |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2114 context->h40_lines++; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
2115 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2116 } |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2117 |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2118 void vdp_release_framebuffer(vdp_context *context) |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2119 { |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2120 if (context->fb) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2121 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2122 context->output = context->fb = NULL; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2123 } |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2124 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2125 |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2126 void vdp_reacquire_framebuffer(vdp_context *context) |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2127 { |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2128 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top; |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2129 if (context->output_lines <= lines_max && context->output_lines > 0) { |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2130 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch); |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2131 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * (context->output_lines - 1 + context->top_offset)); |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2132 } else { |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2133 context->output = NULL; |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2134 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2135 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2136 |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2137 static void render_border_garbage(vdp_context *context, uint32_t address, uint8_t *buf, uint8_t buf_off, uint16_t col) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2138 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2139 uint8_t base = col >> 9 & 0x30; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2140 for (int i = 0; i < 4; i++, address++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2141 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2142 uint8_t byte = context->vdpmem[address & 0xFFFF]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2143 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte >> 4; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2144 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte & 0xF; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2145 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2146 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2147 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2148 static void draw_right_border(vdp_context *context) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2149 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2150 uint8_t *dst = context->compositebuf + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2151 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2152 if ((context->test_port & TEST_BIT_DISABLE) != 0) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2153 pixel = 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2154 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2155 uint8_t test_layer = context->test_port >> 7 & 3; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2156 if (test_layer) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2157 switch(test_layer) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2158 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2159 case 1: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2160 memset(dst, 0, BORDER_RIGHT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2161 dst += BORDER_RIGHT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2162 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2163 case 2: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2164 //plane A |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2165 //TODO: Deal with Window layer |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2166 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2167 i = 0; |
1888
bd60e74fd173
Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents:
1887
diff
changeset
|
2168 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2169 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2170 for (; i < BORDER_RIGHT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2171 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2172 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2173 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2174 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2175 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2176 case 3: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2177 //plane B |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2178 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2179 i = 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2180 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2181 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2182 for (; i < BORDER_RIGHT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2183 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2184 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2185 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2186 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2187 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2188 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2189 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2190 memset(dst, 0, BORDER_RIGHT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2191 dst += BORDER_RIGHT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2192 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2193 context->done_composite = dst; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2194 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2195 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2196 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2197 |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2198 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; } |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
2199 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2200 #define OUTPUT_PIXEL(slot) if ((slot) >= BG_START_SLOT) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2201 uint8_t *src = context->compositebuf + ((slot) - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2202 uint32_t *dst = context->output + ((slot) - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2203 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2204 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2205 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2206 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2207 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2208 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2209 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2210 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2211 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2212 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2213 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2214 |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2215 #define OUTPUT_PIXEL_H40(slot) if (slot <= (BG_START_SLOT + LINEBUF_SIZE/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2216 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2217 uint32_t *dst = context->output + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2218 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2219 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2220 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2221 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2222 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2223 if (slot != (BG_START_SLOT + LINEBUF_SIZE/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2224 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2225 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2226 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2227 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2228 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2229 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2230 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2231 |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2232 #define OUTPUT_PIXEL_H32(slot) if (slot <= (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2233 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2234 uint32_t *dst = context->output + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2235 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2236 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2237 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2238 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2239 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2240 if (slot != (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2241 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2242 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2243 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2244 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2245 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2246 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2247 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2248 |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2249 #define COLUMN_RENDER_BLOCK(column, startcyc) \ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2250 case startcyc:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2251 OUTPUT_PIXEL(startcyc)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2252 read_map_scroll_a(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2253 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2254 case ((startcyc+1)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2255 OUTPUT_PIXEL((startcyc+1)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2256 external_slot(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2257 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2258 case ((startcyc+2)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2259 OUTPUT_PIXEL((startcyc+2)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2260 render_map_1(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2261 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2262 case ((startcyc+3)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2263 OUTPUT_PIXEL((startcyc+3)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2264 render_map_2(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2265 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2266 case ((startcyc+4)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2267 OUTPUT_PIXEL((startcyc+4)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2268 read_map_scroll_b(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2269 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2270 case ((startcyc+5)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2271 OUTPUT_PIXEL((startcyc+5)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2272 read_sprite_x(context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2273 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2274 case ((startcyc+6)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2275 OUTPUT_PIXEL((startcyc+6)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2276 render_map_3(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2277 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2278 case ((startcyc+7)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2279 OUTPUT_PIXEL((startcyc+7)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2280 render_map_output(context->vcounter, column, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2281 CHECK_LIMIT |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2282 |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2283 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2284 case startcyc:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2285 OUTPUT_PIXEL(startcyc)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2286 read_map_scroll_a(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2287 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2288 case (startcyc+1):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2289 /* refresh, so don't run dma src */\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2290 OUTPUT_PIXEL((startcyc+1)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2291 context->hslot++;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2292 context->cycles += slot_cycles;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2293 CHECK_ONLY\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2294 case (startcyc+2):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2295 OUTPUT_PIXEL((startcyc+2)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2296 render_map_1(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2297 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2298 case (startcyc+3):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2299 OUTPUT_PIXEL((startcyc+3)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2300 render_map_2(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2301 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2302 case (startcyc+4):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2303 OUTPUT_PIXEL((startcyc+4)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2304 read_map_scroll_b(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2305 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2306 case (startcyc+5):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2307 OUTPUT_PIXEL((startcyc+5)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2308 read_sprite_x(context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2309 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2310 case (startcyc+6):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2311 OUTPUT_PIXEL((startcyc+6)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2312 render_map_3(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2313 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2314 case (startcyc+7):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2315 OUTPUT_PIXEL((startcyc+7)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2316 render_map_output(context->vcounter, column, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2317 CHECK_LIMIT |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2318 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2319 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2320 case startcyc:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2321 OUTPUT_PIXEL(startcyc)\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2322 read_map_mode4(column, context->vcounter, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2323 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2324 case ((startcyc+1)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2325 OUTPUT_PIXEL((startcyc+1)&0xFF)\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2326 if (column & 3) {\ |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2327 scan_sprite_table_mode4(context);\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2328 } else {\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2329 external_slot(context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2330 }\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2331 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2332 case ((startcyc+2)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2333 OUTPUT_PIXEL((startcyc+2)&0xFF)\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2334 fetch_map_mode4(column, context->vcounter, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2335 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2336 case ((startcyc+3)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2337 OUTPUT_PIXEL((startcyc+3)&0xFF)\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2338 render_map_mode4(context->vcounter, column, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2339 CHECK_LIMIT |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2340 |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2341 #define CHECK_LIMIT_HSYNC(slot) \ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2342 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2343 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2344 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2345 } else {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2346 context->cycles += slot_cycles;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2347 }\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2348 if (slot == 182) {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2349 context->hslot = 229;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2350 } else {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2351 context->hslot++;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2352 }\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2353 CHECK_ONLY |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
822
diff
changeset
|
2354 |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2355 #define SPRITE_RENDER_H40(slot) \ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2356 case slot:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2357 OUTPUT_PIXEL_H40(slot)\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2358 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2359 advance_output_line(context);\ |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2360 if (!context->output) {\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2361 context->output = dummy_buffer;\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2362 }\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2363 }\ |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2364 if (slot == 168 || slot == 247 || slot == 248) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2365 render_border_garbage(\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2366 context,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2367 context->sprite_draw_list[context->cur_slot].address,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2368 context->tmp_buf_b,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2369 context->buf_b_off + (slot == 247 ? 0 : 8),\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2370 slot == 247 ? context->col_1 : context->col_2\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2371 );\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2372 if (slot == 248) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2373 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2374 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2375 }\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2376 } else if (slot == 243) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2377 render_border_garbage(\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2378 context,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2379 context->sprite_draw_list[context->cur_slot].address,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2380 context->tmp_buf_a,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2381 context->buf_a_off,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2382 context->col_1\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2383 );\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2384 } else if (slot == 169) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2385 draw_right_border(context);\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2386 }\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2387 render_sprite_cells( context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2388 scan_sprite_table(context->vcounter, context);\ |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2389 CHECK_LIMIT_HSYNC(slot) |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
822
diff
changeset
|
2390 |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2391 //Note that the line advancement check will fail if BG_START_SLOT is > 6 |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2392 //as we're bumping up against the hcounter jump |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2393 #define SPRITE_RENDER_H32(slot) \ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2394 case slot:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2395 OUTPUT_PIXEL_H32(slot)\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2396 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2397 advance_output_line(context);\ |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2398 if (!context->output) {\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2399 context->output = dummy_buffer;\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2400 }\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2401 }\ |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2402 if (slot == 136 || slot == 247 || slot == 248) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2403 render_border_garbage(\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2404 context,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2405 context->sprite_draw_list[context->cur_slot].address,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2406 context->tmp_buf_b,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2407 context->buf_b_off + (slot == 247 ? 0 : 8),\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2408 slot == 247 ? context->col_1 : context->col_2\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2409 );\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2410 if (slot == 248) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2411 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2412 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2413 }\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2414 } else if (slot == 137) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2415 draw_right_border(context);\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2416 }\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2417 render_sprite_cells( context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2418 scan_sprite_table(context->vcounter, context);\ |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
2419 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2420 if (slot == 147) {\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2421 context->hslot = 233;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2422 } else {\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2423 context->hslot++;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2424 }\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2425 context->cycles += slot_cycles;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2426 CHECK_ONLY |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2427 |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2428 #define MODE4_CHECK_SLOT_LINE(slot) \ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2429 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2430 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2431 advance_output_line(context);\ |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2432 if (!context->output) {\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2433 context->output = dummy_buffer;\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2434 }\ |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2435 }\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2436 if ((slot) == 147) {\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2437 context->hslot = 233;\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2438 } else {\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2439 context->hslot++;\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2440 }\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2441 context->cycles += slot_cycles;\ |
1163
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2442 if ((slot+1) == LINE_CHANGE_MODE4) {\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2443 vdp_advance_line(context);\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2444 if (context->vcounter == 192) {\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2445 return;\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2446 }\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2447 }\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2448 CHECK_ONLY |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2449 |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2450 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment)) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2451 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2452 #define SPRITE_RENDER_H32_MODE4(slot) \ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2453 case slot:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2454 OUTPUT_PIXEL_H32(slot)\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2455 read_sprite_x_mode4(context);\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2456 MODE4_CHECK_SLOT_LINE(slot)\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2457 case CALC_SLOT(slot, 1):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2458 OUTPUT_PIXEL(CALC_SLOT(slot, 1))\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2459 read_sprite_x_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2460 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2461 case CALC_SLOT(slot, 2):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2462 OUTPUT_PIXEL(CALC_SLOT(slot, 2))\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2463 fetch_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2464 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2465 case CALC_SLOT(slot, 3):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2466 OUTPUT_PIXEL(CALC_SLOT(slot, 3))\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2467 render_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2468 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2469 case CALC_SLOT(slot, 4):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2470 OUTPUT_PIXEL(CALC_SLOT(slot, 4))\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2471 fetch_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2472 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2473 case CALC_SLOT(slot, 5):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2474 OUTPUT_PIXEL(CALC_SLOT(slot, 5))\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2475 render_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2476 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5)) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2477 |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2478 static uint32_t dummy_buffer[LINEBUF_SIZE]; |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2479 static void vdp_h40_line(vdp_context * context) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2480 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2481 uint16_t address; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2482 uint32_t mask; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2483 uint32_t const slot_cycles = MCLKS_SLOT_H40; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2484 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2485 uint8_t test_layer = context->test_port >> 7 & 3; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2486 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2487 //165 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2488 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2489 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2490 //See note in vdp_h32 for why this was originally moved out of read_map_scroll |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2491 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2492 //pretty consistently |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2493 context->vscroll_latch[0] = context->vsram[0]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2494 context->vscroll_latch[1] = context->vsram[1]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2495 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2496 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2497 //166 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2498 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2499 //167 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2500 context->sprite_index = 0x80; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2501 context->slot_counter = 0; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2502 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2503 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2504 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2505 context->tmp_buf_b, context->buf_b_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2506 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2507 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2508 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2509 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2510 //168 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2511 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2512 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2513 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2514 context->tmp_buf_b, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2515 context->buf_b_off + 8, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2516 context->col_2 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2517 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2518 //Do palette lookup for end of previous line |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2519 uint8_t *src = context->compositebuf + (LINE_CHANGE_H40 - BG_START_SLOT) *2; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2520 uint32_t *dst = context->output + (LINE_CHANGE_H40 - BG_START_SLOT) *2; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2521 if (test_layer) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2522 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2523 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2524 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2525 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2526 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2527 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2528 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2529 if (*src & 0x3F) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2530 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2531 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2532 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2533 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2534 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2535 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2536 advance_output_line(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2537 //168-242 (inclusive) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2538 for (int i = 0; i < 28; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2539 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2540 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2541 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2542 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2543 //243 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2544 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2545 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2546 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2547 context->tmp_buf_a, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2548 context->buf_a_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2549 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2550 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2551 //244 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2552 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2553 mask = 0; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2554 if (context->regs[REG_MODE_3] & 0x2) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2555 mask |= 0xF8; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2556 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2557 if (context->regs[REG_MODE_3] & 0x1) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2558 mask |= 0x7; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2559 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2560 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2561 address += (context->vcounter & mask) * 4; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2562 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2563 context->hscroll_a_fine = context->hscroll_a & 0xF; |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2564 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2565 context->hscroll_b_fine = context->hscroll_b & 0xF; |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2566 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2567 //243-246 inclusive |
1877
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2568 for (int i = 0; i < 3; i++) |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2569 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2570 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2571 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2572 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2573 //247 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2574 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2575 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2576 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2577 context->tmp_buf_b, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2578 context->buf_b_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2579 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2580 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2581 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2582 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2583 //248 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2584 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2585 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2586 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2587 context->tmp_buf_b, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2588 context->buf_b_off + 8, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2589 context->col_2 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2590 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2591 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2592 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2593 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2594 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2595 //250 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2596 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2597 scan_sprite_table(context->vcounter, context); |
1877
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2598 //251 |
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2599 scan_sprite_table(context->vcounter, context);//Just a guess |
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2600 //252 |
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2601 scan_sprite_table(context->vcounter, context);//Just a guess |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2602 //254 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2603 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2604 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2605 //255 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2606 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2607 context->flags |= FLAG_DOT_OFLOW; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2608 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2609 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2610 //0 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2611 scan_sprite_table(context->vcounter, context);//Just a guess |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2612 //seems like the sprite table scan fills a shift register |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2613 //values are FIFO, but unused slots precede used slots |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2614 //so we set cur_slot to slot_counter and let it wrap around to |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2615 //the beginning of the list |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2616 context->cur_slot = context->slot_counter; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2617 context->sprite_x_offset = 0; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2618 context->sprite_draws = MAX_SPRITES_LINE; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2619 //background planes and layer compositing |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2620 for (int col = 0; col < 42; col+=2) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2621 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2622 read_map_scroll_a(col, context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2623 render_map_1(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2624 render_map_2(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2625 read_map_scroll_b(col, context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2626 render_map_3(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2627 render_map_output(context->vcounter, col, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2628 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2629 //sprite rendering phase 2 |
1877
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2630 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2631 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2632 read_sprite_x(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2633 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2634 //163 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2635 context->cur_slot = MAX_SPRITES_LINE-1; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2636 memset(context->linebuf, 0, LINEBUF_SIZE); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2637 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2638 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2639 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2640 context->tmp_buf_a, context->buf_a_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2641 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2642 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2643 context->flags &= ~FLAG_MASKED; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2644 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2645 //164 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2646 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2647 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2648 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2649 context->tmp_buf_a, context->buf_a_off + 8, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2650 context->col_2 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2651 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2652 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2653 context->cycles += MCLKS_LINE; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2654 vdp_advance_line(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2655 src = context->compositebuf; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2656 dst = context->output; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2657 if (test_layer) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2658 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2659 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2660 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2661 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2662 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2663 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2664 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2665 if (*src & 0x3F) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2666 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2667 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2668 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2669 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2670 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2671 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2672 } |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
2673 static void vdp_h40(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2674 { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2675 uint16_t address; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2676 uint32_t mask; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2677 uint32_t const slot_cycles = MCLKS_SLOT_H40; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2678 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2679 uint8_t test_layer = context->test_port >> 7 & 3; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2680 if (!context->output) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2681 //This shouldn't happen normally, but it can theoretically |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2682 //happen when doing border busting |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2683 context->output = dummy_buffer; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2684 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2685 switch(context->hslot) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2686 { |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2687 for (;;) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2688 { |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2689 case 165: |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2690 //only consider doing a line at a time if the FIFO is empty, there are no pending reads and there is no DMA running |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2691 if (context->fifo_read == -1 && !(context->flags & FLAG_DMA_RUN) && ((context->cd & 1) || (context->flags & (FLAG_READ_FETCHED|FLAG_PENDING)))) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2692 while (target_cycles - context->cycles >= MCLKS_LINE && context->state != PREPARING && context->vcounter != context->inactive_start) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2693 vdp_h40_line(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2694 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2695 CHECK_ONLY |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2696 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2697 OUTPUT_PIXEL(165) |
1432
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2698 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2699 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2700 //See note in vdp_h32 for why this was originally moved out of read_map_scroll |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2701 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232 |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2702 //pretty consistently |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2703 context->vscroll_latch[0] = context->vsram[0]; |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2704 context->vscroll_latch[1] = context->vsram[1]; |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2705 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2706 if (context->state == PREPARING) { |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2707 external_slot(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2708 } else { |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2709 render_sprite_cells(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2710 } |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2711 CHECK_LIMIT |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2712 case 166: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2713 OUTPUT_PIXEL(166) |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2714 if (context->state == PREPARING) { |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2715 external_slot(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2716 } else { |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2717 render_sprite_cells(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2718 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2719 if (context->vcounter == context->inactive_start) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2720 context->hslot++; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2721 context->cycles += slot_cycles; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2722 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2723 } |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2724 CHECK_LIMIT |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2725 //sprite attribute table scan starts |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2726 case 167: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2727 OUTPUT_PIXEL(167) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2728 context->sprite_index = 0x80; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2729 context->slot_counter = 0; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2730 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2731 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2732 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2733 context->tmp_buf_b, context->buf_b_off, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2734 context->col_1 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2735 ); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2736 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2737 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2738 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2739 SPRITE_RENDER_H40(168) |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2740 SPRITE_RENDER_H40(169) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2741 SPRITE_RENDER_H40(170) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2742 SPRITE_RENDER_H40(171) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2743 SPRITE_RENDER_H40(172) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2744 SPRITE_RENDER_H40(173) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2745 SPRITE_RENDER_H40(174) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2746 SPRITE_RENDER_H40(175) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2747 SPRITE_RENDER_H40(176) |
1365
6dd2c3edd0b5
Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2
Michael Pavone <pavone@retrodev.com>
parents:
1362
diff
changeset
|
2748 SPRITE_RENDER_H40(177)//End of border? |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2749 SPRITE_RENDER_H40(178) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2750 SPRITE_RENDER_H40(179) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2751 SPRITE_RENDER_H40(180) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2752 SPRITE_RENDER_H40(181) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2753 SPRITE_RENDER_H40(182) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2754 SPRITE_RENDER_H40(229) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2755 //!HSYNC asserted |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2756 SPRITE_RENDER_H40(230) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2757 SPRITE_RENDER_H40(231) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2758 case 232: |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2759 external_slot(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2760 CHECK_LIMIT_HSYNC(232) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2761 SPRITE_RENDER_H40(233) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2762 SPRITE_RENDER_H40(234) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2763 SPRITE_RENDER_H40(235) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2764 SPRITE_RENDER_H40(236) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2765 SPRITE_RENDER_H40(237) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2766 SPRITE_RENDER_H40(238) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2767 SPRITE_RENDER_H40(239) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2768 SPRITE_RENDER_H40(240) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2769 SPRITE_RENDER_H40(241) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2770 SPRITE_RENDER_H40(242) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2771 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2772 case 244: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2773 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2774 mask = 0; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2775 if (context->regs[REG_MODE_3] & 0x2) { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2776 mask |= 0xF8; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2777 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2778 if (context->regs[REG_MODE_3] & 0x1) { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2779 mask |= 0x7; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2780 } |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2781 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2782 address += (context->vcounter & mask) * 4; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2783 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2784 context->hscroll_a_fine = context->hscroll_a & 0xF; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2785 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2786 context->hscroll_b_fine = context->hscroll_b & 0xF; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2787 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
2788 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2789 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2790 context->cycles += h40_hsync_cycles[14]; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2791 CHECK_ONLY //provides "garbage" for border when plane A selected |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2792 //!HSYNC high |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2793 SPRITE_RENDER_H40(245) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2794 SPRITE_RENDER_H40(246) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2795 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2796 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2797 case 249: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2798 read_map_scroll_a(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2799 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2800 SPRITE_RENDER_H40(250) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2801 case 251: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2802 render_map_1(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2803 scan_sprite_table(context->vcounter, context);//Just a guess |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2804 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2805 case 252: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2806 render_map_2(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2807 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2808 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2809 case 253: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2810 read_map_scroll_b(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2811 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2812 SPRITE_RENDER_H40(254) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2813 case 255: |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2814 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2815 context->flags |= FLAG_DOT_OFLOW; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2816 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2817 render_map_3(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2818 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2819 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2820 case 0: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2821 render_map_output(context->vcounter, 0, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2822 scan_sprite_table(context->vcounter, context);//Just a guess |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2823 //seems like the sprite table scan fills a shift register |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2824 //values are FIFO, but unused slots precede used slots |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2825 //so we set cur_slot to slot_counter and let it wrap around to |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2826 //the beginning of the list |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2827 context->cur_slot = context->slot_counter; |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
2828 context->sprite_x_offset = 0; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2829 context->sprite_draws = MAX_SPRITES_LINE; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2830 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2831 COLUMN_RENDER_BLOCK(2, 1) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2832 COLUMN_RENDER_BLOCK(4, 9) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2833 COLUMN_RENDER_BLOCK(6, 17) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2834 COLUMN_RENDER_BLOCK_REFRESH(8, 25) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2835 COLUMN_RENDER_BLOCK(10, 33) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2836 COLUMN_RENDER_BLOCK(12, 41) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2837 COLUMN_RENDER_BLOCK(14, 49) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2838 COLUMN_RENDER_BLOCK_REFRESH(16, 57) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2839 COLUMN_RENDER_BLOCK(18, 65) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2840 COLUMN_RENDER_BLOCK(20, 73) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2841 COLUMN_RENDER_BLOCK(22, 81) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2842 COLUMN_RENDER_BLOCK_REFRESH(24, 89) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2843 COLUMN_RENDER_BLOCK(26, 97) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2844 COLUMN_RENDER_BLOCK(28, 105) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2845 COLUMN_RENDER_BLOCK(30, 113) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2846 COLUMN_RENDER_BLOCK_REFRESH(32, 121) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2847 COLUMN_RENDER_BLOCK(34, 129) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2848 COLUMN_RENDER_BLOCK(36, 137) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2849 COLUMN_RENDER_BLOCK(38, 145) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2850 COLUMN_RENDER_BLOCK_REFRESH(40, 153) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2851 case 161: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2852 OUTPUT_PIXEL(161) |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2853 external_slot(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2854 CHECK_LIMIT |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2855 case 162: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2856 OUTPUT_PIXEL(162) |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2857 external_slot(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2858 CHECK_LIMIT |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2859 //sprite render to line buffer starts |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2860 case 163: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2861 OUTPUT_PIXEL(163) |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2862 context->cur_slot = MAX_SPRITES_LINE-1; |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2863 memset(context->linebuf, 0, LINEBUF_SIZE); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2864 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2865 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2866 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2867 context->tmp_buf_a, context->buf_a_off, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2868 context->col_1 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2869 ); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2870 context->flags &= ~FLAG_MASKED; |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2871 render_sprite_cells(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2872 CHECK_LIMIT |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2873 case 164: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2874 OUTPUT_PIXEL(164) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2875 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2876 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2877 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2878 context->tmp_buf_a, context->buf_a_off + 8, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2879 context->col_2 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2880 ); |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2881 render_sprite_cells(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2882 if (context->flags & FLAG_DMA_RUN) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2883 run_dma_src(context, -1); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2884 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2885 context->hslot++; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2886 context->cycles += slot_cycles; |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2887 vdp_advance_line(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2888 CHECK_ONLY |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2889 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2890 default: |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2891 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2892 context->cycles += slot_cycles; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2893 return; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2894 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2895 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2896 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
2897 static void vdp_h32(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2898 { |
37 | 2899 uint16_t address; |
2900 uint32_t mask; | |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2901 uint32_t const slot_cycles = MCLKS_SLOT_H32; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2902 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2903 uint8_t test_layer = context->test_port >> 7 & 3; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2904 if (!context->output) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2905 //This shouldn't happen normally, but it can theoretically |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2906 //happen when doing border busting |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2907 context->output = dummy_buffer; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2908 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2909 switch(context->hslot) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2910 { |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2911 for (;;) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2912 { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2913 case 133: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2914 OUTPUT_PIXEL(133) |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2915 if (context->state == PREPARING) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2916 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2917 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2918 render_sprite_cells(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2919 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2920 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2921 case 134: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2922 OUTPUT_PIXEL(134) |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2923 if (context->state == PREPARING) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2924 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2925 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2926 render_sprite_cells(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2927 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2928 if (context->vcounter == context->inactive_start) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2929 context->hslot++; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2930 context->cycles += slot_cycles; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2931 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2932 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2933 CHECK_LIMIT |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2934 //sprite attribute table scan starts |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2935 case 135: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2936 OUTPUT_PIXEL(135) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2937 context->sprite_index = 0x80; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2938 context->slot_counter = 0; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2939 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2940 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2941 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2942 context->tmp_buf_b, context->buf_b_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2943 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2944 ); |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2945 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2946 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2947 CHECK_LIMIT |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2948 SPRITE_RENDER_H32(136) |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2949 SPRITE_RENDER_H32(137) |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2950 SPRITE_RENDER_H32(138) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2951 SPRITE_RENDER_H32(139) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2952 SPRITE_RENDER_H32(140) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2953 SPRITE_RENDER_H32(141) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2954 SPRITE_RENDER_H32(142) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2955 SPRITE_RENDER_H32(143) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2956 SPRITE_RENDER_H32(144) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2957 case 145: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2958 OUTPUT_PIXEL(145) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2959 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2960 CHECK_LIMIT |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2961 SPRITE_RENDER_H32(146) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2962 SPRITE_RENDER_H32(147) |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2963 SPRITE_RENDER_H32(233) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2964 SPRITE_RENDER_H32(234) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2965 SPRITE_RENDER_H32(235) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2966 //HSYNC start |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2967 SPRITE_RENDER_H32(236) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2968 SPRITE_RENDER_H32(237) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2969 SPRITE_RENDER_H32(238) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2970 SPRITE_RENDER_H32(239) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2971 SPRITE_RENDER_H32(240) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2972 SPRITE_RENDER_H32(241) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2973 SPRITE_RENDER_H32(242) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2974 case 243: |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2975 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2976 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2977 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2978 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2979 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2980 //to confirm that one way or another |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2981 context->vscroll_latch[0] = context->vsram[0]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2982 context->vscroll_latch[1] = context->vsram[1]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2983 } |
37 | 2984 external_slot(context); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2985 //provides "garbage" for border when plane A selected |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2986 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2987 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2988 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2989 context->tmp_buf_a, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2990 context->buf_a_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2991 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2992 ); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2993 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2994 case 244: |
37 | 2995 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
2996 mask = 0; | |
2997 if (context->regs[REG_MODE_3] & 0x2) { | |
2998 mask |= 0xF8; | |
2999 } | |
3000 if (context->regs[REG_MODE_3] & 0x1) { | |
3001 mask |= 0x7; | |
3002 } | |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3003 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3004 address += (context->vcounter & mask) * 4; |
37 | 3005 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
3006 context->hscroll_a_fine = context->hscroll_a & 0xF; |
37 | 3007 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
1888
bd60e74fd173
Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents:
1887
diff
changeset
|
3008 context->hscroll_b_fine = context->hscroll_b & 0xF; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3009 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3010 CHECK_LIMIT //provides "garbage" for border when plane A selected |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3011 SPRITE_RENDER_H32(245) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3012 SPRITE_RENDER_H32(246) |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3013 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3014 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected |
37 | 3015 //!HSYNC high |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3016 case 249: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3017 read_map_scroll_a(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3018 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3019 SPRITE_RENDER_H32(250) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3020 case 251: |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3021 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3022 context->flags |= FLAG_DOT_OFLOW; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3023 } |
37 | 3024 render_map_1(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3025 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3026 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3027 case 252: |
37 | 3028 render_map_2(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3029 scan_sprite_table(context->vcounter, context);//Just a guess |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3030 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3031 case 253: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3032 read_map_scroll_b(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3033 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3034 case 254: |
37 | 3035 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3036 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3037 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3038 case 255: |
37 | 3039 render_map_3(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3040 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3041 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3042 case 0: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3043 render_map_output(context->vcounter, 0, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3044 scan_sprite_table(context->vcounter, context);//Just a guess |
37 | 3045 //reverse context slot counter so it counts the number of sprite slots |
3046 //filled rather than the number of available slots | |
3047 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; | |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3048 context->cur_slot = context->slot_counter; |
1873
041a381b9f0d
Fix regression in sprite rendering in H32 mode
Michael Pavone <pavone@retrodev.com>
parents:
1871
diff
changeset
|
3049 context->sprite_x_offset = 0; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3050 context->sprite_draws = MAX_SPRITES_LINE_H32; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3051 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3052 COLUMN_RENDER_BLOCK(2, 1) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3053 COLUMN_RENDER_BLOCK(4, 9) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3054 COLUMN_RENDER_BLOCK(6, 17) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3055 COLUMN_RENDER_BLOCK_REFRESH(8, 25) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3056 COLUMN_RENDER_BLOCK(10, 33) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3057 COLUMN_RENDER_BLOCK(12, 41) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3058 COLUMN_RENDER_BLOCK(14, 49) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3059 COLUMN_RENDER_BLOCK_REFRESH(16, 57) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3060 COLUMN_RENDER_BLOCK(18, 65) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3061 COLUMN_RENDER_BLOCK(20, 73) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3062 COLUMN_RENDER_BLOCK(22, 81) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3063 COLUMN_RENDER_BLOCK_REFRESH(24, 89) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3064 COLUMN_RENDER_BLOCK(26, 97) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3065 COLUMN_RENDER_BLOCK(28, 105) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3066 COLUMN_RENDER_BLOCK(30, 113) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3067 COLUMN_RENDER_BLOCK_REFRESH(32, 121) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3068 case 129: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3069 OUTPUT_PIXEL(129) |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3070 external_slot(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3071 CHECK_LIMIT |
1269
ff8e29eeb1ec
Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1267
diff
changeset
|
3072 case 130: { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3073 OUTPUT_PIXEL(130) |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3074 external_slot(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3075 CHECK_LIMIT |
1269
ff8e29eeb1ec
Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1267
diff
changeset
|
3076 } |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3077 //sprite render to line buffer starts |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3078 case 131: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3079 OUTPUT_PIXEL(131) |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3080 context->cur_slot = MAX_SPRITES_LINE_H32-1; |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3081 memset(context->linebuf, 0, LINEBUF_SIZE); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3082 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3083 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3084 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3085 context->tmp_buf_a, context->buf_a_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3086 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3087 ); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3088 context->flags &= ~FLAG_MASKED; |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3089 render_sprite_cells(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3090 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3091 case 132: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3092 OUTPUT_PIXEL(132) |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3093 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3094 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3095 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3096 context->tmp_buf_a, context->buf_a_off + 8, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3097 context->col_2 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3098 ); |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3099 render_sprite_cells(context); |
1173
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3100 if (context->flags & FLAG_DMA_RUN) { |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3101 run_dma_src(context, -1); |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3102 } |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3103 context->hslot++; |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3104 context->cycles += slot_cycles; |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3105 vdp_advance_line(context); |
1173
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3106 CHECK_ONLY |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3107 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3108 default: |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3109 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3110 context->cycles += MCLKS_SLOT_H32; |
503
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
3111 } |
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
3112 } |
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
3113 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3114 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3115 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3116 uint16_t address; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3117 uint32_t mask; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3118 uint32_t const slot_cycles = MCLKS_SLOT_H32; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3119 uint8_t bgindex = 0x10 | (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3120 uint8_t test_layer = context->test_port >> 7 & 3; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3121 if (!context->output) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3122 //This shouldn't happen normally, but it can theoretically |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3123 //happen when doing border busting |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3124 context->output = dummy_buffer; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3125 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3126 switch(context->hslot) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3127 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3128 for (;;) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3129 { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3130 //sprite rendering starts |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3131 SPRITE_RENDER_H32_MODE4(137) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3132 SPRITE_RENDER_H32_MODE4(143) |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3133 case 234: |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3134 external_slot(context); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3135 CHECK_LIMIT |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3136 case 235: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3137 external_slot(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3138 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3139 //!HSYNC low |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3140 case 236: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3141 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3142 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3143 case 237: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3144 external_slot(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3145 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3146 case 238: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3147 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3148 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3149 SPRITE_RENDER_H32_MODE4(239) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3150 SPRITE_RENDER_H32_MODE4(245) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3151 case 251: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3152 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3153 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3154 case 252: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3155 external_slot(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3156 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3157 context->hscroll_a = 0; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3158 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3159 context->hscroll_a = context->regs[REG_X_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3160 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3161 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3162 case 253: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3163 context->sprite_index = 0; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3164 context->slot_counter = MAX_DRAWS_H32_MODE4; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3165 scan_sprite_table_mode4(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3166 CHECK_LIMIT |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3167 case 254: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3168 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3169 CHECK_LIMIT |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3170 case 255: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3171 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3172 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3173 case 0: { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3174 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3175 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3176 } |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3177 case 1: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3178 scan_sprite_table_mode4(context); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3179 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3180 case 2: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3181 scan_sprite_table_mode4(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3182 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3183 case 3: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3184 scan_sprite_table_mode4(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3185 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3186 case 4: { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3187 scan_sprite_table_mode4(context); |
1121
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
3188 context->buf_a_off = 8; |
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
3189 memset(context->tmp_buf_a, 0, 8); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3190 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3191 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3192 COLUMN_RENDER_BLOCK_MODE4(0, 5) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3193 COLUMN_RENDER_BLOCK_MODE4(1, 9) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3194 COLUMN_RENDER_BLOCK_MODE4(2, 13) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3195 COLUMN_RENDER_BLOCK_MODE4(3, 17) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3196 COLUMN_RENDER_BLOCK_MODE4(4, 21) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3197 COLUMN_RENDER_BLOCK_MODE4(5, 25) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3198 COLUMN_RENDER_BLOCK_MODE4(6, 29) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3199 COLUMN_RENDER_BLOCK_MODE4(7, 33) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3200 COLUMN_RENDER_BLOCK_MODE4(8, 37) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3201 COLUMN_RENDER_BLOCK_MODE4(9, 41) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3202 COLUMN_RENDER_BLOCK_MODE4(10, 45) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3203 COLUMN_RENDER_BLOCK_MODE4(11, 49) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3204 COLUMN_RENDER_BLOCK_MODE4(12, 53) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3205 COLUMN_RENDER_BLOCK_MODE4(13, 57) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3206 COLUMN_RENDER_BLOCK_MODE4(14, 61) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3207 COLUMN_RENDER_BLOCK_MODE4(15, 65) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3208 COLUMN_RENDER_BLOCK_MODE4(16, 69) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3209 COLUMN_RENDER_BLOCK_MODE4(17, 73) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3210 COLUMN_RENDER_BLOCK_MODE4(18, 77) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3211 COLUMN_RENDER_BLOCK_MODE4(19, 81) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3212 COLUMN_RENDER_BLOCK_MODE4(20, 85) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3213 COLUMN_RENDER_BLOCK_MODE4(21, 89) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3214 COLUMN_RENDER_BLOCK_MODE4(22, 93) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3215 COLUMN_RENDER_BLOCK_MODE4(23, 97) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3216 COLUMN_RENDER_BLOCK_MODE4(24, 101) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3217 COLUMN_RENDER_BLOCK_MODE4(25, 105) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3218 COLUMN_RENDER_BLOCK_MODE4(26, 109) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3219 COLUMN_RENDER_BLOCK_MODE4(27, 113) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3220 COLUMN_RENDER_BLOCK_MODE4(28, 117) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3221 COLUMN_RENDER_BLOCK_MODE4(29, 121) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3222 COLUMN_RENDER_BLOCK_MODE4(30, 125) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3223 COLUMN_RENDER_BLOCK_MODE4(31, 129) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3224 case 133: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3225 OUTPUT_PIXEL(133) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3226 external_slot(context); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3227 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3228 case 134: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3229 OUTPUT_PIXEL(134) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3230 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3231 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3232 case 135: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3233 OUTPUT_PIXEL(135) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3234 external_slot(context); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3235 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3236 case 136: { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3237 OUTPUT_PIXEL(136) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3238 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3239 //set things up for sprite rendering in the next slot |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3240 memset(context->linebuf, 0, LINEBUF_SIZE); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3241 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3242 context->sprite_draws = MAX_DRAWS_H32_MODE4; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3243 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3244 }} |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3245 default: |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3246 context->hslot++; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3247 context->cycles += MCLKS_SLOT_H32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3248 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3249 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3250 |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3251 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer) |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3252 { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3253 uint8_t max_slot = is_h40 ? 169 : 136; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3254 if (context->hslot > max_slot) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3255 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3256 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3257 uint8_t *dst = context->compositebuf + (context->hslot >> 3) * SCROLL_BUFFER_DRAW; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3258 int32_t len; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3259 uint32_t src_off; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3260 if (context->hslot) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3261 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3262 src_off = 0; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3263 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3264 } else { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3265 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3266 len = BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3267 } |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3268 uint8_t *src = NULL; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3269 if (test_layer == 2) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3270 //plane A |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3271 src_off += context->buf_a_off - (context->hscroll_a & 0xF); |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3272 src = context->tmp_buf_a; |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
3273 } else if (test_layer == 3){ |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3274 //plane B |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3275 src_off += context->buf_b_off - (context->hscroll_b & 0xF); |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3276 src = context->tmp_buf_b; |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
3277 } else { |
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
3278 //sprite layer |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3279 memset(dst, 0, len); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3280 dst += len; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3281 len = 0; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3282 } |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3283 if (src) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3284 for (; len >=0; len--, dst++, src_off++) |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3285 { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3286 *dst = src[src_off & SCROLL_BUFFER_MASK] & 0x3F; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3287 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3288 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3289 context->done_composite = dst; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3290 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3291 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3292 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3293 |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3294 static void check_switch_inactive(vdp_context *context, uint8_t is_h40) |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3295 { |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3296 //technically the second hcounter check should be different for H40, but this is probably close enough for now |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3297 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) || context->hslot < 133)) { |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3298 context->state = INACTIVE; |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3299 } |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3300 } |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3301 |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3302 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3303 { |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3304 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3305 uint8_t index_reset_value, max_draws, max_sprites; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3306 uint16_t vint_line, active_line; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3307 uint32_t bg_color; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3308 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3309 if (mode_5) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3310 if (is_h40) { |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3311 latch_slot = 165; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3312 buf_clear_slot = 163; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3313 index_reset_slot = 167; |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3314 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3315 max_draws = MAX_SPRITES_LINE-1; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3316 max_sprites = MAX_SPRITES_LINE; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3317 index_reset_value = 0x80; |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3318 vint_slot = VINT_SLOT_H40; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3319 line_change = LINE_CHANGE_H40; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3320 jump_start = 182; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3321 jump_dest = 229; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3322 } else { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3323 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3324 max_draws = MAX_SPRITES_LINE_H32-1; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3325 max_sprites = MAX_SPRITES_LINE_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3326 buf_clear_slot = 128; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3327 index_reset_slot = 132; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3328 index_reset_value = 0x80; |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3329 vint_slot = VINT_SLOT_H32; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3330 line_change = LINE_CHANGE_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3331 jump_start = 147; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3332 jump_dest = 233; |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3333 latch_slot = 243; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3334 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3335 vint_line = context->inactive_start; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3336 active_line = 0x1FF; |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3337 if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3338 latch_slot = 220; |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3339 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3340 } else { |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3341 latch_slot = 220; |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3342 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3343 max_draws = MAX_DRAWS_H32_MODE4; |
1278
34d3cb05014d
Fix VDP buffer overrun that was causing sprite flickering in some games
Michael Pavone <pavone@retrodev.com>
parents:
1273
diff
changeset
|
3344 max_sprites = 8; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3345 buf_clear_slot = 136; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3346 index_reset_slot = 253; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3347 index_reset_value = 0; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3348 vint_line = context->inactive_start + 1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3349 vint_slot = VINT_SLOT_MODE4; |
1177
67e0462c30ce
Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents:
1175
diff
changeset
|
3350 line_change = LINE_CHANGE_MODE4; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3351 bg_color = render_map_color(0, 0, 0); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3352 jump_start = 147; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3353 jump_dest = 233; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3354 if (context->regs[REG_MODE_1] & BIT_MODE_4) { |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3355 active_line = 0x1FF; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3356 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3357 //never active unless either mode 4 or mode 5 is turned on |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3358 active_line = 0x200; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3359 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3360 } |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3361 uint32_t *dst; |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3362 uint8_t *debug_dst; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3363 if (context->output && context->hslot >= BG_START_SLOT && context->hslot < bg_end_slot) { |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3364 dst = context->output + 2 * (context->hslot - BG_START_SLOT); |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3365 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT); |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3366 } else { |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3367 dst = NULL; |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3368 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3369 |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3370 uint8_t test_layer = context->test_port >> 7 & 3; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3371 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3372 while(context->cycles < target_cycles) |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3373 { |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3374 check_switch_inactive(context, is_h40); |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3375 if (context->hslot == BG_START_SLOT && context->output) { |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3376 dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3377 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT); |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3378 } else if (context->hslot == bg_end_slot) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
3379 advance_output_line(context); |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3380 dst = NULL; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3381 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3382 //this will need some tweaking to properly interact with 128K mode, |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3383 //but this should be good enough for now |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3384 context->serial_address += 1024; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3385 if (test_layer) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3386 switch (context->hslot & 7) |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3387 { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3388 case 3: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3389 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3390 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3391 case 4: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3392 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3393 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3394 case 7: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3395 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3396 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3397 case 0: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3398 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2); |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3399 break; |
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3400 case 1: |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3401 inactive_test_output(context, is_h40, test_layer); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3402 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3403 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3404 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3405 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3406 if (context->hslot == buf_clear_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3407 if (mode_5) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3408 context->cur_slot = max_draws; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3409 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3410 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3411 context->sprite_draws = MAX_DRAWS_H32_MODE4; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3412 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3413 memset(context->linebuf, 0, LINEBUF_SIZE); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3414 } else if (context->hslot == index_reset_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3415 context->sprite_index = index_reset_value; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3416 context->slot_counter = mode_5 ? 0 : max_sprites; |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3417 } else if (context->hslot == latch_slot) { |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3418 //it seems unlikely to me that vscroll actually gets latched when the display is off |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3419 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3420 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3421 //(which disables the display and ends up with garbage if vscroll is latched during that period) |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3422 //without it. Some more tests are definitely needed |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3423 context->vscroll_latch[0] = context->vsram[0]; |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3424 context->vscroll_latch[1] = context->vsram[1]; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3425 } else if (context->vcounter == vint_line && context->hslot == vint_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3426 context->flags2 |= FLAG2_VINT_PENDING; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3427 context->pending_vint_start = context->cycles; |
1436
40c3be9f1af7
Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents:
1432
diff
changeset
|
3428 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) { |
40c3be9f1af7
Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents:
1432
diff
changeset
|
3429 context->flags2 ^= FLAG2_EVEN_FIELD; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3430 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3431 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3432 if (dst) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3433 uint8_t bg_index; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3434 if (mode_5) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3435 bg_index = context->regs[REG_BG_COLOR] & 0x3F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3436 bg_color = context->colors[bg_index]; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3437 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3438 bg_index = 0x10 + (context->regs[REG_BG_COLOR] & 0xF); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3439 bg_color = context->colors[MODE4_OFFSET + bg_index]; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3440 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3441 if (context->done_composite) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3442 uint8_t pixel = context->compositebuf[dst-context->output]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3443 if (!(pixel & 0x3F | test_layer)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3444 pixel = pixel & 0xC0 | bg_index; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3445 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3446 *(dst++) = context->colors[pixel]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3447 if ((dst - context->output) == (context->done_composite - context->compositebuf)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3448 context->done_composite = NULL; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3449 memset(context->compositebuf, 0, sizeof(context->compositebuf)); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3450 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3451 } else { |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3452 *(dst++) = bg_color; |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3453 *(debug_dst++) = DBG_SRC_BG; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3454 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3455 if (context->done_composite) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3456 uint8_t pixel = context->compositebuf[dst-context->output]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3457 if (!(pixel & 0x3F | test_layer)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3458 pixel = pixel & 0xC0 | bg_index; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3459 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3460 *(dst++) = context->colors[pixel]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3461 if ((dst - context->output) == (context->done_composite - context->compositebuf)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3462 context->done_composite = NULL; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3463 memset(context->compositebuf, 0, sizeof(context->compositebuf)); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3464 } |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3465 } else { |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3466 *(dst++) = bg_color; |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3467 *(debug_dst++) = DBG_SRC_BG; |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3468 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3469 |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3470 if (context->hslot == (bg_end_slot-1)) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3471 if (context->done_composite) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3472 uint8_t pixel = context->compositebuf[dst-context->output]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3473 if (!(pixel & 0x3F | test_layer)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3474 pixel = pixel & 0xC0 | bg_index; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3475 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3476 *(dst++) = context->colors[pixel]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3477 if ((dst - context->output) == (context->done_composite - context->compositebuf)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3478 context->done_composite = NULL; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3479 memset(context->compositebuf, 0, sizeof(context->compositebuf)); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3480 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3481 } else { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3482 *(dst++) = bg_color; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3483 *(debug_dst++) = DBG_SRC_BG; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3484 } |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3485 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3486 } |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3487 |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3488 if (!is_refresh(context, context->hslot)) { |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3489 external_slot(context); |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3490 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) { |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3491 run_dma_src(context, context->hslot); |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3492 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3493 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3494 |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3495 if (is_h40) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3496 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3497 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40]; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3498 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3499 context->cycles += MCLKS_SLOT_H40; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3500 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3501 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3502 context->cycles += MCLKS_SLOT_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3503 } |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3504 if (context->hslot == jump_start) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3505 context->hslot = jump_dest; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3506 } else { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3507 context->hslot++; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3508 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3509 if (context->hslot == line_change) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3510 vdp_advance_line(context); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3511 if (context->vcounter == active_line) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3512 context->state = PREPARING; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3513 return; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3514 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3515 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3516 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3517 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3518 |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3519 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3520 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3521 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3522 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3523 while(context->cycles < target_cycles) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3524 { |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3525 check_switch_inactive(context, is_h40); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3526 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3527 if (is_active(context)) { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3528 if (mode_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3529 if (is_h40) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3530 vdp_h40(context, target_cycles); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3531 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3532 vdp_h32(context, target_cycles); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3533 } |
330
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
3534 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3535 vdp_h32_mode4(context, target_cycles); |
330
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
3536 } |
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
3537 } else { |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3538 vdp_inactive(context, target_cycles, is_h40, mode_5); |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3539 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3540 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3541 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3542 |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3543 void vdp_run_context(vdp_context *context, uint32_t target_cycles) |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3544 { |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3545 //TODO: Deal with H40 hsync shenanigans |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3546 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19; |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3547 if (target_cycles < slot_cyc) { |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3548 //avoid overflow |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3549 return; |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3550 } |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3551 vdp_run_context_full(context, target_cycles - slot_cyc); |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3552 } |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3553 |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3554 uint32_t vdp_run_to_vblank(vdp_context * context) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3555 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3556 uint32_t old_frame = context->frame; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3557 while (context->frame == old_frame) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3558 vdp_run_context_full(context, context->cycles + MCLKS_LINE); |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3559 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3560 return context->cycles; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3561 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3562 |
75 | 3563 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles) |
3564 { | |
3565 for(;;) { | |
3566 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]; | |
3567 if (!dmalen) { | |
3568 dmalen = 0x10000; | |
3569 } | |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3570 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20); |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
3571 if ( |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3572 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
3573 || (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) { |
75 | 3574 //DMA copies take twice as long to complete since they require a read and a write |
3575 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word | |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
3576 //unless 128KB mode is enabled |
75 | 3577 min_dma_complete *= 2; |
3578 } | |
3579 min_dma_complete += context->cycles; | |
3580 if (target_cycles < min_dma_complete) { | |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3581 vdp_run_context_full(context, target_cycles); |
75 | 3582 return; |
3583 } else { | |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3584 vdp_run_context_full(context, min_dma_complete); |
75 | 3585 if (!(context->flags & FLAG_DMA_RUN)) { |
3586 return; | |
3587 } | |
3588 } | |
3589 } | |
3590 } | |
3591 | |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3592 static uint16_t get_ext_vcounter(vdp_context *context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3593 { |
1437
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3594 uint16_t line= context->vcounter; |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3595 if (context->regs[REG_MODE_4] & BIT_INTERLACE) { |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3596 if (context->double_res) { |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3597 line <<= 1; |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3598 } else { |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3599 line &= 0x1FE; |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3600 } |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3601 if (line & 0x100) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3602 line |= 1; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3603 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3604 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3605 return line << 8; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3606 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3607 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3608 void vdp_latch_hv(vdp_context *context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3609 { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3610 context->hv_latch = context->hslot | get_ext_vcounter(context); |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3611 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3612 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3613 uint16_t vdp_hv_counter_read(vdp_context * context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3614 { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3615 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3616 return context->hv_latch; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3617 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3618 uint16_t hv; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3619 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3620 hv = context->hslot; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3621 } else { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3622 hv = context->hv_latch & 0xFF; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3623 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3624 hv |= get_ext_vcounter(context); |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3625 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3626 return hv; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3627 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3628 |
75 | 3629 int vdp_control_port_write(vdp_context * context, uint16_t value) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3630 { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3631 //printf("control port write: %X at %d\n", value, context->cycles); |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3632 if (context->flags & FLAG_DMA_RUN) { |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3633 return -1; |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3634 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3635 if (context->flags & FLAG_PENDING) { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
3636 context->address = (context->address & 0x3FFF) | (value << 14 & 0x1C000); |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3637 //It seems like the DMA enable bit doesn't so much enable DMA so much |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3638 //as it enables changing CD5 from control port writes |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3639 uint8_t preserve = (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) ? 0x3 : 0x23; |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3640 context->cd = (context->cd & preserve) | ((value >> 2) & ~preserve & 0xFF); |
75 | 3641 context->flags &= ~FLAG_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3642 //Should these be taken care of here or after the first write? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3643 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3644 context->flags2 &= ~FLAG2_READ_PENDING; |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3645 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3646 if (context->cd & 0x20) { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3647 // |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3648 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) { |
75 | 3649 //DMA copy or 68K -> VDP, transfer starts immediately |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3650 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot); |
1191
8dc50e50ced6
Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents:
1189
diff
changeset
|
3651 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
8dc50e50ced6
Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents:
1189
diff
changeset
|
3652 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); |
1289
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3653 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3654 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3655 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3656 //sticking with 3 slots for now until I can do some more captures |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3657 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5)); |
1285
76e47254596b
Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents:
1278
diff
changeset
|
3658 context->flags |= FLAG_DMA_RUN; |
75 | 3659 return 1; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3660 } else { |
1285
76e47254596b
Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents:
1278
diff
changeset
|
3661 context->flags |= FLAG_DMA_RUN; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3662 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
75 | 3663 } |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3664 } else { |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3665 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd); |
75 | 3666 } |
63
a6dd5b7a971b
Add FPS counter to console output
Mike Pavone <pavone@retrodev.com>
parents:
58
diff
changeset
|
3667 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3668 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3669 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3670 context->address = (context->address &0xC000) | (value & 0x3FFF); |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3671 context->cd = (context->cd & 0x3C) | (value >> 14); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3672 if ((value & 0xC000) == 0x8000) { |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3673 //Register write |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3674 uint8_t reg = (value >> 8) & 0x1F; |
1123
d5412f76accc
Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1122
diff
changeset
|
3675 if (reg < (mode_5 ? VDP_REGS : 0xB)) { |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3676 //printf("register %d set to %X\n", reg, value & 0xFF); |
480
0737953132ad
Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents:
479
diff
changeset
|
3677 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) { |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3678 vdp_latch_hv(context); |
480
0737953132ad
Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents:
479
diff
changeset
|
3679 } |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3680 if (reg == REG_BG_COLOR) { |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3681 value &= 0x3F; |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3682 } |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3683 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3684 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame); |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3685 }*/ |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3686 context->regs[reg] = value; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3687 if (reg == REG_MODE_4) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3688 context->double_res = (value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES); |
415
8c60c8c09a0f
Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode.
Mike Pavone <pavone@retrodev.com>
parents:
414
diff
changeset
|
3689 if (!context->double_res) { |
1106
cacbd3f18f03
Fix field flag handling bug introduced with VDP/render interface cleanup
Michael Pavone <pavone@retrodev.com>
parents:
1103
diff
changeset
|
3690 context->flags2 &= ~FLAG2_EVEN_FIELD; |
415
8c60c8c09a0f
Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode.
Mike Pavone <pavone@retrodev.com>
parents:
414
diff
changeset
|
3691 } |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3692 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3693 if (reg == REG_MODE_1 || reg == REG_MODE_2 || reg == REG_MODE_4) { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3694 update_video_params(context); |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3695 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3696 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3697 } else if (mode_5) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3698 context->flags |= FLAG_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3699 //Should these be taken care of here or after the second write? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3700 //context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3701 //context->flags2 &= ~FLAG2_READ_PENDING; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3702 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3703 context->flags &= ~FLAG_READ_FETCHED; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3704 context->flags2 &= ~FLAG2_READ_PENDING; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3705 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3706 } |
75 | 3707 return 0; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3708 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3709 |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3710 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value) |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3711 { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3712 if (context->flags2 & FLAG2_BYTE_PENDING) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3713 uint16_t full_val = value << 8 | context->pending_byte; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3714 context->flags2 &= ~FLAG2_BYTE_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3715 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3716 vdp_control_port_write(context, full_val); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3717 if (context->cd == VRAM_READ) { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3718 context->cd = VRAM_READ8; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3719 } |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3720 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3721 context->pending_byte = value; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3722 context->flags2 |= FLAG2_BYTE_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3723 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3724 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3725 |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3726 int vdp_data_port_write(vdp_context * context, uint16_t value) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3727 { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3728 //printf("data port write: %X at %d\n", value, context->cycles); |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3729 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) { |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3730 return -1; |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3731 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3732 if (context->flags & FLAG_PENDING) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3733 context->flags &= ~FLAG_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3734 //Should these be cleared here? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3735 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3736 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3737 } |
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
changeset
|
3738 /*if (context->fifo_cur == context->fifo_end) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3739 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
changeset
|
3740 }*/ |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3741 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3742 context->flags &= ~FLAG_DMA_RUN; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3743 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3744 while (context->fifo_write == context->fifo_read) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3745 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3746 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3747 fifo_entry * cur = context->fifo + context->fifo_write; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3748 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3749 cur->address = context->address; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3750 cur->value = value; |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3751 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3752 cur->cd = context->cd; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3753 } else { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3754 cur->cd = (context->cd & 2) | 1; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3755 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3756 cur->partial = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3757 if (context->fifo_read < 0) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3758 context->fifo_read = context->fifo_write; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3759 } |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3760 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3761 increment_address(context); |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3762 return 0; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3763 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3764 |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3765 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value) |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3766 { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3767 if (context->flags & FLAG_PENDING) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3768 context->flags &= ~FLAG_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3769 //Should these be cleared here? |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3770 context->flags &= ~FLAG_READ_FETCHED; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3771 context->flags2 &= ~FLAG2_READ_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3772 } |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3773 context->flags2 &= ~FLAG2_BYTE_PENDING; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3774 /*if (context->fifo_cur == context->fifo_end) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3775 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3776 }*/ |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3777 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3778 context->flags &= ~FLAG_DMA_RUN; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3779 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3780 while (context->fifo_write == context->fifo_read) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3781 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3782 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3783 fifo_entry * cur = context->fifo + context->fifo_write; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3784 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3785 cur->address = context->address; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3786 cur->value = value; |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3787 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3788 cur->cd = context->cd; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3789 } else { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3790 cur->cd = (context->cd & 2) | 1; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3791 } |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
3792 cur->partial = 3; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3793 if (context->fifo_read < 0) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3794 context->fifo_read = context->fifo_write; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3795 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3796 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3797 increment_address(context); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3798 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3799 |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3800 void vdp_test_port_write(vdp_context * context, uint16_t value) |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3801 { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
3802 context->test_port = value; |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3803 } |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3804 |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3805 uint16_t vdp_control_port_read(vdp_context * context) |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3806 { |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3807 context->flags &= ~FLAG_PENDING; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3808 context->flags2 &= ~FLAG2_BYTE_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3809 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3810 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3811 if (context->fifo_read < 0) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3812 value |= 0x200; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3813 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3814 if (context->fifo_read == context->fifo_write) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3815 value |= 0x100; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3816 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3817 if (context->flags2 & FLAG2_VINT_PENDING) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3818 value |= 0x80; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3819 } |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3820 if (context->flags & FLAG_DOT_OFLOW) { |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3821 value |= 0x40; |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
3822 context->flags &= ~FLAG_DOT_OFLOW; |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3823 } |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3824 if (context->flags2 & FLAG2_SPRITE_COLLIDE) { |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3825 value |= 0x20; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3826 context->flags2 &= ~FLAG2_SPRITE_COLLIDE; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3827 } |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
3828 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3829 value |= 0x10; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3830 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3831 uint32_t slot = context->hslot; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3832 if (!is_active(context)) { |
318
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3833 value |= 0x8; |
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3834 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3835 if (context->regs[REG_MODE_4] & BIT_H40) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3836 if (slot < HBLANK_END_H40 || slot > HBLANK_START_H40) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3837 value |= 0x4; |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3838 } |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3839 } else { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3840 if (slot < HBLANK_END_H32 || slot > HBLANK_START_H32) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3841 value |= 0x4; |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3842 } |
318
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3843 } |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3844 if (context->cd & 0x20) { |
141
576f55711d8d
Fix DMA in progress flag in VDP status register
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
3845 value |= 0x2; |
75 | 3846 } |
714
e29bc2918f69
Fix VDP status register PAL bit based on observations of the Titan Overdrive demo
Michael Pavone <pavone@retrodev.com>
parents:
711
diff
changeset
|
3847 if (context->flags2 & FLAG2_REGION_PAL) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3848 value |= 0x1; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3849 } |
459
c49ecf575784
Revert change to VBLANK flag timing based on new direct color DMA test
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3850 //printf("status read at cycle %d returned %X\n", context->cycles, value); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3851 return value; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3852 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3853 |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3854 uint16_t vdp_data_port_read(vdp_context * context) |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3855 { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3856 if (context->flags & FLAG_PENDING) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3857 context->flags &= ~FLAG_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3858 //Should these be cleared here? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3859 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3860 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3861 } |
138 | 3862 if (context->cd & 1) { |
991
f9ee6f746cb4
Properly emulate machine freeze when reading from VDP while configured for writes
Michael Pavone <pavone@retrodev.com>
parents:
984
diff
changeset
|
3863 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3864 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3865 while (!(context->flags & FLAG_READ_FETCHED)) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3866 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3867 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3868 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3869 return context->prefetch; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3870 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3871 |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3872 uint8_t vdp_data_port_read_pbc(vdp_context * context) |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3873 { |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3874 context->flags &= ~(FLAG_PENDING | FLAG_READ_FETCHED); |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3875 context->flags2 &= ~FLAG2_BYTE_PENDING; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3876 |
1152
ddbb61be6119
Fix to pass a couple more tests in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1151
diff
changeset
|
3877 context->cd = VRAM_READ8; |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3878 return context->prefetch; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3879 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3880 |
65
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3881 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction) |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3882 { |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3883 context->cycles -= deduction; |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3884 if (context->pending_vint_start >= deduction) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3885 context->pending_vint_start -= deduction; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3886 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3887 context->pending_vint_start = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3888 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3889 if (context->pending_hint_start >= deduction) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3890 context->pending_hint_start -= deduction; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3891 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3892 context->pending_hint_start = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3893 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3894 if (context->fifo_read >= 0) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3895 int32_t idx = context->fifo_read; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3896 do { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3897 if (context->fifo[idx].cycle >= deduction) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3898 context->fifo[idx].cycle -= deduction; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3899 } else { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3900 context->fifo[idx].cycle = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3901 } |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3902 idx = (idx+1) & (FIFO_SIZE-1); |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3903 } while(idx != context->fifo_write); |
65
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3904 } |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3905 } |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3906 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
3907 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context) |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3908 { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3909 if (context->hslot < 183) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3910 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3911 } else if (context->hslot < HSYNC_END_H40) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3912 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3913 uint32_t hsync = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3914 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++) |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3915 { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3916 hsync += h40_hsync_cycles[i]; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3917 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3918 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3919 return before_hsync + hsync + after_hsync; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3920 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3921 return (256-context->hslot) * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3922 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3923 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3924 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
3925 static uint32_t vdp_cycles_next_line(vdp_context * context) |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3926 { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3927 if (context->regs[REG_MODE_4] & BIT_H40) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3928 //TODO: Handle "illegal" Mode 4/H40 combo |
647
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
3929 if (context->hslot < LINE_CHANGE_H40) { |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
680
diff
changeset
|
3930 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3931 } else { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3932 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3933 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3934 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3935 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3936 if (context->hslot < LINE_CHANGE_H32) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3937 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3938 } else if (context->hslot < 148) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3939 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3940 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3941 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3942 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3943 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3944 if (context->hslot < 148) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3945 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3946 } else if (context->hslot < LINE_CHANGE_MODE4) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3947 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3948 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3949 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3950 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3951 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3952 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3953 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3954 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3955 static void get_jump_params(vdp_context *context, uint32_t *jump_start, uint32_t *jump_dst) |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3956 { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3957 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3958 if (context->flags2 & FLAG2_REGION_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3959 if (context->regs[REG_MODE_2] & BIT_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3960 *jump_start = 0x10B; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3961 *jump_dst = 0x1D2; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3962 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3963 *jump_start = 0x103; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3964 *jump_dst = 0x1CA; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3965 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3966 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3967 if (context->regs[REG_MODE_2] & BIT_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3968 *jump_start = 0x100; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3969 *jump_dst = 0x1FA; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3970 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3971 *jump_start = 0xEB; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3972 *jump_dst = 0x1E5; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3973 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3974 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3975 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3976 *jump_start = 0xDB; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3977 *jump_dst = 0x1D5; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3978 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3979 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3980 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
3981 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target) |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3982 { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3983 uint32_t jump_start, jump_dst; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3984 get_jump_params(context, &jump_start, &jump_dst); |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3985 uint32_t lines; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3986 if (context->vcounter < target) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3987 if (target < jump_start || context->vcounter > jump_start) { |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3988 lines = target - context->vcounter; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3989 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3990 lines = jump_start - context->vcounter + target - jump_dst; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3991 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3992 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3993 if (context->vcounter < jump_start) { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3994 lines = jump_start - context->vcounter + 512 - jump_dst; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3995 } else { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3996 lines = 512 - context->vcounter; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3997 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3998 if (target < jump_start) { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3999 lines += target; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4000 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4001 lines += jump_start + target - jump_dst; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4002 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4003 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4004 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context); |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4005 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4006 |
680
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4007 uint32_t vdp_cycles_to_frame_end(vdp_context * context) |
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4008 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
4009 return context->cycles + vdp_cycles_to_line(context, context->inactive_start); |
680
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4010 } |
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4011 |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4012 uint32_t vdp_next_hint(vdp_context * context) |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4013 { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
4014 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4015 return 0xFFFFFFFF; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4016 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4017 if (context->flags2 & FLAG2_HINT_PENDING) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
4018 return context->pending_hint_start; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4019 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4020 uint32_t hint_line; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4021 if (context->state != ACTIVE) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4022 hint_line = context->regs[REG_HINT]; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4023 if (hint_line > context->inactive_start) { |
724
2174f92c5f9b
Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents:
722
diff
changeset
|
4024 return 0xFFFFFFFF; |
2174f92c5f9b
Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents:
722
diff
changeset
|
4025 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4026 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4027 hint_line = context->vcounter + context->hint_counter + 1; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4028 if (context->vcounter < context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4029 if (hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4030 hint_line = context->regs[REG_HINT]; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4031 if (hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4032 return 0xFFFFFFFF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4033 } |
1366
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4034 if (hint_line >= context->vcounter) { |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4035 //Next interrupt is for a line in the next frame that |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4036 //is higher than the line we're on now so just passing |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4037 //that line number to vdp_cycles_to_line will yield the wrong |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4038 //result |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
4039 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE; |
1366
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4040 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4041 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4042 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4043 uint32_t jump_start, jump_dst; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4044 get_jump_params(context, &jump_start, &jump_dst); |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4045 if (hint_line >= jump_start && context->vcounter < jump_dst) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4046 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4047 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4048 if (hint_line < context->vcounter && hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4049 return 0xFFFFFFFF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4050 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4051 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4052 } |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
4053 return context->cycles + vdp_cycles_to_line(context, hint_line); |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4054 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4055 |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4056 static uint32_t vdp_next_vint_real(vdp_context * context) |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4057 { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
4058 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4059 return 0xFFFFFFFF; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4060 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4061 if (context->flags2 & FLAG2_VINT_PENDING) { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4062 return context->pending_vint_start; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4063 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4064 |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4065 |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4066 return vdp_next_vint_z80(context); |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4067 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4068 |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4069 uint32_t vdp_next_vint(vdp_context *context) |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4070 { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4071 uint32_t ret = vdp_next_vint_real(context); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4072 #ifdef TIMING_DEBUG |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4073 static uint32_t last = 0xFFFFFFFF; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4074 if (last != ret) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4075 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4076 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4077 last = ret; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4078 #endif |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4079 return ret; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4080 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4081 |
333 | 4082 uint32_t vdp_next_vint_z80(vdp_context * context) |
4083 { | |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
4084 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
4085 if (context->vcounter == vint_line) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4086 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4087 if (context->regs[REG_MODE_4] & BIT_H40) { |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4088 if (context->hslot >= LINE_CHANGE_H40 || context->hslot <= VINT_SLOT_H40) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4089 uint32_t cycles = context->cycles; |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4090 if (context->hslot >= LINE_CHANGE_H40) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4091 if (context->hslot < 183) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4092 cycles += (183 - context->hslot) * MCLKS_SLOT_H40; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4093 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4094 |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4095 if (context->hslot < HSYNC_SLOT_H40) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4096 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4097 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4098 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ ) |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4099 { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4100 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40]; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4101 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4102 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4103 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4104 |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4105 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4106 return cycles; |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
4107 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4108 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4109 if (context->hslot >= LINE_CHANGE_H32 || context->hslot <= VINT_SLOT_H32) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4110 if (context->hslot <= VINT_SLOT_H32) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4111 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32; |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4112 } else if (context->hslot < 233) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4113 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4114 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4115 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4116 } |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
4117 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4118 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4119 } else { |
1177
67e0462c30ce
Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents:
1175
diff
changeset
|
4120 if (context->hslot >= LINE_CHANGE_MODE4) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4121 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4122 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4123 if (context->hslot <= VINT_SLOT_MODE4) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4124 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4125 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4126 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4127 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
4128 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4129 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4130 if (context->regs[REG_MODE_4] & BIT_H40) { |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4131 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4132 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4133 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4134 } |
333 | 4135 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4136 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32; |
333 | 4137 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4138 return context->cycles + cycles_to_vint; |
333 | 4139 } |
4140 | |
1377
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4141 uint32_t vdp_next_nmi(vdp_context *context) |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4142 { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4143 if (!(context->flags2 & FLAG2_PAUSE)) { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4144 return 0xFFFFFFFF; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4145 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4146 return context->cycles + vdp_cycles_to_line(context, 0x1FF); |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4147 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4148 |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4149 void vdp_pbc_pause(vdp_context *context) |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4150 { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4151 context->flags2 |= FLAG2_PAUSE; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4152 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4153 |
953
08346262990b
Remove the int number argument to vdp_int_ack since it is no longer used
Michael Pavone <pavone@retrodev.com>
parents:
952
diff
changeset
|
4154 void vdp_int_ack(vdp_context * context) |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4155 { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4156 //CPU interrupt acknowledge is only used in Mode 5 |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4157 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4158 //Apparently the VDP interrupt controller is not very smart |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4159 //Instead of paying attention to what interrupt is being acknowledged it just |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4160 //clears the pending flag for whatever interrupt it is currently asserted |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4161 //which may be different from the interrupt it was asserting when the 68k |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4162 //started the interrupt process. The window for this is narrow and depends |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4163 //on the latency between the int enable register write and the interrupt being |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4164 //asserted, but Fatal Rewind depends on this due to some buggy code |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4165 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4166 context->flags2 &= ~FLAG2_VINT_PENDING; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4167 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4168 context->flags2 &= ~FLAG2_HINT_PENDING; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4169 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4170 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4171 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4172 |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4173 #define VDP_STATE_VERSION 1 |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4174 void vdp_serialize(vdp_context *context, serialize_buffer *buf) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4175 { |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4176 save_int8(buf, VDP_STATE_VERSION); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4177 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4178 save_buffer8(buf, context->vdpmem, VRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4179 save_buffer16(buf, context->cram, CRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4180 save_buffer16(buf, context->vsram, VSRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4181 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4182 for (int i = 0; i <= REG_DMASRC_H; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4183 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4184 save_int8(buf, context->regs[i]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4185 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4186 save_int32(buf, context->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4187 save_int32(buf, context->serial_address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4188 save_int8(buf, context->cd); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4189 uint8_t fifo_size; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4190 if (context->fifo_read < 0) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4191 fifo_size = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4192 } else if (context->fifo_write > context->fifo_read) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4193 fifo_size = context->fifo_write - context->fifo_read; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4194 } else { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4195 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4196 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4197 save_int8(buf, fifo_size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4198 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4199 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4200 fifo_entry *entry = context->fifo + cur; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4201 cur = (cur + 1) & (FIFO_SIZE - 1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4202 save_int32(buf, entry->cycle); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4203 save_int32(buf, entry->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4204 save_int16(buf, entry->value); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4205 save_int8(buf, entry->cd); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4206 save_int8(buf, entry->partial); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4207 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4208 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4209 save_int16(buf, context->flags2 << 8 | context->flags); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4210 save_int32(buf, context->frame); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4211 save_int16(buf, context->vcounter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4212 save_int8(buf, context->hslot); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4213 save_int16(buf, context->hv_latch); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4214 save_int8(buf, context->state); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4215 save_int16(buf, context->hscroll_a); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4216 save_int16(buf, context->hscroll_b); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4217 save_int16(buf, context->vscroll_latch[0]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4218 save_int16(buf, context->vscroll_latch[1]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4219 save_int16(buf, context->col_1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4220 save_int16(buf, context->col_2); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4221 save_int16(buf, context->test_port); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4222 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4223 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4224 save_int8(buf, context->buf_a_off); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4225 save_int8(buf, context->buf_b_off); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4226 //FIXME: Sprite rendering state is currently a mess |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4227 save_int8(buf, context->sprite_index); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4228 save_int8(buf, context->sprite_draws); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4229 save_int8(buf, context->slot_counter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4230 save_int8(buf, context->cur_slot); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4231 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4232 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4233 sprite_draw *draw = context->sprite_draw_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4234 save_int16(buf, draw->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4235 save_int16(buf, draw->x_pos); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4236 save_int8(buf, draw->pal_priority); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4237 save_int8(buf, draw->h_flip); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4238 save_int8(buf, draw->width); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4239 save_int8(buf, draw->height); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4240 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4241 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4242 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4243 sprite_info *info = context->sprite_info_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4244 save_int8(buf, info->size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4245 save_int8(buf, info->index); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4246 save_int16(buf, info->y); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4247 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4248 save_buffer8(buf, context->linebuf, LINEBUF_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4249 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4250 save_int32(buf, context->cycles); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4251 save_int32(buf, context->pending_vint_start); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4252 save_int32(buf, context->pending_hint_start); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4253 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4254 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4255 void vdp_deserialize(deserialize_buffer *buf, void *vcontext) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4256 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4257 vdp_context *context = vcontext; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4258 uint8_t version = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4259 uint8_t vramk; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4260 if (version == 64) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4261 vramk = version; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4262 version = 0; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4263 } else { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4264 vramk = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4265 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4266 if (version > VDP_STATE_VERSION) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4267 warning("Save state has VDP version %d, but this build only understands versions %d and lower", version, VDP_STATE_VERSION); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4268 } |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4269 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4270 if ((vramk * 1024) > VRAM_SIZE) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4271 buf->cur_pos += (vramk * 1024) - VRAM_SIZE; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4272 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4273 load_buffer16(buf, context->cram, CRAM_SIZE); |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4274 for (int i = 0; i < CRAM_SIZE; i++) |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4275 { |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4276 update_color_map(context, i, context->cram[i]); |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4277 } |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4278 load_buffer16(buf, context->vsram, VSRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4279 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4280 for (int i = 0; i <= REG_DMASRC_H; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4281 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4282 context->regs[i] = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4283 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4284 context->address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4285 context->serial_address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4286 context->cd = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4287 uint8_t fifo_size = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4288 if (fifo_size > FIFO_SIZE) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4289 fatal_error("Invalid fifo size %d", fifo_size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4290 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4291 if (fifo_size) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4292 context->fifo_read = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4293 context->fifo_write = fifo_size & (FIFO_SIZE - 1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4294 for (int i = 0; i < fifo_size; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4295 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4296 fifo_entry *entry = context->fifo + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4297 entry->cycle = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4298 entry->address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4299 entry->value = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4300 entry->cd = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4301 entry->partial = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4302 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4303 } else { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4304 context->fifo_read = -1; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4305 context->fifo_write = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4306 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4307 uint16_t flags = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4308 context->flags2 = flags >> 8; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4309 context->flags = flags; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4310 context->frame = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4311 context->vcounter = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4312 context->hslot = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4313 context->hv_latch = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4314 context->state = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4315 context->hscroll_a = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4316 context->hscroll_b = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4317 context->vscroll_latch[0] = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4318 context->vscroll_latch[1] = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4319 context->col_1 = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4320 context->col_2 = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4321 context->test_port = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4322 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4323 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4324 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4325 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4326 context->sprite_index = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4327 context->sprite_draws = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4328 context->slot_counter = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4329 context->cur_slot = load_int8(buf); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4330 if (version == 0) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4331 int cur_draw = 0; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4332 for (int i = 0; i < MAX_SPRITES_LINE * 2; i++) |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4333 { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4334 if (cur_draw < MAX_SPRITES_LINE) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4335 sprite_draw *last = cur_draw ? context->sprite_draw_list + cur_draw - 1 : NULL; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4336 sprite_draw *draw = context->sprite_draw_list + cur_draw++; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4337 draw->address = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4338 draw->x_pos = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4339 draw->pal_priority = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4340 draw->h_flip = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4341 draw->width = 1; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4342 draw->height = 8; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4343 |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4344 if (last && last->width < 4 && last->h_flip == draw->h_flip && last->pal_priority == draw->pal_priority) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4345 int adjust_x = draw->x_pos + draw->h_flip ? -8 : 8; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4346 int height = draw->address - last->address /4; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4347 if (last->x_pos == adjust_x && ( |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4348 (last->width > 1 && height == last->height) || |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4349 (last->width == 1 && (height == 8 || height == 16 || height == 24 || height == 32)) |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4350 )) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4351 //current draw appears to be part of the same sprite as the last one, combine it |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4352 cur_draw--; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4353 last->width++; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4354 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4355 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4356 } else { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4357 load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4358 load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4359 load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4360 load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4361 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4362 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4363 } else { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4364 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4365 { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4366 sprite_draw *draw = context->sprite_draw_list + i; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4367 draw->address = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4368 draw->x_pos = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4369 draw->pal_priority = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4370 draw->h_flip = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4371 draw->width = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4372 draw->height = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4373 } |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4374 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4375 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4376 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4377 sprite_info *info = context->sprite_info_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4378 info->size = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4379 info->index = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4380 info->y = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4381 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4382 load_buffer8(buf, context->linebuf, LINEBUF_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4383 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4384 context->cycles = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4385 context->pending_vint_start = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4386 context->pending_hint_start = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4387 update_video_params(context); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4388 } |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4389 |
1649
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4390 static vdp_context *current_vdp; |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4391 static void vdp_debug_window_close(uint8_t which) |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4392 { |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4393 //TODO: remove need for current_vdp global, and find the VDP via current_system instead |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4394 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++) |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4395 { |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4396 if (current_vdp->enabled_debuggers & (1 << i) && which == current_vdp->debug_fb_indices[i]) { |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4397 vdp_toggle_debug_view(current_vdp, i); |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4398 break; |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4399 } |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4400 } |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4401 } |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4402 |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4403 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4404 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4405 if (context->enabled_debuggers & 1 << debug_type) { |
1642
c6b2c0f8cc61
Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents:
1641
diff
changeset
|
4406 render_destroy_window(context->debug_fb_indices[debug_type]); |
c6b2c0f8cc61
Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents:
1641
diff
changeset
|
4407 context->enabled_debuggers &= ~(1 << debug_type); |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4408 } else { |
1634
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4409 uint32_t width,height; |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4410 uint8_t fetch_immediately = 0; |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4411 char *caption; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4412 switch(debug_type) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4413 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4414 case VDP_DEBUG_PLANE: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4415 caption = "BlastEm - VDP Plane Debugger"; |
1634
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4416 width = height = 1024; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4417 break; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4418 case VDP_DEBUG_VRAM: |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4419 caption = "BlastEm - VDP VRAM Debugger"; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4420 width = 1024; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4421 height = 512; |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4422 break; |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4423 case VDP_DEBUG_CRAM: |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4424 caption = "BlastEm - VDP CRAM Debugger"; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4425 width = 512; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4426 height = 512; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4427 fetch_immediately = 1; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4428 break; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4429 case VDP_DEBUG_COMPOSITE: |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4430 caption = "BlastEm - VDP Plane Composition Debugger"; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4431 width = LINEBUF_SIZE; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4432 height = context->inactive_start + context->border_top + context->border_bot; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4433 fetch_immediately = 1; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4434 break; |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4435 default: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4436 return; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4437 } |
1649
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4438 current_vdp = context; |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4439 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height, vdp_debug_window_close); |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4440 if (context->debug_fb_indices[debug_type]) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4441 context->enabled_debuggers |= 1 << debug_type; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4442 } |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4443 if (fetch_immediately) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4444 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4445 } |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4446 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4447 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4448 |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4449 void vdp_inc_debug_mode(vdp_context *context) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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4450 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
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4451 uint8_t active = render_get_active_framebuffer(); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
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4452 if (active < FRAMEBUFFER_USER_START) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
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4453 return; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
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4454 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
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changeset
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4455 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
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4456 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
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changeset
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4457 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
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changeset
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4458 context->debug_modes[i]++; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
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4459 return; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
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4460 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
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4461 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4462 } |