Mercurial > repos > blastem
annotate ym2612.c @ 383:72933100c55c
Initial implementation of channel 3 special mode
author | Mike Pavone <pavone@retrodev.com> |
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date | Tue, 04 Jun 2013 21:23:12 -0700 |
parents | b904859964e5 |
children | 6e5c4f3ab0e2 |
rev | line source |
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1 #include <string.h> |
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2 #include <math.h> |
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3 #include <stdio.h> |
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4 #include <stdlib.h> |
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5 #include "ym2612.h" |
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6 #include "render.h" |
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7 |
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8 //#define DO_DEBUG_PRINT |
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9 #ifdef DO_DEBUG_PRINT |
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10 #define dfprintf fprintf |
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11 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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12 #else |
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13 #define dfprintf |
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14 #define dfopen(var, fname, mode) |
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15 #endif |
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16 |
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17 #define BUSY_CYCLES 17 |
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18 #define OP_UPDATE_PERIOD 144 |
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19 |
362 | 20 enum { |
21 REG_TIMERA_HIGH = 0x24, | |
22 REG_TIMERA_LOW, | |
23 REG_TIMERB, | |
24 REG_TIME_CTRL, | |
25 REG_KEY_ONOFF, | |
26 REG_DAC = 0x2A, | |
27 REG_DAC_ENABLE, | |
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28 |
362 | 29 REG_DETUNE_MULT = 0x30, |
30 REG_TOTAL_LEVEL = 0x40, | |
31 REG_ATTACK_KS = 0x50, | |
32 REG_DECAY_AM = 0x60, | |
33 REG_SUSTAIN_RATE = 0x70, | |
34 REG_S_LVL_R_RATE = 0x80, | |
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35 |
362 | 36 REG_FNUM_LOW = 0xA0, |
37 REG_BLOCK_FNUM_H = 0xA4, | |
38 REG_FNUM_LOW_CH3 = 0xA8, | |
39 REG_BLOCK_FN_CH3 = 0xAC, | |
40 REG_ALG_FEEDBACK = 0xB0, | |
41 REG_LR_AMS_PMS = 0xB4 | |
42 }; | |
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43 |
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44 #define BIT_TIMERA_ENABLE 0x1 |
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45 #define BIT_TIMERB_ENABLE 0x2 |
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46 #define BIT_TIMERA_OVEREN 0x4 |
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47 #define BIT_TIMERB_OVEREN 0x8 |
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48 #define BIT_TIMERA_RESET 0x10 |
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49 #define BIT_TIMERB_RESET 0x20 |
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50 |
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51 #define BIT_STATUS_TIMERA 0x1 |
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52 #define BIT_STATUS_TIMERB 0x2 |
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53 |
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54 enum { |
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55 PHASE_ATTACK, |
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56 PHASE_DECAY, |
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57 PHASE_SUSTAIN, |
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58 PHASE_RELEASE |
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59 }; |
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60 |
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61 uint8_t did_tbl_init = 0; |
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62 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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63 //memory is cheap so using a half sine table will probably save some cycles |
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64 //a full sine table would be nice, but negative numbers don't get along with log2 |
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65 #define SINE_TABLE_SIZE 512 |
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66 uint16_t sine_table[SINE_TABLE_SIZE]; |
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67 //Similar deal here with the power table for log -> linear conversion |
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68 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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69 //and uses the whole part as a shift amount. |
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70 #define POW_TABLE_SIZE (1 << 13) |
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71 uint16_t pow_table[POW_TABLE_SIZE]; |
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72 |
362 | 73 uint16_t rate_table_base[] = { |
74 //main portion | |
75 0,1,0,1,0,1,0,1, | |
76 0,1,0,1,1,1,0,1, | |
77 0,1,1,1,0,1,1,1, | |
78 0,1,1,1,1,1,1,1, | |
79 //top end | |
80 1,1,1,1,1,1,1,1, | |
81 1,1,1,2,1,1,1,2, | |
82 1,2,1,2,1,2,1,2, | |
83 1,2,2,2,1,2,2,2, | |
84 }; | |
85 | |
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86 uint16_t rate_table[64*8]; |
362 | 87 |
88 #define MAX_ENVELOPE 0xFFC | |
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89 #define YM_DIVIDER 2 |
374 | 90 #define CYCLE_NEVER 0xFFFFFFFF |
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91 |
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92 uint16_t round_fixed_point(double value, int dec_bits) |
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93 { |
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94 return value * (1 << dec_bits) + 0.5; |
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95 } |
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96 |
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97 FILE * debug_file = NULL; |
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98 uint32_t first_key_on=0; |
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99 |
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100 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit) |
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101 { |
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102 dfopen(debug_file, "ym_debug.txt", "w"); |
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103 memset(context, 0, sizeof(*context)); |
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104 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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105 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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106 context->buffer_inc = ((double)sample_rate / (double)master_clock) * clock_div * 6; |
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107 context->clock_inc = clock_div * 6; |
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108 context->sample_limit = sample_limit*2; |
374 | 109 context->write_cycle = CYCLE_NEVER; |
362 | 110 for (int i = 0; i < NUM_OPERATORS; i++) { |
111 context->operators[i].envelope = MAX_ENVELOPE; | |
112 context->operators[i].env_phase = PHASE_RELEASE; | |
113 } | |
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114 //some games seem to expect that the LR flags start out as 1 |
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115 for (int i = 0; i < NUM_CHANNELS; i++) { |
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116 context->channels[i].lr = 0xC0; |
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117 } |
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118 if (!did_tbl_init) { |
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119 //populate sine table |
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120 for (int32_t i = 0; i < 512; i++) { |
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121 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
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122 |
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123 //table stores 4.8 fixed pointed representation of the base 2 log |
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124 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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125 } |
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126 //populate power table |
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127 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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128 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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129 int32_t tmp = round_fixed_point(linear, 11); |
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130 int32_t shift = (i >> 8) - 2; |
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131 if (shift < 0) { |
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132 tmp <<= 0-shift; |
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133 } else { |
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134 tmp >>= shift; |
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135 } |
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136 pow_table[i] = tmp; |
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137 } |
362 | 138 //populate envelope generator rate table, from small base table |
139 for (int rate = 0; rate < 64; rate++) { | |
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140 for (int cycle = 0; cycle < 8; cycle++) { |
362 | 141 uint16_t value; |
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142 if (rate < 2) { |
362 | 143 value = 0; |
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144 } else if (rate >= 60) { |
362 | 145 value = 8; |
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146 } else if (rate < 8) { |
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147 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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148 } else if (rate < 48) { |
362 | 149 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
150 } else { | |
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151 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
362 | 152 } |
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153 rate_table[rate * 8 + cycle] = value; |
362 | 154 } |
155 } | |
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156 } |
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157 } |
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158 |
377 | 159 #define YM_VOLUME_DIVIDER 2 |
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160 #define YM_MOD_SHIFT 1 |
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161 |
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162 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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163 { |
362 | 164 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
165 //TODO: Fix channel update order OR remap channels in register write | |
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166 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
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167 //Update timers at beginning of 144 cycle period |
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168 if (!context->current_op && context->timer_control & BIT_TIMERA_ENABLE) { |
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169 if (context->timer_a) { |
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170 context->timer_a--; |
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171 } else { |
362 | 172 if (context->timer_control & BIT_TIMERA_OVEREN) { |
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173 context->status |= BIT_STATUS_TIMERA; |
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174 } |
362 | 175 context->timer_a = context->timer_a_load; |
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176 } |
362 | 177 if (context->timer_control & BIT_TIMERB_ENABLE) { |
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178 uint32_t b_cyc = (context->current_cycle / OP_UPDATE_PERIOD) % 16; |
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179 if (!b_cyc) { |
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180 if (context->timer_b) { |
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181 context->timer_b--; |
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182 } else { |
362 | 183 if (context->timer_control & BIT_TIMERB_OVEREN) { |
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184 context->status |= BIT_STATUS_TIMERB; |
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185 } |
362 | 186 context->timer_b = context->timer_b_load; |
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187 } |
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188 } |
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189 } |
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190 } |
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191 //Update Envelope Generator |
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192 if (!(context->current_op % 3)) { |
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193 uint32_t env_cyc = context->env_counter; |
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194 uint32_t op = context->current_env_op; |
362 | 195 ym_operator * operator = context->operators + op; |
196 ym_channel * channel = context->channels + op/4; | |
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197 uint8_t rate; |
362 | 198 for(;;) { |
199 rate = operator->rates[operator->env_phase]; | |
200 if (rate) { | |
201 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
202 rate = rate*2 + ks; | |
203 if (rate > 63) { | |
204 rate = 63; | |
205 } | |
206 } | |
207 //Deal with "infinite" rates | |
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208 //According to Nemesis this should be handled in key-on instead |
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209 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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210 operator->env_phase = PHASE_DECAY; |
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211 operator->envelope = 0; |
362 | 212 } else { |
213 break; | |
214 } | |
215 } | |
216 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
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217 if (first_key_on) { |
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218 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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219 } |
362 | 220 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
221 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
222 //envelope value is 10-bits, but it will be used as a 4.8 value | |
223 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
224 if (operator->env_phase == PHASE_ATTACK) { | |
225 //this can probably be optimized to a single shift rather than a multiply + shift | |
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226 if (first_key_on) { |
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227 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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228 } |
362 | 229 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
230 operator->envelope &= MAX_ENVELOPE; | |
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231 if (!operator->envelope) { |
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232 operator->envelope = 0; |
362 | 233 operator->env_phase = PHASE_DECAY; |
234 } | |
235 } else { | |
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236 if (first_key_on) { |
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237 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
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238 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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239 } |
362 | 240 operator->envelope += envelope_inc; |
241 //clamp to max attenuation value | |
242 if (operator->envelope > MAX_ENVELOPE) { | |
243 operator->envelope = MAX_ENVELOPE; | |
244 } | |
245 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
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246 //operator->envelope = operator->sustain_level; |
362 | 247 operator->env_phase = PHASE_SUSTAIN; |
248 } | |
249 } | |
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250 } |
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251 context->current_env_op++; |
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252 if (context->current_env_op == NUM_OPERATORS) { |
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253 context->current_env_op = 0; |
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254 context->env_counter++; |
362 | 255 } |
256 } | |
257 | |
258 //Update Phase Generator | |
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259 uint32_t channel = context->current_op / 4; |
362 | 260 if (channel != 5 || !context->dac_enable) { |
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261 uint32_t op = context->current_op; |
362 | 262 //printf("updating operator %d of channel %d\n", op, channel); |
263 ym_operator * operator = context->operators + op; | |
264 ym_channel * chan = context->channels + channel; | |
265 //TODO: Modulate phase by LFO if necessary | |
266 operator->phase_counter += operator->phase_inc; | |
267 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; | |
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268 int16_t mod = 0; |
362 | 269 switch (op % 4) |
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270 { |
362 | 271 case 0://Operator 1 |
377 | 272 if (chan->feedback) { |
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273 mod = operator->output >> (9-chan->feedback); |
377 | 274 } |
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275 break; |
362 | 276 case 1://Operator 3 |
277 switch(chan->algorithm) | |
278 { | |
279 case 0: | |
280 case 2: | |
281 //modulate by operator 2 | |
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282 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
362 | 283 break; |
284 case 1: | |
285 //modulate by operator 1+2 | |
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286 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
362 | 287 break; |
288 case 5: | |
289 //modulate by operator 1 | |
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290 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
362 | 291 } |
292 break; | |
293 case 2://Operator 2 | |
294 if (chan->algorithm != 1 && chan->algorithm != 2 || chan->algorithm != 7) { | |
295 //modulate by Operator 1 | |
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296 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
362 | 297 } |
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298 break; |
362 | 299 case 3://Operator 4 |
300 switch(chan->algorithm) | |
301 { | |
302 case 0: | |
303 case 1: | |
304 case 4: | |
305 //modulate by operator 3 | |
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306 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
362 | 307 break; |
308 case 2: | |
309 //modulate by operator 1+3 | |
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310 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
362 | 311 break; |
312 case 3: | |
313 //modulate by operator 2+3 | |
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314 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
362 | 315 break; |
316 case 5: | |
317 //modulate by operator 1 | |
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318 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
362 | 319 break; |
320 } | |
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321 break; |
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322 } |
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323 uint16_t env = operator->envelope + operator->total_level; |
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324 if (env > MAX_ENVELOPE) { |
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325 env = MAX_ENVELOPE; |
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326 } |
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327 if (first_key_on) { |
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328 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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329 } |
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330 phase += mod; |
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331 |
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332 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
359
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333 if (phase & 0x200) { |
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334 output = -output; |
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335 } |
362 | 336 operator->output = output; |
359
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337 //Update the channel output if we've updated all operators |
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338 if (op % 4 == 3) { |
362 | 339 if (chan->algorithm < 4) { |
340 chan->output = operator->output; | |
341 } else if(chan->algorithm == 4) { | |
342 chan->output = operator->output + context->operators[channel * 4 + 1].output; | |
359
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343 } else { |
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344 output = 0; |
362 | 345 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
346 output += context->operators[op].output; | |
359
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347 } |
362 | 348 chan->output = output; |
359
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349 } |
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350 if (first_key_on) { |
371
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351 int16_t value = context->channels[channel].output & 0x3FE0; |
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352 if (value & 0x2000) { |
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353 value |= 0xC000; |
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354 } |
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355 dfprintf(debug_file, "channel %d output: %d\n", channel, value / YM_VOLUME_DIVIDER); |
370
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356 } |
359
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357 } |
362 | 358 //puts("operator update done"); |
359
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359 } |
364
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360 context->current_op++; |
380
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361 context->buffer_fraction += context->buffer_inc; |
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362 if (context->buffer_fraction > 1.0) { |
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363 context->buffer_fraction -= 1.0; |
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364 context->audio_buffer[context->buffer_pos] = 0; |
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365 context->audio_buffer[context->buffer_pos + 1] = 0; |
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366 for (int i = 0; i < NUM_CHANNELS; i++) { |
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367 int16_t value = context->channels[i].output & 0x3FE0; |
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368 if (value & 0x2000) { |
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369 value |= 0xC000; |
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370 } |
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371 if (context->channels[i].lr & 0x80) { |
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372 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
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373 } |
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374 if (context->channels[i].lr & 0x40) { |
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375 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
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376 } |
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377 } |
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378 context->buffer_pos += 2; |
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379 if (context->buffer_pos == context->sample_limit) { |
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380 render_wait_ym(context); |
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381 } |
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382 } |
364
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383 if (context->current_op == NUM_OPERATORS) { |
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384 context->current_op = 0; |
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385 } |
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386 } |
380
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387 if (context->current_cycle >= context->write_cycle + (BUSY_CYCLES * context->clock_inc / 6)) { |
288
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388 context->status &= 0x7F; |
374 | 389 context->write_cycle = CYCLE_NEVER; |
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390 } |
362 | 391 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
288
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392 } |
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393 |
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394 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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395 { |
364
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396 //printf("address_write_part1: %X\n", address); |
362 | 397 context->selected_reg = address; |
398 context->selected_part = 0; | |
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399 } |
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400 |
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401 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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402 { |
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403 //printf("address_write_part2: %X\n", address); |
362 | 404 context->selected_reg = address; |
405 context->selected_part = 1; | |
406 } | |
407 | |
408 uint8_t fnum_to_keycode[] = { | |
409 //F11 = 0 | |
410 0,0,0,0,0,0,0,1, | |
411 //F11 = 1 | |
412 2,3,3,3,3,3,3,3 | |
413 }; | |
414 | |
415 //table courtesy of Nemesis | |
416 uint32_t detune_table[][4] = { | |
417 {0, 0, 1, 2}, //0 (0x00) | |
418 {0, 0, 1, 2}, //1 (0x01) | |
419 {0, 0, 1, 2}, //2 (0x02) | |
420 {0, 0, 1, 2}, //3 (0x03) | |
421 {0, 1, 2, 2}, //4 (0x04) | |
422 {0, 1, 2, 3}, //5 (0x05) | |
423 {0, 1, 2, 3}, //6 (0x06) | |
424 {0, 1, 2, 3}, //7 (0x07) | |
425 {0, 1, 2, 4}, //8 (0x08) | |
426 {0, 1, 3, 4}, //9 (0x09) | |
427 {0, 1, 3, 4}, //10 (0x0A) | |
428 {0, 1, 3, 5}, //11 (0x0B) | |
429 {0, 2, 4, 5}, //12 (0x0C) | |
430 {0, 2, 4, 6}, //13 (0x0D) | |
431 {0, 2, 4, 6}, //14 (0x0E) | |
432 {0, 2, 5, 7}, //15 (0x0F) | |
433 {0, 2, 5, 8}, //16 (0x10) | |
434 {0, 3, 6, 8}, //17 (0x11) | |
435 {0, 3, 6, 9}, //18 (0x12) | |
436 {0, 3, 7,10}, //19 (0x13) | |
437 {0, 4, 8,11}, //20 (0x14) | |
438 {0, 4, 8,12}, //21 (0x15) | |
439 {0, 4, 9,13}, //22 (0x16) | |
440 {0, 5,10,14}, //23 (0x17) | |
441 {0, 5,11,16}, //24 (0x18) | |
442 {0, 6,12,17}, //25 (0x19) | |
443 {0, 6,13,19}, //26 (0x1A) | |
444 {0, 7,14,20}, //27 (0x1B) | |
445 {0, 8,16,22}, //28 (0x1C) | |
446 {0, 8,16,22}, //29 (0x1D) | |
447 {0, 8,16,22}, //30 (0x1E) | |
448 {0, 8,16,22} | |
449 }; //31 (0x1F) | |
450 | |
451 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
452 { | |
453 uint32_t chan_num = op / 4; | |
454 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
455 //base frequency | |
456 ym_channel * channel = context->channels + chan_num; | |
383
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457 uint32_t inc, detune; |
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458 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
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459 inc = context->ch3_supp[op-2*4].fnum; |
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460 if (!context->ch3_supp[op-2*4].block) { |
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461 inc >>= 1; |
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462 } else { |
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463 inc <<= (context->ch3_supp[op-2*4].block-1); |
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464 } |
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465 //detune |
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466 detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; |
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467 } else { |
383
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468 inc = channel->fnum; |
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469 if (!channel->block) { |
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470 inc >>= 1; |
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471 } else { |
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472 inc <<= (channel->block-1); |
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473 } |
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474 //detune |
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475 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
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476 } |
362 | 477 if (operator->detune & 0x40) { |
478 inc -= detune; | |
479 //this can underflow, mask to 17-bit result | |
480 inc &= 0x1FFFF; | |
481 } else { | |
482 inc += detune; | |
483 } | |
484 //multiple | |
485 if (operator->multiple) { | |
486 inc *= operator->multiple; | |
487 } else { | |
488 //0.5 | |
489 inc >>= 1; | |
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490 } |
365
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491 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
364
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492 operator->phase_inc = inc; |
288
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493 } |
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494 |
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495 void ym_data_write(ym2612_context * context, uint8_t value) |
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496 { |
362 | 497 if (context->selected_reg < 0x21 || context->selected_reg > 0xB6 || (context->selected_reg < 0x30 && context->selected_part)) { |
498 return; | |
288
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499 } |
370
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500 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
362 | 501 if (context->selected_reg < 0x30) { |
502 //Shared regs | |
503 switch (context->selected_reg) | |
504 { | |
505 //TODO: Test reg and LFO | |
506 case REG_TIMERA_HIGH: | |
507 context->timer_a_load &= 0x3; | |
508 context->timer_a_load |= value << 2; | |
509 break; | |
510 case REG_TIMERA_LOW: | |
511 context->timer_a_load &= 0xFFFC; | |
512 context->timer_a_load |= value & 0x3; | |
513 break; | |
514 case REG_TIMERB: | |
515 context->timer_b_load = value; | |
516 break; | |
383
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517 case REG_TIME_CTRL: { |
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518 context->timer_control = value & 0x3F; |
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519 uint8_t old_mode = context->ch3_mode; |
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520 context->ch3_mode = value & 0xC0; |
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521 if (context->ch3_mode != old_mode) { |
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522 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
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523 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
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524 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
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525 } |
362 | 526 break; |
383
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527 } |
362 | 528 case REG_KEY_ONOFF: { |
529 uint8_t channel = value & 0x7; | |
530 if (channel < NUM_CHANNELS) { | |
531 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { | |
532 if (value & bit) { | |
370
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533 first_key_on = 1; |
362 | 534 //printf("Key On for operator %d in channel %d\n", op, channel); |
535 context->operators[op].phase_counter = 0; | |
536 context->operators[op].env_phase = PHASE_ATTACK; | |
537 context->operators[op].envelope = MAX_ENVELOPE; | |
538 } else { | |
539 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
540 context->operators[op].env_phase = PHASE_RELEASE; | |
541 } | |
542 } | |
543 } | |
544 break; | |
545 } | |
546 case REG_DAC: | |
547 if (context->dac_enable) { | |
548 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
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549 //printf("DAC Write %X(%d)\n", value, context->channels[5].output); |
362 | 550 } |
551 break; | |
552 case REG_DAC_ENABLE: | |
364
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553 //printf("DAC Enable: %X\n", value); |
362 | 554 context->dac_enable = value & 0x80; |
555 break; | |
556 } | |
557 } else if (context->selected_reg < 0xA0) { | |
558 //part | |
559 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
560 //channel in part | |
561 if ((context->selected_reg & 0x3) != 0x3) { | |
370
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562 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
362 | 563 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
564 ym_operator * operator = context->operators + op; | |
565 switch (context->selected_reg & 0xF0) | |
566 { | |
567 case REG_DETUNE_MULT: | |
568 operator->detune = value >> 4 & 0x7; | |
569 operator->multiple = value & 0xF; | |
570 ym_update_phase_inc(context, operator, op); | |
571 break; | |
572 case REG_TOTAL_LEVEL: | |
573 operator->total_level = (value & 0x7F) << 5; | |
574 break; | |
575 case REG_ATTACK_KS: | |
376 | 576 operator->key_scaling = 3 - (value >> 6); |
362 | 577 operator->rates[PHASE_ATTACK] = value & 0x1F; |
578 break; | |
579 case REG_DECAY_AM: | |
580 //TODO: AM flag for LFO | |
581 operator->rates[PHASE_DECAY] = value & 0x1F; | |
582 break; | |
583 case REG_SUSTAIN_RATE: | |
584 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
585 break; | |
586 case REG_S_LVL_R_RATE: | |
587 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
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588 operator->sustain_level = (value & 0xF0) << 4; |
362 | 589 break; |
590 } | |
591 } | |
592 } else { | |
593 uint8_t channel = context->selected_reg & 0x3; | |
594 if (channel != 3) { | |
595 if (context->selected_part) { | |
596 channel += 3; | |
597 } | |
598 //printf("write targets channel %d\n", channel); | |
599 switch (context->selected_reg & 0xFC) | |
600 { | |
601 case REG_FNUM_LOW: | |
602 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
603 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
604 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
605 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
606 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
607 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
608 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
609 break; | |
610 case REG_BLOCK_FNUM_H:{ | |
611 context->channels[channel].block_fnum_latch = value; | |
612 break; | |
613 } | |
383
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614 case REG_FNUM_LOW_CH3: |
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615 if (channel < 3) { |
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616 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
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617 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
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618 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
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619 if (context->ch3_mode) { |
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620 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
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621 } |
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622 } |
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623 break; |
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624 case REG_BLOCK_FN_CH3: |
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625 if (channel < 3) { |
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626 context->ch3_supp[channel].block_fnum_latch = value; |
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627 } |
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628 break; |
362 | 629 case REG_ALG_FEEDBACK: |
630 context->channels[channel].algorithm = value & 0x7; | |
631 context->channels[channel].feedback = value >> 3 & 0x7; | |
632 break; | |
633 case REG_LR_AMS_PMS: | |
634 context->channels[channel].pms = value & 0x7; | |
635 context->channels[channel].ams = value >> 4 & 0x3; | |
636 context->channels[channel].lr = value & 0xC0; | |
369
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637 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
362 | 638 break; |
639 } | |
640 } | |
641 } | |
642 | |
643 context->write_cycle = context->current_cycle; | |
374 | 644 context->status |= 0x80; |
288
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645 } |
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646 |
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647 uint8_t ym_read_status(ym2612_context * context) |
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648 { |
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649 return context->status; |
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650 } |
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651 |