Mercurial > repos > blastem
annotate backend.c @ 1149:6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
author | Michael Pavone <pavone@retrodev.com> |
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date | Wed, 04 Jan 2017 20:43:22 -0800 |
parents | 5c8b1c33ca10 |
children | b27d7bf1107e |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "backend.h" |
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7 #include <stdlib.h> |
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8 |
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9 deferred_addr * defer_address(deferred_addr * old_head, uint32_t address, uint8_t *dest) |
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10 { |
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11 deferred_addr * new_head = malloc(sizeof(deferred_addr)); |
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12 new_head->next = old_head; |
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13 new_head->address = address & 0xFFFFFF; |
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14 new_head->dest = dest; |
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15 return new_head; |
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16 } |
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17 |
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18 void remove_deferred_until(deferred_addr **head_ptr, deferred_addr * remove_to) |
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19 { |
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20 for(deferred_addr *cur = *head_ptr; cur && cur != remove_to; cur = *head_ptr) |
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21 { |
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22 *head_ptr = cur->next; |
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23 free(cur); |
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24 } |
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25 } |
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26 |
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27 void process_deferred(deferred_addr ** head_ptr, void * context, native_addr_func get_native) |
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28 { |
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29 deferred_addr * cur = *head_ptr; |
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30 deferred_addr **last_next = head_ptr; |
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31 while(cur) |
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32 { |
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33 code_ptr native = get_native(context, cur->address);//get_native_address(opts->native_code_map, cur->address); |
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34 if (native) { |
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35 int32_t disp = native - (cur->dest + 4); |
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36 code_ptr out = cur->dest; |
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37 *(out++) = disp; |
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38 disp >>= 8; |
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39 *(out++) = disp; |
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40 disp >>= 8; |
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41 *(out++) = disp; |
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42 disp >>= 8; |
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43 *out = disp; |
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44 *last_next = cur->next; |
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45 free(cur); |
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46 cur = *last_next; |
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47 } else { |
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48 last_next = &(cur->next); |
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49 cur = cur->next; |
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50 } |
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51 } |
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52 } |
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53 |
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54 memmap_chunk const *find_map_chunk(uint32_t address, cpu_options *opts, uint16_t flags, uint32_t *size_sum) |
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55 { |
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56 if (size_sum) { |
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57 *size_sum = 0; |
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58 } |
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59 address &= opts->address_mask; |
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60 for (memmap_chunk const *cur = opts->memmap, *end = opts->memmap + opts->memmap_chunks; cur != end; cur++) |
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61 { |
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62 if (address >= cur->start && address < cur->end) { |
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63 return cur; |
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64 } else if (size_sum && (cur->flags & flags) == flags) { |
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65 *size_sum += chunk_size(opts, cur); |
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66 } |
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67 } |
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68 return NULL; |
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69 } |
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70 |
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71 void * get_native_pointer(uint32_t address, void ** mem_pointers, cpu_options * opts) |
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72 { |
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73 memmap_chunk const * memmap = opts->memmap; |
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74 address &= opts->address_mask; |
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75 for (uint32_t chunk = 0; chunk < opts->memmap_chunks; chunk++) |
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76 { |
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77 if (address >= memmap[chunk].start && address < memmap[chunk].end) { |
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78 if (!(memmap[chunk].flags & MMAP_READ)) { |
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79 return NULL; |
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80 } |
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81 uint8_t * base = memmap[chunk].flags & MMAP_PTR_IDX |
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82 ? mem_pointers[memmap[chunk].ptr_index] |
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83 : memmap[chunk].buffer; |
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84 if (!base) { |
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85 if (memmap[chunk].flags & MMAP_AUX_BUFF) { |
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86 return memmap[chunk].buffer + (address & memmap[chunk].aux_mask); |
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87 } |
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88 return NULL; |
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89 } |
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90 return base + (address & memmap[chunk].mask); |
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91 } |
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92 } |
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93 return NULL; |
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94 } |
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95 |
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96 uint32_t chunk_size(cpu_options *opts, memmap_chunk const *chunk) |
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97 { |
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98 if (chunk->mask == opts->address_mask) { |
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99 return chunk->end - chunk->start; |
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100 } else { |
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101 return chunk->mask + 1; |
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102 } |
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103 } |
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104 |
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105 uint32_t ram_size(cpu_options *opts) |
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106 { |
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107 uint32_t size = 0; |
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108 for (int i = 0; i < opts->memmap_chunks; i++) |
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109 { |
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Invalidate translated code on a cartridge bank change in SMS mode. Fix handling of bank 0
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parents:
1130
diff
changeset
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110 if (opts->memmap[i].flags & MMAP_CODE) { |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
111 if (opts->memmap[i].mask == opts->address_mask) { |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
112 size += opts->memmap[i].end - opts->memmap[i].start; |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
113 } else { |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
114 size += opts->memmap[i].mask + 1; |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
115 } |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
116 } |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
117 } |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
118 return size; |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
119 } |