Mercurial > repos > blastem
annotate blastem.c @ 260:625f8e4d5fd2
Initial stab at integartiong Z80 core
author | Mike Pavone <pavone@retrodev.com> |
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date | Tue, 30 Apr 2013 00:39:31 -0700 |
parents | 2b1c2c28b261 |
children | 2989ed7b8608 |
rev | line source |
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1 #include "68kinst.h" |
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2 #include "m68k_to_x86.h" |
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3 #include "z80_to_x86.h" |
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4 #include "mem.h" |
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5 #include "vdp.h" |
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6 #include "render.h" |
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7 #include "blastem.h" |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include <string.h> |
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11 |
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12 #define CARTRIDGE_WORDS 0x200000 |
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13 #define RAM_WORDS 32 * 1024 |
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14 #define Z80_RAM_BYTES 8 * 1024 |
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15 #define MCLKS_PER_68K 7 |
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16 #define MCLKS_PER_Z80 15 |
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17 //TODO: Figure out the exact value for this |
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18 #define MCLKS_PER_FRAME (MCLKS_LINE*262) |
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19 #define CYCLE_NEVER 0xFFFFFFFF |
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20 |
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21 uint16_t cart[CARTRIDGE_WORDS]; |
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22 uint16_t ram[RAM_WORDS]; |
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23 uint8_t z80_ram[Z80_RAM_BYTES]; |
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24 |
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25 io_port gamepad_1; |
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26 io_port gamepad_2; |
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27 |
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28 int headless = 0; |
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29 |
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30 #ifndef MIN |
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31 #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
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32 #endif |
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33 |
166 | 34 #define SMD_HEADER_SIZE 512 |
35 #define SMD_MAGIC1 0x03 | |
36 #define SMD_MAGIC2 0xAA | |
37 #define SMD_MAGIC3 0xBB | |
38 #define SMD_BLOCK_SIZE 0x4000 | |
39 | |
40 int load_smd_rom(long filesize, FILE * f) | |
41 { | |
42 uint8_t block[SMD_BLOCK_SIZE]; | |
43 filesize -= SMD_HEADER_SIZE; | |
44 fseek(f, SMD_HEADER_SIZE, SEEK_SET); | |
45 | |
46 uint16_t * dst = cart; | |
47 while (filesize > 0) { | |
48 fread(block, 1, SMD_BLOCK_SIZE, f); | |
49 for (uint8_t *low = block, *high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) { | |
50 *(dst++) = *high << 8 | *low; | |
51 } | |
52 filesize -= SMD_BLOCK_SIZE; | |
53 } | |
54 return 1; | |
55 } | |
56 | |
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57 int load_rom(char * filename) |
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58 { |
166 | 59 uint8_t header[10]; |
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60 FILE * f = fopen(filename, "rb"); |
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61 if (!f) { |
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62 return 0; |
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63 } |
166 | 64 fread(header, 1, sizeof(header), f); |
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65 fseek(f, 0, SEEK_END); |
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66 long filesize = ftell(f); |
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67 if (filesize/2 > CARTRIDGE_WORDS) { |
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68 //carts bigger than 4MB not currently supported |
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69 filesize = CARTRIDGE_WORDS*2; |
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70 } |
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71 fseek(f, 0, SEEK_SET); |
166 | 72 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) { |
73 int i; | |
74 for (i = 3; i < 8; i++) { | |
75 if (header[i] != 0) { | |
76 break; | |
77 } | |
78 } | |
79 if (i == 8) { | |
80 if (header[2]) { | |
81 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename); | |
82 exit(1); | |
83 } | |
84 return load_smd_rom(filesize, f); | |
85 } | |
86 } | |
87 fread(cart, 2, filesize/2, f); | |
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88 fclose(f); |
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89 for(unsigned short * cur = cart; cur - cart < (filesize/2); ++cur) |
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90 { |
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91 *cur = (*cur >> 8) | (*cur << 8); |
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92 } |
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93 //TODO: Mirror ROM |
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94 return 1; |
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95 } |
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96 |
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97 uint16_t read_dma_value(uint32_t address) |
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98 { |
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99 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2 |
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100 if (address < 0x200000) { |
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101 return cart[address]; |
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102 } else if(address >= 0x700000) { |
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103 return ram[address & 0x7FFF]; |
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104 } |
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105 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area |
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106 return 0; |
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107 } |
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108 |
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109 #define VINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_68K) |
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110 #define ZVINT_CYCLE ((MCLKS_LINE * 226)/MCLKS_PER_Z80) |
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111 |
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112 void adjust_int_cycle(m68k_context * context, vdp_context * v_context) |
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113 { |
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114 if (!(v_context->regs[REG_MODE_2] & 0x20 && ((context->status & 0x7) < 6)) || context->current_cycle >= VINT_CYCLE) { |
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115 context->int_cycle = CYCLE_NEVER; |
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116 context->target_cycle = context->sync_cycle; |
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117 } else if (context->int_cycle > VINT_CYCLE) { |
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118 context->int_cycle = VINT_CYCLE; |
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119 context->int_num = 6; |
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120 if (context->int_cycle < context->sync_cycle) { |
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121 context->target_cycle = context->int_cycle; |
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122 } |
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123 } |
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124 } |
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125 |
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126 int break_on_sync = 0; |
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127 #define Z80_ACK_DELAY 3 //TODO: Calculate this on the fly based on how synced up the Z80 and 68K clocks are |
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128 |
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129 uint8_t reset = 1; |
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130 uint8_t need_reset = 0; |
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131 uint8_t busreq = 0; |
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132 uint8_t busack = 0; |
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133 uint32_t busack_cycle = CYCLE_NEVER; |
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134 uint8_t new_busack = 0; |
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135 |
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136 m68k_context * sync_components(m68k_context * context, uint32_t address) |
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137 { |
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138 //TODO: Handle sync targets smaller than a single frame |
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139 z80_context * z_context = context->next_context; |
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140 vdp_context * v_context = z_context->next_context; |
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141 uint32_t mclks = context->current_cycle * MCLKS_PER_68K; |
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142 if (!reset && !busreq) { |
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143 if (need_reset) { |
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144 z80_reset(z_context); |
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145 need_reset = 0; |
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146 } |
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147 z_context->sync_cycle = mclks / MCLKS_PER_Z80; |
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148 while (z_context->current_cycle < z_context->sync_cycle) { |
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149 if (z_context->iff1 && z_context->current_cycle < ZVINT_CYCLE) { |
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150 z_context->int_cycle = ZVINT_CYCLE; |
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151 } |
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152 z_context->target_cycle = z_context->sync_cycle < z_context->int_cycle ? z_context->sync_cycle : z_context->int_cycle; |
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153 z80_run(z_context); |
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154 } |
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155 } |
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156 if (mclks >= MCLKS_PER_FRAME) { |
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157 //printf("reached frame end | 68K Cycles: %d, MCLK Cycles: %d\n", context->current_cycle, mclks); |
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158 vdp_run_context(v_context, MCLKS_PER_FRAME); |
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159 if (!headless) { |
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160 break_on_sync |= wait_render_frame(v_context); |
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161 } |
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162 mclks -= MCLKS_PER_FRAME; |
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163 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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164 io_adjust_cycles(&gamepad_1, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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165 io_adjust_cycles(&gamepad_2, context->current_cycle, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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166 context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_68K; |
260
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167 if (z_context->current_cycle >= MCLKS_PER_FRAME/MCLKS_PER_Z80) { |
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168 z_context->current_cycle -= MCLKS_PER_FRAME/MCLKS_PER_Z80; |
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169 } else { |
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170 z_context->current_cycle = 0; |
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171 } |
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172 if (mclks) { |
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173 vdp_run_context(v_context, mclks); |
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174 } |
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175 } else { |
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176 //printf("running VDP for %d cycles\n", mclks - v_context->cycles); |
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177 vdp_run_context(v_context, mclks); |
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178 } |
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179 adjust_int_cycle(context, v_context); |
198
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180 if (break_on_sync && address) { |
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181 break_on_sync = 0; |
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182 debugger(context, address); |
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183 } |
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184 return context; |
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185 } |
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186 |
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187 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value) |
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188 { |
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189 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle); |
198
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190 sync_components(context, 0); |
260
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191 z80_context * z_context = context->next_context; |
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192 vdp_context * v_context = z_context->next_context; |
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193 if (vdp_port < 0x10) { |
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194 int blocked; |
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195 if (vdp_port < 4) { |
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196 while (vdp_data_port_write(v_context, value) < 0) { |
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197 while(v_context->flags & FLAG_DMA_RUN) { |
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198 vdp_run_dma_done(v_context, MCLKS_PER_FRAME); |
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199 if (v_context->cycles >= MCLKS_PER_FRAME) { |
215
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200 if (!headless) { |
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201 wait_render_frame(v_context); |
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202 } |
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203 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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204 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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205 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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206 } |
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207 } |
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208 context->current_cycle = v_context->cycles / MCLKS_PER_68K; |
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209 } |
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210 } else if(vdp_port < 8) { |
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211 blocked = vdp_control_port_write(v_context, value); |
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212 if (blocked) { |
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213 while (blocked) { |
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214 while(v_context->flags & FLAG_DMA_RUN) { |
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215 vdp_run_dma_done(v_context, MCLKS_PER_FRAME); |
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216 if (v_context->cycles >= MCLKS_PER_FRAME) { |
215
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217 if (!headless) { |
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218 wait_render_frame(v_context); |
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219 } |
149
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220 vdp_adjust_cycles(v_context, MCLKS_PER_FRAME); |
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221 io_adjust_cycles(&gamepad_1, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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222 io_adjust_cycles(&gamepad_2, v_context->cycles/MCLKS_PER_68K, MCLKS_PER_FRAME/MCLKS_PER_68K); |
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223 } |
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224 } |
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225 if (blocked < 0) { |
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226 blocked = vdp_control_port_write(v_context, value); |
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227 } else { |
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228 blocked = 0; |
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229 } |
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230 } |
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231 context->current_cycle = v_context->cycles / MCLKS_PER_68K; |
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232 } else { |
186
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233 adjust_int_cycle(context, v_context); |
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234 } |
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235 } else { |
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236 printf("Illegal write to HV Counter port %X\n", vdp_port); |
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237 exit(1); |
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238 } |
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239 context->current_cycle = v_context->cycles/MCLKS_PER_68K; |
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240 } else if (vdp_port < 0x18) { |
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241 //TODO: Implement PSG |
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242 } else { |
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243 //TODO: Implement undocumented test register(s) |
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244 } |
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245 return context; |
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246 } |
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247 |
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248 m68k_context * vdp_port_read(uint32_t vdp_port, m68k_context * context) |
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249 { |
198
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250 sync_components(context, 0); |
260
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251 z80_context * z_context = context->next_context; |
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252 vdp_context * v_context = z_context->next_context; |
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253 if (vdp_port < 0x10) { |
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254 if (vdp_port < 4) { |
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255 context->value = vdp_data_port_read(v_context); |
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256 } else if(vdp_port < 8) { |
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257 context->value = vdp_control_port_read(v_context); |
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258 } else { |
137 | 259 context->value = vdp_hv_counter_read(v_context); |
260 //printf("HV Counter: %X at cycle %d\n", context->value, v_context->cycles); | |
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261 } |
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262 context->current_cycle = v_context->cycles/MCLKS_PER_68K; |
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263 } else { |
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264 printf("Illegal read from PSG or test register port %X\n", vdp_port); |
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265 exit(1); |
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266 } |
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267 return context; |
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268 } |
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269 |
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270 #define TH 0x40 |
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271 #define TH_TIMEOUT 8000 |
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272 |
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273 void io_adjust_cycles(io_port * pad, uint32_t current_cycle, uint32_t deduction) |
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274 { |
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275 /*uint8_t control = pad->control | 0x80; |
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276 uint8_t th = control & pad->output; |
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277 if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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278 printf("adjust_cycles | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, current_cycle); |
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279 }*/ |
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280 if (current_cycle >= pad->timeout_cycle) { |
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281 pad->th_counter = 0; |
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282 } else { |
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283 pad->timeout_cycle -= deduction; |
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284 } |
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285 if (busack_cycle < CYCLE_NEVER && current_cycle < busack_cycle) { |
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286 busack_cycle -= deduction; |
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287 } |
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288 } |
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289 |
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290 void io_data_write(io_port * pad, m68k_context * context, uint8_t value) |
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291 { |
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292 if (pad->control & TH) { |
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293 //check if TH has changed |
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294 if ((pad->output & TH) ^ (value & TH)) { |
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295 if (context->current_cycle >= pad->timeout_cycle) { |
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296 pad->th_counter = 0; |
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297 } |
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298 if (!(value & TH)) { |
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299 pad->th_counter++; |
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300 } |
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301 pad->timeout_cycle = context->current_cycle + TH_TIMEOUT; |
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302 } |
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303 } |
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304 pad->output = value; |
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305 } |
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306 |
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307 void io_data_read(io_port * pad, m68k_context * context) |
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308 { |
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309 uint8_t control = pad->control | 0x80; |
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310 uint8_t th = control & pad->output; |
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311 uint8_t input; |
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312 if (context->current_cycle >= pad->timeout_cycle) { |
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313 pad->th_counter = 0; |
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314 } |
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315 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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316 printf("io_data_read | control: %X, TH: %X, GAMEPAD_TH0: %X, GAMEPAD_TH1: %X, TH Counter: %d, Timeout: %d, Cycle: %d\n", control, th, pad->input[GAMEPAD_TH0], pad->input[GAMEPAD_TH1], pad->th_counter,pad->timeout_cycle, context->current_cycle); |
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317 }*/ |
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318 if (th) { |
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319 if (pad->th_counter == 3) { |
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320 input = pad->input[GAMEPAD_EXTRA]; |
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321 } else { |
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322 input = pad->input[GAMEPAD_TH1]; |
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323 } |
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324 } else { |
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325 if (pad->th_counter == 3) { |
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326 input = pad->input[GAMEPAD_TH0] | 0xF; |
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327 } else if(pad->th_counter == 4) { |
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328 input = pad->input[GAMEPAD_TH0] & 0x30; |
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329 } else { |
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330 input = pad->input[GAMEPAD_TH0] | 0xC; |
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331 } |
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332 } |
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333 context->value = ((~input) & (~control)) | (pad->output & control); |
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334 /*if (pad->input[GAMEPAD_TH0] || pad->input[GAMEPAD_TH1]) { |
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335 printf ("value: %X\n", context->value); |
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336 }*/ |
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337 } |
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338 |
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339 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value) |
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340 { |
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341 if (location < 0x10000) { |
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342 if (busack_cycle > context->current_cycle) { |
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343 busack = new_busack; |
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344 busack_cycle = CYCLE_NEVER; |
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345 } |
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346 if (!(busack || reset)) { |
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347 location &= 0x7FFF; |
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348 if (location < 0x4000) { |
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349 z80_ram[location & 0x1FFF] = value; |
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350 } |
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351 } |
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352 } else { |
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353 location &= 0x1FFF; |
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354 if (location < 0x100) { |
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355 switch(location/2) |
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356 { |
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357 case 0x1: |
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358 io_data_write(&gamepad_1, context, value); |
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359 break; |
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360 case 0x2: |
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361 io_data_write(&gamepad_2, context, value); |
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362 break; |
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363 case 0x3://PORT C Data |
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364 break; |
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365 case 0x4: |
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366 gamepad_1.control = value; |
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367 break; |
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368 case 0x5: |
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369 gamepad_2.control = value; |
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370 break; |
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371 } |
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372 } else { |
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373 if (location == 0x1100) { |
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374 if (busack_cycle > context->current_cycle) { |
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375 busack = new_busack; |
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376 busack_cycle = CYCLE_NEVER; |
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377 } |
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378 if (value & 1) { |
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379 busreq = 1; |
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380 if(!reset) { |
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381 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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382 new_busack = 0; |
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383 } |
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384 } else { |
260
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385 if (busreq) { |
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386 z80_context * z_context = context->next_context; |
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387 //TODO: Add necessary delay between release of busreq and resumption of execution |
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388 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80; |
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389 } |
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390 busreq = 0; |
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391 busack_cycle = CYCLE_NEVER; |
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392 busack = 1; |
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393 } |
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394 } else if (location == 0x1200) { |
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395 if (value & 1) { |
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396 if (reset && busreq) { |
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397 new_busack = 0; |
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398 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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399 } |
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400 //TODO: Deal with the scenario in which reset is not asserted long enough |
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401 if (reset) { |
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402 z80_context * z_context = context->next_context; |
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403 need_reset = 1; |
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404 //TODO: Add necessary delay between release of reset and start of execution |
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405 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80; |
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406 } |
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407 reset = 0; |
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408 } else { |
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409 reset = 1; |
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410 } |
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411 } |
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412 } |
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413 } |
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414 return context; |
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415 } |
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416 |
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417 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value) |
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418 { |
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419 if (location < 0x10000) { |
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420 if (busack_cycle > context->current_cycle) { |
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421 busack = new_busack; |
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422 busack_cycle = CYCLE_NEVER; |
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423 } |
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424 if (!(busack || reset)) { |
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425 location &= 0x7FFF; |
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426 if (location < 0x4000) { |
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427 z80_ram[location & 0x1FFE] = value >> 8; |
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428 } |
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429 } |
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430 } else { |
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431 location &= 0x1FFF; |
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432 if (location < 0x100) { |
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433 switch(location/2) |
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434 { |
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435 case 0x1: |
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436 io_data_write(&gamepad_1, context, value); |
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437 break; |
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438 case 0x2: |
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439 io_data_write(&gamepad_2, context, value); |
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440 break; |
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441 case 0x3://PORT C Data |
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442 break; |
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443 case 0x4: |
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444 gamepad_1.control = value; |
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445 break; |
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446 case 0x5: |
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447 gamepad_2.control = value; |
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448 break; |
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449 } |
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450 } else { |
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451 //printf("IO Write of %X to %X @ %d\n", value, location, context->current_cycle); |
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452 if (location == 0x1100) { |
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453 if (busack_cycle > context->current_cycle) { |
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454 busack = new_busack; |
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455 busack_cycle = CYCLE_NEVER; |
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456 } |
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457 if (value & 0x100) { |
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458 busreq = 1; |
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459 if(!reset) { |
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460 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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461 new_busack = 0; |
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462 } |
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463 } else { |
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464 if (busreq) { |
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465 z80_context * z_context = context->next_context; |
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466 //TODO: Add necessary delay between release of busreq and resumption of execution |
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467 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80; |
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468 } |
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469 busreq = 0; |
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470 busack_cycle = CYCLE_NEVER; |
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471 busack = 1; |
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472 } |
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473 } else if (location == 0x1200) { |
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474 if (value & 0x100) { |
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475 if (reset && busreq) { |
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476 new_busack = 0; |
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477 busack_cycle = context->current_cycle + Z80_ACK_DELAY; |
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478 } |
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479 //TODO: Deal with the scenario in which reset is not asserted long enough |
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480 if (reset) { |
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481 z80_context * z_context = context->next_context; |
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482 need_reset = 1; |
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483 //TODO: Add necessary delay between release of reset and start of execution |
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484 z_context->current_cycle = (context->current_cycle * MCLKS_PER_68K) / MCLKS_PER_Z80; |
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485 } |
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486 reset = 0; |
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487 } else { |
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488 reset = 1; |
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489 } |
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490 } |
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491 } |
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492 } |
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493 return context; |
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494 } |
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495 |
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496 #define USA 0x80 |
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497 #define JAP 0x00 |
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498 #define EUR 0xC0 |
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499 #define NO_DISK 0x20 |
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500 uint8_t version_reg = NO_DISK | USA; |
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501 |
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502 m68k_context * io_read(uint32_t location, m68k_context * context) |
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503 { |
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504 if (location < 0x10000) { |
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505 if (busack_cycle > context->current_cycle) { |
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506 busack = new_busack; |
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507 busack_cycle = CYCLE_NEVER; |
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508 } |
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509 if (!(busack || reset)) { |
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510 location &= 0x7FFF; |
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511 if (location < 0x4000) { |
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512 context->value = z80_ram[location & 0x1FFF]; |
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513 } else { |
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514 context->value = 0xFF; |
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515 } |
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516 } else { |
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517 context->value = 0xFF; |
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518 } |
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519 } else { |
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520 location &= 0x1FFF; |
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521 if (location < 0x100) { |
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522 switch(location/2) |
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523 { |
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524 case 0x0: |
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525 //version bits should be 0 for now since we're not emulating TMSS |
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526 //Not sure about the other bits |
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527 context->value = version_reg; |
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528 break; |
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529 case 0x1: |
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530 io_data_read(&gamepad_1, context); |
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531 break; |
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532 case 0x2: |
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533 io_data_read(&gamepad_2, context); |
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534 break; |
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535 case 0x3://PORT C Data |
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536 break; |
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|
537 case 0x4: |
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538 context->value = gamepad_1.control; |
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539 break; |
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540 case 0x5: |
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541 context->value = gamepad_2.control; |
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542 break; |
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543 } |
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544 } else { |
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545 if (location == 0x1100) { |
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546 if (busack_cycle > context->current_cycle) { |
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547 busack = new_busack; |
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548 busack_cycle = CYCLE_NEVER; |
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549 } |
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550 context->value = reset || busack; |
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551 //printf("Byte read of BUSREQ returned %d @ %d (reset: %d, busack: %d)\n", context->value, context->current_cycle, reset, busack); |
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552 } else if (location == 0x1200) { |
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|
553 context->value = !reset; |
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554 } else { |
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555 printf("Byte read of unknown IO location: %X\n", location); |
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556 } |
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|
557 } |
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558 } |
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|
559 return context; |
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|
560 } |
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561 |
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562 m68k_context * io_read_w(uint32_t location, m68k_context * context) |
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563 { |
153
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564 if (location < 0x10000) { |
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565 if (busack_cycle > context->current_cycle) { |
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566 busack = new_busack; |
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567 busack_cycle = CYCLE_NEVER; |
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568 } |
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569 if (!(busack || reset)) { |
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570 location &= 0x7FFF; |
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571 if (location < 0x4000) { |
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572 context->value = z80_ram[location & 0x1FFE]; |
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573 context->value |= context->value << 8; |
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574 } else { |
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|
575 context->value = 0xFFFF; |
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|
576 } |
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|
577 } else { |
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578 context->value = 0xFFFF; |
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|
579 } |
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580 } else { |
153
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diff
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|
581 location &= 0x1FFF; |
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|
582 if (location < 0x100) { |
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|
583 switch(location/2) |
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Mike Pavone <pavone@retrodev.com>
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|
584 { |
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585 case 0x0: |
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diff
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|
586 //version bits should be 0 for now since we're not emulating TMSS |
42c031184e8a
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|
587 //Not sure about the other bits |
42c031184e8a
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Mike Pavone <pavone@retrodev.com>
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|
588 context->value = 0; |
42c031184e8a
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diff
changeset
|
589 break; |
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Implement access to Z80 RAM
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diff
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|
590 case 0x1: |
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|
591 io_data_read(&gamepad_1, context); |
42c031184e8a
Implement access to Z80 RAM
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diff
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|
592 break; |
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diff
changeset
|
593 case 0x2: |
42c031184e8a
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|
594 io_data_read(&gamepad_2, context); |
42c031184e8a
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parents:
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diff
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|
595 break; |
42c031184e8a
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parents:
149
diff
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|
596 case 0x3://PORT C Data |
42c031184e8a
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149
diff
changeset
|
597 break; |
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diff
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|
598 case 0x4: |
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149
diff
changeset
|
599 context->value = gamepad_1.control; |
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parents:
149
diff
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|
600 break; |
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149
diff
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|
601 case 0x5: |
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parents:
149
diff
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|
602 context->value = gamepad_2.control; |
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Implement access to Z80 RAM
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parents:
149
diff
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|
603 break; |
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Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
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|
604 case 0x6: |
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Mike Pavone <pavone@retrodev.com>
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149
diff
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|
605 //PORT C Control |
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parents:
149
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|
606 context->value = 0; |
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|
607 break; |
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|
608 } |
153
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|
609 context->value = context->value | (context->value << 8); |
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610 //printf("Word read to %X returned %d\n", location, context->value); |
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|
611 } else { |
153
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612 if (location == 0x1100) { |
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|
613 if (busack_cycle > context->current_cycle) { |
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|
614 busack = new_busack; |
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|
615 busack_cycle = CYCLE_NEVER; |
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|
616 } |
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|
617 context->value = (reset || busack) << 8; |
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618 //printf("Word read of BUSREQ returned %d\n", context->value); |
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619 } else if (location == 0x1200) { |
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620 context->value = (!reset) << 8; |
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|
621 } else { |
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|
622 printf("Word read of unknown IO location: %X\n", location); |
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623 } |
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|
624 } |
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|
625 } |
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|
626 return context; |
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diff
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|
627 } |
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|
628 |
184
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|
629 typedef struct bp_def { |
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630 struct bp_def * next; |
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631 uint32_t address; |
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632 uint32_t index; |
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633 } bp_def; |
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634 |
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635 bp_def * breakpoints = NULL; |
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changeset
|
636 uint32_t bp_index = 0; |
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637 |
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|
638 bp_def ** find_breakpoint(bp_def ** cur, uint32_t address) |
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639 { |
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640 while (*cur) { |
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641 if ((*cur)->address == address) { |
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642 break; |
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643 } |
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644 cur = &((*cur)->next); |
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645 } |
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646 return cur; |
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647 } |
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648 |
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649 bp_def ** find_breakpoint_idx(bp_def ** cur, uint32_t index) |
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650 { |
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651 while (*cur) { |
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652 if ((*cur)->index == index) { |
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653 break; |
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654 } |
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655 cur = &((*cur)->next); |
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656 } |
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657 return cur; |
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658 } |
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659 |
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660 char * find_param(char * buf) |
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661 { |
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662 for (; *buf; buf++) { |
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663 if (*buf == ' ') { |
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664 if (*(buf+1)) { |
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665 return buf+1; |
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666 } |
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667 } |
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668 } |
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669 return NULL; |
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670 } |
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671 |
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672 void strip_nl(char * buf) |
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673 { |
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674 for(; *buf; buf++) { |
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675 if (*buf == '\n') { |
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676 *buf = 0; |
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677 return; |
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678 } |
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679 } |
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680 } |
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681 |
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682 m68k_context * debugger(m68k_context * context, uint32_t address) |
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683 { |
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684 static char last_cmd[1024]; |
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685 char input_buf[1024]; |
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686 static uint32_t branch_t; |
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687 static uint32_t branch_f; |
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688 m68kinst inst; |
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689 //probably not necessary, but let's play it safe |
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690 address &= 0xFFFFFF; |
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691 if (address == branch_t) { |
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692 bp_def ** f_bp = find_breakpoint(&breakpoints, branch_f); |
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693 if (!*f_bp) { |
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694 remove_breakpoint(context, branch_f); |
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695 } |
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696 branch_t = branch_f = 0; |
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697 } else if(address == branch_f) { |
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698 bp_def ** t_bp = find_breakpoint(&breakpoints, branch_t); |
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699 if (!*t_bp) { |
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700 remove_breakpoint(context, branch_t); |
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701 } |
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702 branch_t = branch_f = 0; |
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703 } |
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704 //Check if this is a user set breakpoint, or just a temporary one |
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705 bp_def ** this_bp = find_breakpoint(&breakpoints, address); |
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706 if (*this_bp) { |
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707 printf("Breakpoint %d hit\n", (*this_bp)->index); |
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708 } else { |
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709 remove_breakpoint(context, address); |
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710 } |
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711 uint16_t * pc; |
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712 if (address < 0x400000) { |
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713 pc = cart + address/2; |
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714 } else if(address > 0xE00000) { |
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715 pc = ram + (address & 0xFFFF)/2; |
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716 } else { |
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717 fprintf(stderr, "Entered debugger at address %X\n", address); |
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718 exit(1); |
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719 } |
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Fix a bunch of bugs in the CPU core, add a 68K debugger
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720 uint16_t * after_pc = m68k_decode(pc, &inst, address); |
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721 m68k_disasm(&inst, input_buf); |
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722 printf("%X: %s\n", address, input_buf); |
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723 uint32_t after = address + (after_pc-pc)*2; |
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724 int debugging = 1; |
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725 while (debugging) { |
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726 fputs(">", stdout); |
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727 if (!fgets(input_buf, sizeof(input_buf), stdin)) { |
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728 fputs("fgets failed", stderr); |
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729 break; |
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730 } |
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|
731 strip_nl(input_buf); |
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732 //hitting enter repeats last command |
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|
733 if (input_buf[0]) { |
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734 strcpy(last_cmd, input_buf); |
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735 } else { |
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736 strcpy(input_buf, last_cmd); |
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737 } |
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738 char * param; |
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739 char format[8]; |
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|
740 uint32_t value; |
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741 bp_def * new_bp; |
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742 switch(input_buf[0]) |
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|
743 { |
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|
744 case 'c': |
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|
745 puts("Continuing"); |
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|
746 debugging = 0; |
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|
747 break; |
ebcbdd1c4cc8
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|
748 case 'b': |
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|
749 param = find_param(input_buf); |
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|
750 if (!param) { |
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|
751 fputs("b command requires a parameter\n", stderr); |
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|
752 break; |
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753 } |
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754 value = strtol(param, NULL, 16); |
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755 insert_breakpoint(context, value, (uint8_t *)debugger); |
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756 new_bp = malloc(sizeof(bp_def)); |
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757 new_bp->next = breakpoints; |
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758 new_bp->address = value; |
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759 new_bp->index = bp_index++; |
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760 breakpoints = new_bp; |
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761 printf("Breakpoint %d set at %X\n", new_bp->index, value); |
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762 break; |
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763 case 'a': |
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764 param = find_param(input_buf); |
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765 if (!param) { |
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766 fputs("a command requires a parameter\n", stderr); |
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767 break; |
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768 } |
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769 value = strtol(param, NULL, 16); |
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770 insert_breakpoint(context, value, (uint8_t *)debugger); |
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771 debugging = 0; |
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772 break; |
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773 case 'd': |
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774 param = find_param(input_buf); |
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775 if (!param) { |
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776 fputs("b command requires a parameter\n", stderr); |
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777 break; |
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778 } |
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779 value = atoi(param); |
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780 this_bp = find_breakpoint_idx(&breakpoints, value); |
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781 if (!*this_bp) { |
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782 fprintf(stderr, "Breakpoint %d does not exist\n", value); |
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783 break; |
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784 } |
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785 new_bp = *this_bp; |
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786 *this_bp = (*this_bp)->next; |
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787 free(new_bp); |
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788 break; |
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789 case 'p': |
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790 strcpy(format, "%s: %d\n"); |
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791 if (input_buf[1] == '/') { |
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792 switch (input_buf[2]) |
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793 { |
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794 case 'x': |
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795 case 'X': |
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796 case 'd': |
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797 case 'c': |
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798 format[5] = input_buf[2]; |
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799 break; |
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800 default: |
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801 fprintf(stderr, "Unrecognized format character: %c\n", input_buf[2]); |
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802 } |
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803 } |
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804 param = find_param(input_buf); |
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805 if (!param) { |
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806 fputs("p command requires a parameter\n", stderr); |
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807 break; |
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808 } |
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809 if (param[0] == 'd' && param[1] >= '0' && param[1] <= '7') { |
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810 value = context->dregs[param[1]-'0']; |
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811 } else if (param[0] == 'a' && param[1] >= '0' && param[1] <= '7') { |
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812 value = context->aregs[param[1]-'0']; |
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813 } else if (param[0] == 'S' && param[1] == 'R') { |
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814 value = (context->status << 8); |
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815 for (int flag = 0; flag < 5; flag++) { |
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816 value |= context->flags[flag] << (4-flag); |
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817 } |
185
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818 } else if(param[0] == 'c') { |
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819 value = context->current_cycle; |
184
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820 } else if (param[0] == '0' && param[1] == 'x') { |
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821 uint32_t p_addr = strtol(param+2, NULL, 16); |
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822 value = read_dma_value(p_addr/2); |
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823 } else { |
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824 fprintf(stderr, "Unrecognized parameter to p: %s\n", param); |
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825 break; |
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826 } |
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827 printf(format, param, value); |
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828 break; |
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829 case 'n': |
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830 //TODO: Deal with jmp, dbcc, rtr and rte |
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831 if (inst.op == M68K_RTS) { |
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832 after = (read_dma_value(context->aregs[7]/2) << 16) | read_dma_value(context->aregs[7]/2 + 1); |
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833 } else if(inst.op == M68K_BCC && inst.extra.cond != COND_FALSE) { |
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834 if (inst.extra.cond = COND_TRUE) { |
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835 after = inst.address + 2 + inst.src.params.immed; |
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836 } else { |
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837 branch_f = after; |
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838 branch_t = inst.address + 2 + inst.src.params.immed; |
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839 insert_breakpoint(context, branch_t, (uint8_t *)debugger); |
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840 } |
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841 } |
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842 insert_breakpoint(context, after, (uint8_t *)debugger); |
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843 debugging = 0; |
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844 break; |
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845 case 'q': |
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846 puts("Quitting"); |
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847 exit(0); |
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848 break; |
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849 default: |
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850 fprintf(stderr, "Unrecognized debugger command %s\n", input_buf); |
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851 break; |
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852 } |
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853 } |
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|
854 return context; |
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855 } |
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856 |
260
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857 void init_run_cpu(z80_context * zcontext, int debug, FILE * address_log) |
211 | 858 { |
859 m68k_context context; | |
860 x86_68k_options opts; | |
861 init_x86_68k_opts(&opts); | |
862 opts.address_log = address_log; | |
863 init_68k_context(&context, opts.native_code_map, &opts); | |
864 | |
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865 context.next_context = zcontext; |
211 | 866 //cartridge ROM |
867 context.mem_pointers[0] = cart; | |
868 context.target_cycle = context.sync_cycle = MCLKS_PER_FRAME/MCLKS_PER_68K; | |
869 //work RAM | |
870 context.mem_pointers[1] = ram; | |
871 uint32_t address; | |
872 /*address = cart[0x68/2] << 16 | cart[0x6A/2]; | |
873 translate_m68k_stream(address, &context); | |
874 address = cart[0x70/2] << 16 | cart[0x72/2]; | |
875 translate_m68k_stream(address, &context); | |
876 address = cart[0x78/2] << 16 | cart[0x7A/2]; | |
877 translate_m68k_stream(address, &context);*/ | |
878 address = cart[2] << 16 | cart[3]; | |
879 translate_m68k_stream(address, &context); | |
880 if (debug) { | |
881 insert_breakpoint(&context, address, (uint8_t *)debugger); | |
882 } | |
883 m68k_reset(&context); | |
884 } | |
885 | |
88
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886 int main(int argc, char ** argv) |
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887 { |
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888 if (argc < 2) { |
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889 fputs("Usage: blastem FILENAME\n", stderr); |
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890 return 1; |
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891 } |
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892 if(!load_rom(argv[1])) { |
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893 fprintf(stderr, "Failed to open %s for reading\n", argv[1]); |
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894 return 1; |
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895 } |
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896 int width = -1; |
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897 int height = -1; |
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898 int debug = 0; |
197
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899 FILE *address_log = NULL; |
184
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900 for (int i = 2; i < argc; i++) { |
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901 if (argv[i][0] == '-') { |
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902 switch(argv[i][1]) { |
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903 case 'd': |
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904 debug = 1; |
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905 break; |
197
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906 case 'l': |
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907 address_log = fopen("address.log", "w"); |
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908 break; |
215
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909 case 'v': |
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910 headless = 1; |
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911 break; |
184
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912 default: |
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913 fprintf(stderr, "Unrecognized switch %s\n", argv[i]); |
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914 return 1; |
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915 } |
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916 } else if (width < 0) { |
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917 width = atoi(argv[i]); |
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918 } else if (height < 0) { |
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919 height = atoi(argv[i]); |
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920 } |
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921 } |
184
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922 width = width < 320 ? 320 : width; |
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923 height = height < 240 ? (width/320) * 240 : height; |
215
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924 if (!headless) { |
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925 render_init(width, height); |
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926 } |
88
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927 vdp_context v_context; |
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928 |
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929 init_vdp_context(&v_context); |
260
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930 |
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931 z80_context z_context; |
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932 x86_z80_options z_opts; |
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933 init_x86_z80_opts(&z_opts); |
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934 init_z80_context(&z_context, &z_opts); |
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935 z_context.next_context = &v_context; |
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936 z_context.mem_pointers[0] = z80_ram; |
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937 z_context.sync_cycle = z_context.target_cycle = MCLKS_PER_FRAME/MCLKS_PER_Z80; |
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938 z_context.int_cycle = CYCLE_NEVER; |
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939 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart; |
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940 |
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941 init_run_cpu(&z_context, debug, address_log); |
88
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942 return 0; |
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943 } |