Mercurial > repos > blastem
annotate gen_x86.h @ 566:624dd5106060
Add backtrace (bt) command to 68K debugger
author | Michael Pavone <pavone@retrodev.com> |
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date | Sun, 02 Mar 2014 14:41:43 -0800 |
parents | 96489fb27dbf |
children | 8e395210f50f |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #ifndef GEN_X86_H_ |
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7 #define GEN_X86_H_ |
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8 |
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9 #include <stdint.h> |
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10 |
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11 enum { |
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12 RAX = 0, |
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13 RCX, |
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14 RDX, |
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15 RBX, |
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16 RSP, |
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17 RBP, |
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18 RSI, |
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19 RDI, |
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20 AH, |
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21 CH, |
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22 DH, |
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23 BH, |
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24 R8, |
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25 R9, |
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26 R10, |
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27 R11, |
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28 R12, |
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29 R13, |
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30 R14, |
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31 R15 |
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32 } x86_regs; |
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33 |
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34 enum { |
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35 CC_O = 0, |
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36 CC_NO, |
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37 CC_C, |
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38 CC_NC, |
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39 CC_Z, |
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40 CC_NZ, |
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41 CC_BE, |
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42 CC_A, |
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43 CC_S, |
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44 CC_NS, |
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45 CC_P, |
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46 CC_NP, |
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47 CC_L, |
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48 CC_GE, |
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49 CC_LE, |
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50 CC_G |
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51 } x86_cc; |
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52 |
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53 enum { |
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54 SZ_B = 0, |
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55 SZ_W, |
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56 SZ_D, |
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57 SZ_Q |
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58 } x86_size; |
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59 |
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60 #ifdef X86_64 |
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61 #define SZ_PTR SZ_Q |
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62 #else |
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63 #define SZ_PTR SZ_D |
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64 #endif |
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65 |
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66 enum { |
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67 MODE_REG_INDIRECT = 0, |
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68 MODE_REG_INDEXED = 4, |
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69 MODE_REG_DISPLACE8 = 0x40, |
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70 MODE_REG_INDEXED_DISPLACE8 = 0x44, |
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71 MODE_REG_DISPLACE32 = 0x80, |
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72 MODE_REG_INDEXED_DIPSLACE32 = 0x84, |
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73 MODE_REG_DIRECT = 0xC0, |
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74 //"phony" mode |
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75 MODE_IMMED = 0xFF |
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76 } x86_modes; |
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77 |
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78 |
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79 uint8_t * rol_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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80 uint8_t * ror_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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81 uint8_t * rcl_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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82 uint8_t * rcr_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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83 uint8_t * shl_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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84 uint8_t * shr_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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85 uint8_t * sar_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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86 uint8_t * rol_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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87 uint8_t * ror_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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88 uint8_t * rcl_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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89 uint8_t * rcr_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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90 uint8_t * shl_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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91 uint8_t * shr_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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92 uint8_t * sar_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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93 uint8_t * rol_clr(uint8_t * out, uint8_t dst, uint8_t size); |
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94 uint8_t * ror_clr(uint8_t * out, uint8_t dst, uint8_t size); |
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95 uint8_t * rcl_clr(uint8_t * out, uint8_t dst, uint8_t size); |
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96 uint8_t * rcr_clr(uint8_t * out, uint8_t dst, uint8_t size); |
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97 uint8_t * shl_clr(uint8_t * out, uint8_t dst, uint8_t size); |
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98 uint8_t * shr_clr(uint8_t * out, uint8_t dst, uint8_t size); |
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99 uint8_t * sar_clr(uint8_t * out, uint8_t dst, uint8_t size); |
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100 uint8_t * rol_clrdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
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101 uint8_t * ror_clrdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
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102 uint8_t * rcl_clrdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
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103 uint8_t * rcr_clrdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
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|
104 uint8_t * shl_clrdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
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|
105 uint8_t * shr_clrdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
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|
106 uint8_t * sar_clrdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
14
2bdad0f52f42
x86 code gen, initial work on translator
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diff
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107 uint8_t * add_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
146
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Implement most of the "X" instructions
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parents:
123
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108 uint8_t * adc_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
14
2bdad0f52f42
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109 uint8_t * or_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
2bdad0f52f42
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parents:
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110 uint8_t * xor_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
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111 uint8_t * and_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
2bdad0f52f42
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parents:
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112 uint8_t * sub_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
146
5416a5c4628e
Implement most of the "X" instructions
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parents:
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113 uint8_t * sbb_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
14
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114 uint8_t * cmp_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
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115 uint8_t * add_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
146
5416a5c4628e
Implement most of the "X" instructions
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116 uint8_t * adc_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
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parents:
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changeset
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117 uint8_t * or_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
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parents:
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118 uint8_t * xor_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
c0f339564819
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119 uint8_t * and_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
c0f339564819
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Mike Pavone <pavone@retrodev.com>
parents:
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120 uint8_t * sub_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
146
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121 uint8_t * sbb_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
15
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Make x86 generator generic with respect to operand size for immediate parameters.
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parents:
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122 uint8_t * cmp_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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123 uint8_t * add_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
343
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124 uint8_t * add_irdisp32(uint8_t * out, int32_t val, uint8_t dst_base, int32_t disp, uint8_t size); |
146
5416a5c4628e
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125 uint8_t * adc_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
18
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126 uint8_t * or_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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127 uint8_t * xor_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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128 uint8_t * and_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
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129 uint8_t * sub_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
146
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130 uint8_t * sbb_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
18
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131 uint8_t * cmp_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
3e7bfde7606e
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132 uint8_t * add_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
146
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133 uint8_t * adc_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
18
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134 uint8_t * add_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
146
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135 uint8_t * adc_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
18
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136 uint8_t * or_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
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137 uint8_t * or_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
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138 uint8_t * xor_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
3e7bfde7606e
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139 uint8_t * xor_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
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140 uint8_t * and_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
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141 uint8_t * and_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
3e7bfde7606e
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142 uint8_t * sub_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
3e7bfde7606e
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143 uint8_t * sub_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
146
5416a5c4628e
Implement most of the "X" instructions
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parents:
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144 uint8_t * sbb_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
5416a5c4628e
Implement most of the "X" instructions
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parents:
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145 uint8_t * sbb_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
18
3e7bfde7606e
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parents:
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146 uint8_t * cmp_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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147 uint8_t * cmp_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
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148 uint8_t * imul_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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parents:
146
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149 uint8_t * imul_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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parents:
146
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150 uint8_t * imul_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
81
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151 uint8_t * not_r(uint8_t * out, uint8_t dst, uint8_t size); |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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81
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152 uint8_t * neg_r(uint8_t * out, uint8_t dst, uint8_t size); |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
81
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153 uint8_t * not_rdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
81
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154 uint8_t * neg_rdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
146
diff
changeset
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155 uint8_t * mul_r(uint8_t * out, uint8_t dst, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
146
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changeset
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156 uint8_t * imul_r(uint8_t * out, uint8_t dst, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
146
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changeset
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157 uint8_t * div_r(uint8_t * out, uint8_t dst, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
146
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changeset
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158 uint8_t * idiv_r(uint8_t * out, uint8_t dst, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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parents:
146
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changeset
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159 uint8_t * mul_rdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
146
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changeset
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160 uint8_t * imul_rdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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parents:
146
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changeset
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161 uint8_t * div_rdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
146
diff
changeset
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162 uint8_t * idiv_rdisp8(uint8_t * out, uint8_t dst_base, int8_t disp, uint8_t size); |
484
0bf5e6b672fe
Add support for test instruction to x86 generator library
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
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163 uint8_t * test_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
0bf5e6b672fe
Add support for test instruction to x86 generator library
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
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164 uint8_t * test_ir(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
0bf5e6b672fe
Add support for test instruction to x86 generator library
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
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165 uint8_t * test_irdisp8(uint8_t * out, int32_t val, uint8_t dst_base, int8_t disp, uint8_t size); |
0bf5e6b672fe
Add support for test instruction to x86 generator library
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
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166 uint8_t * test_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
0bf5e6b672fe
Add support for test instruction to x86 generator library
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
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167 uint8_t * test_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
14
2bdad0f52f42
x86 code gen, initial work on translator
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parents:
diff
changeset
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168 uint8_t * mov_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
2bdad0f52f42
x86 code gen, initial work on translator
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parents:
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169 uint8_t * mov_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t disp, uint8_t size); |
2bdad0f52f42
x86 code gen, initial work on translator
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parents:
diff
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170 uint8_t * mov_rdisp8r(uint8_t * out, uint8_t src_base, int8_t disp, uint8_t dst, uint8_t size); |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
241
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171 uint8_t * mov_rrdisp32(uint8_t * out, uint8_t src, uint8_t dst_base, int32_t disp, uint8_t size); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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241
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172 uint8_t * mov_rdisp32r(uint8_t * out, uint8_t src_base, int32_t disp, uint8_t dst, uint8_t size); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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241
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173 uint8_t * mov_rrindex(uint8_t * out, uint8_t src, uint8_t dst_base, uint8_t dst_index, uint8_t scale, uint8_t size); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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174 uint8_t * mov_rindexr(uint8_t * out, uint8_t src_base, uint8_t src_index, uint8_t scale, uint8_t dst, uint8_t size); |
14
2bdad0f52f42
x86 code gen, initial work on translator
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parents:
diff
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175 uint8_t * mov_rrind(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
2bdad0f52f42
x86 code gen, initial work on translator
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176 uint8_t * mov_rindr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
15
c0f339564819
Make x86 generator generic with respect to operand size for immediate parameters.
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
177 uint8_t * mov_ir(uint8_t * out, int64_t val, uint8_t dst, uint8_t size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
15
diff
changeset
|
178 uint8_t * mov_irdisp8(uint8_t * out, int32_t val, uint8_t dst, int8_t disp, uint8_t size); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
61
diff
changeset
|
179 uint8_t * mov_irind(uint8_t * out, int32_t val, uint8_t dst, uint8_t size); |
81
6d231dbe75ab
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
Mike Pavone <pavone@retrodev.com>
parents:
71
diff
changeset
|
180 uint8_t * movsx_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t src_size, uint8_t size); |
6d231dbe75ab
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
Mike Pavone <pavone@retrodev.com>
parents:
71
diff
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181 uint8_t * movsx_rdisp8r(uint8_t * out, uint8_t src, int8_t disp, uint8_t dst, uint8_t src_size, uint8_t size); |
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182 uint8_t * movzx_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t src_size, uint8_t size); |
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183 uint8_t * movzx_rdisp8r(uint8_t * out, uint8_t src, int8_t disp, uint8_t dst, uint8_t src_size, uint8_t size); |
241
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184 uint8_t * xchg_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
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185 uint8_t * pushf(uint8_t * out); |
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186 uint8_t * popf(uint8_t * out); |
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187 uint8_t * push_r(uint8_t * out, uint8_t reg); |
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188 uint8_t * pop_r(uint8_t * out, uint8_t reg); |
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189 uint8_t * setcc_r(uint8_t * out, uint8_t cc, uint8_t dst); |
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190 uint8_t * setcc_rind(uint8_t * out, uint8_t cc, uint8_t dst); |
112 | 191 uint8_t * setcc_rdisp8(uint8_t * out, uint8_t cc, uint8_t dst, int8_t disp); |
61
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Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
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192 uint8_t * bt_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
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193 uint8_t * bt_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
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194 uint8_t * bt_rrdisp32(uint8_t * out, uint8_t src, uint8_t dst_base, int32_t dst_disp, uint8_t size); |
61
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195 uint8_t * bt_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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196 uint8_t * bt_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
123
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197 uint8_t * bts_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
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198 uint8_t * bts_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
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199 uint8_t * bts_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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200 uint8_t * bts_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
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201 uint8_t * btr_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
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202 uint8_t * btr_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
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203 uint8_t * btr_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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204 uint8_t * btr_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
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205 uint8_t * btc_rr(uint8_t * out, uint8_t src, uint8_t dst, uint8_t size); |
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206 uint8_t * btc_rrdisp8(uint8_t * out, uint8_t src, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
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207 uint8_t * btc_ir(uint8_t * out, uint8_t val, uint8_t dst, uint8_t size); |
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208 uint8_t * btc_irdisp8(uint8_t * out, uint8_t val, uint8_t dst_base, int8_t dst_disp, uint8_t size); |
18
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209 uint8_t * jcc(uint8_t * out, uint8_t cc, uint8_t *dest); |
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210 uint8_t * jmp(uint8_t * out, uint8_t *dest); |
81
6d231dbe75ab
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211 uint8_t * jmp_r(uint8_t * out, uint8_t dst); |
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212 uint8_t * call(uint8_t * out, uint8_t * fun); |
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213 uint8_t * call_r(uint8_t * out, uint8_t dst); |
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214 uint8_t * retn(uint8_t * out); |
151
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Implement MULU/MULS and DIVU/DIVS
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215 uint8_t * cdq(uint8_t * out); |
207 | 216 uint8_t * loop(uint8_t * out, uint8_t * dst); |
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217 |
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218 #endif //GEN_X86_H_ |
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219 |