Mercurial > repos > blastem
annotate ym2612.c @ 370:5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
author | Mike Pavone <pavone@retrodev.com> |
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date | Sun, 02 Jun 2013 00:00:22 -0700 |
parents | fc820ab1394b |
children | 0f8a759f1ff4 |
rev | line source |
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1 #include <string.h> |
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2 #include <math.h> |
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3 #include <stdio.h> |
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4 #include <stdlib.h> |
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5 #include "ym2612.h" |
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6 #include "render.h" |
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7 |
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8 //#define DO_DEBUG_PRINT |
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9 #ifdef DO_DEBUG_PRINT |
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10 #define dfprintf fprintf |
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11 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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12 #else |
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13 #define dfprintf |
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14 #define dfopen(var, fname, mode) |
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15 #endif |
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16 |
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17 #define BUSY_CYCLES 17 |
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18 #define OP_UPDATE_PERIOD 144 |
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19 |
362 | 20 enum { |
21 REG_TIMERA_HIGH = 0x24, | |
22 REG_TIMERA_LOW, | |
23 REG_TIMERB, | |
24 REG_TIME_CTRL, | |
25 REG_KEY_ONOFF, | |
26 REG_DAC = 0x2A, | |
27 REG_DAC_ENABLE, | |
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28 |
362 | 29 REG_DETUNE_MULT = 0x30, |
30 REG_TOTAL_LEVEL = 0x40, | |
31 REG_ATTACK_KS = 0x50, | |
32 REG_DECAY_AM = 0x60, | |
33 REG_SUSTAIN_RATE = 0x70, | |
34 REG_S_LVL_R_RATE = 0x80, | |
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35 |
362 | 36 REG_FNUM_LOW = 0xA0, |
37 REG_BLOCK_FNUM_H = 0xA4, | |
38 REG_FNUM_LOW_CH3 = 0xA8, | |
39 REG_BLOCK_FN_CH3 = 0xAC, | |
40 REG_ALG_FEEDBACK = 0xB0, | |
41 REG_LR_AMS_PMS = 0xB4 | |
42 }; | |
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43 |
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44 #define BIT_TIMERA_ENABLE 0x1 |
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45 #define BIT_TIMERB_ENABLE 0x2 |
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46 #define BIT_TIMERA_OVEREN 0x4 |
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47 #define BIT_TIMERB_OVEREN 0x8 |
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48 #define BIT_TIMERA_RESET 0x10 |
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49 #define BIT_TIMERB_RESET 0x20 |
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50 |
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51 #define BIT_STATUS_TIMERA 0x1 |
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52 #define BIT_STATUS_TIMERB 0x2 |
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53 |
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54 enum { |
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55 PHASE_ATTACK, |
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56 PHASE_DECAY, |
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57 PHASE_SUSTAIN, |
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58 PHASE_RELEASE |
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59 }; |
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60 |
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61 uint8_t did_tbl_init = 0; |
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62 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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63 //memory is cheap so using a half sine table will probably save some cycles |
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64 //a full sine table would be nice, but negative numbers don't get along with log2 |
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65 #define SINE_TABLE_SIZE 512 |
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66 uint16_t sine_table[SINE_TABLE_SIZE]; |
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67 //Similar deal here with the power table for log -> linear conversion |
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68 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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69 //and uses the whole part as a shift amount. |
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70 #define POW_TABLE_SIZE (1 << 13) |
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71 uint16_t pow_table[POW_TABLE_SIZE]; |
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72 |
362 | 73 uint16_t rate_table_base[] = { |
74 //main portion | |
75 0,1,0,1,0,1,0,1, | |
76 0,1,0,1,1,1,0,1, | |
77 0,1,1,1,0,1,1,1, | |
78 0,1,1,1,1,1,1,1, | |
79 //top end | |
80 1,1,1,1,1,1,1,1, | |
81 1,1,1,2,1,1,1,2, | |
82 1,2,1,2,1,2,1,2, | |
83 1,2,2,2,1,2,2,2, | |
84 }; | |
85 | |
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86 uint16_t rate_table[64*8]; |
362 | 87 |
88 #define MAX_ENVELOPE 0xFFC | |
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89 #define YM_DIVIDER 2 |
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90 |
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91 uint16_t round_fixed_point(double value, int dec_bits) |
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92 { |
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93 return value * (1 << dec_bits) + 0.5; |
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94 } |
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95 |
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96 FILE * debug_file = NULL; |
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97 uint32_t first_key_on=0; |
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98 |
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99 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t clock_rate, uint32_t sample_limit) |
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100 { |
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101 dfopen(debug_file, "ym_debug.txt", "w"); |
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102 memset(context, 0, sizeof(*context)); |
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103 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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104 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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105 context->buffer_inc = (double)sample_rate / (double)(clock_rate/OP_UPDATE_PERIOD); |
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106 context->sample_limit = sample_limit*2; |
362 | 107 for (int i = 0; i < NUM_OPERATORS; i++) { |
108 context->operators[i].envelope = MAX_ENVELOPE; | |
109 context->operators[i].env_phase = PHASE_RELEASE; | |
110 } | |
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111 //some games seem to expect that the LR flags start out as 1 |
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112 for (int i = 0; i < NUM_CHANNELS; i++) { |
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113 context->channels[i].lr = 0xC0; |
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114 } |
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115 if (!did_tbl_init) { |
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116 //populate sine table |
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117 for (int32_t i = 0; i < 512; i++) { |
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118 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
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119 |
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120 //table stores 4.8 fixed pointed representation of the base 2 log |
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121 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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122 } |
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123 //populate power table |
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124 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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125 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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126 int32_t tmp = round_fixed_point(linear, 11); |
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127 int32_t shift = (i >> 8) - 2; |
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128 if (shift < 0) { |
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129 tmp <<= 0-shift; |
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130 } else { |
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131 tmp >>= shift; |
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132 } |
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133 pow_table[i] = tmp; |
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134 } |
362 | 135 //populate envelope generator rate table, from small base table |
136 for (int rate = 0; rate < 64; rate++) { | |
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137 for (int cycle = 0; cycle < 8; cycle++) { |
362 | 138 uint16_t value; |
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139 if (rate < 2) { |
362 | 140 value = 0; |
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141 } else if (rate >= 60) { |
362 | 142 value = 8; |
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143 } else if (rate < 8) { |
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144 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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145 } else if (rate < 48) { |
362 | 146 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
147 } else { | |
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148 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
362 | 149 } |
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150 rate_table[rate * 8 + cycle] = value; |
362 | 151 } |
152 } | |
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153 } |
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154 } |
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155 |
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156 #define YM_VOLUME_DIVIDER 1 |
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157 |
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158 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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159 { |
362 | 160 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
161 //TODO: Fix channel update order OR remap channels in register write | |
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162 for (; context->current_cycle < to_cycle; context->current_cycle += 6) { |
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163 //Update timers at beginning of 144 cycle period |
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164 if (!context->current_op && context->timer_control & BIT_TIMERA_ENABLE) { |
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165 if (context->timer_a) { |
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166 context->timer_a--; |
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167 } else { |
362 | 168 if (context->timer_control & BIT_TIMERA_OVEREN) { |
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169 context->status |= BIT_STATUS_TIMERA; |
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170 } |
362 | 171 context->timer_a = context->timer_a_load; |
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172 } |
362 | 173 if (context->timer_control & BIT_TIMERB_ENABLE) { |
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174 uint32_t b_cyc = (context->current_cycle / OP_UPDATE_PERIOD) % 16; |
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175 if (!b_cyc) { |
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176 if (context->timer_b) { |
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177 context->timer_b--; |
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178 } else { |
362 | 179 if (context->timer_control & BIT_TIMERB_OVEREN) { |
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180 context->status |= BIT_STATUS_TIMERB; |
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181 } |
362 | 182 context->timer_b = context->timer_b_load; |
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183 } |
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184 } |
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185 } |
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186 } |
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187 //Update Envelope Generator |
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188 if (!(context->current_op % 3)) { |
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189 uint32_t env_cyc = context->env_counter; |
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190 uint32_t op = context->current_env_op; |
362 | 191 ym_operator * operator = context->operators + op; |
192 ym_channel * channel = context->channels + op/4; | |
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193 uint8_t rate; |
362 | 194 for(;;) { |
195 rate = operator->rates[operator->env_phase]; | |
196 if (rate) { | |
197 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
198 rate = rate*2 + ks; | |
199 if (rate > 63) { | |
200 rate = 63; | |
201 } | |
202 } | |
203 //Deal with "infinite" rates | |
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204 //According to Nemesis this should be handled in key-on instead |
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205 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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206 operator->env_phase = PHASE_DECAY; |
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207 operator->envelope = 0; |
362 | 208 } else { |
209 break; | |
210 } | |
211 } | |
212 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
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213 if (first_key_on) { |
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214 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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215 } |
362 | 216 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
217 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
218 //envelope value is 10-bits, but it will be used as a 4.8 value | |
219 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
220 if (operator->env_phase == PHASE_ATTACK) { | |
221 //this can probably be optimized to a single shift rather than a multiply + shift | |
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222 if (first_key_on) { |
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223 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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224 } |
362 | 225 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
226 operator->envelope &= MAX_ENVELOPE; | |
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227 if (!operator->envelope) { |
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228 operator->envelope = 0; |
362 | 229 operator->env_phase = PHASE_DECAY; |
230 } | |
231 } else { | |
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232 if (first_key_on) { |
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233 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
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234 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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235 } |
362 | 236 operator->envelope += envelope_inc; |
237 //clamp to max attenuation value | |
238 if (operator->envelope > MAX_ENVELOPE) { | |
239 operator->envelope = MAX_ENVELOPE; | |
240 } | |
241 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
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242 //operator->envelope = operator->sustain_level; |
362 | 243 operator->env_phase = PHASE_SUSTAIN; |
244 } | |
245 } | |
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246 } |
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247 context->current_env_op++; |
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248 if (context->current_env_op == NUM_OPERATORS) { |
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249 context->current_env_op = 0; |
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250 context->env_counter++; |
362 | 251 } |
252 } | |
253 | |
254 //Update Phase Generator | |
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255 uint32_t channel = context->current_op / 4; |
362 | 256 if (channel != 5 || !context->dac_enable) { |
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257 uint32_t op = context->current_op; |
362 | 258 //printf("updating operator %d of channel %d\n", op, channel); |
259 ym_operator * operator = context->operators + op; | |
260 ym_channel * chan = context->channels + channel; | |
261 //TODO: Modulate phase by LFO if necessary | |
262 operator->phase_counter += operator->phase_inc; | |
263 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; | |
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264 uint16_t mod = 0; |
362 | 265 switch (op % 4) |
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266 { |
362 | 267 case 0://Operator 1 |
268 //TODO: Feedback | |
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269 break; |
362 | 270 case 1://Operator 3 |
271 switch(chan->algorithm) | |
272 { | |
273 case 0: | |
274 case 2: | |
275 //modulate by operator 2 | |
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276 mod = context->operators[op+1].output >> 4; |
362 | 277 break; |
278 case 1: | |
279 //modulate by operator 1+2 | |
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280 mod = (context->operators[op-1].output + context->operators[op+1].output) >> 4; |
362 | 281 break; |
282 case 5: | |
283 //modulate by operator 1 | |
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284 mod = context->operators[op-1].output >> 4; |
362 | 285 } |
286 break; | |
287 case 2://Operator 2 | |
288 if (chan->algorithm != 1 && chan->algorithm != 2 || chan->algorithm != 7) { | |
289 //modulate by Operator 1 | |
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290 mod = context->operators[op-2].output >> 4; |
362 | 291 } |
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292 break; |
362 | 293 case 3://Operator 4 |
294 switch(chan->algorithm) | |
295 { | |
296 case 0: | |
297 case 1: | |
298 case 4: | |
299 //modulate by operator 3 | |
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300 mod = context->operators[op-2].output >> 4; |
362 | 301 break; |
302 case 2: | |
303 //modulate by operator 1+3 | |
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304 mod = (context->operators[op-3].output + context->operators[op-2].output) >> 4; |
362 | 305 break; |
306 case 3: | |
307 //modulate by operator 2+3 | |
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308 mod = (context->operators[op-1].output + context->operators[op-2].output) >> 4; |
362 | 309 break; |
310 case 5: | |
311 //modulate by operator 1 | |
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312 mod = context->operators[op-3].output >> 4; |
362 | 313 break; |
314 } | |
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315 break; |
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316 } |
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317 uint16_t env = operator->envelope + operator->total_level; |
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318 if (env > MAX_ENVELOPE) { |
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319 env = MAX_ENVELOPE; |
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320 } |
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321 if (first_key_on) { |
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322 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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323 } |
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324 phase += mod; |
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325 |
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326 uint16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
359
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327 if (phase & 0x200) { |
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328 output = -output; |
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329 } |
362 | 330 operator->output = output; |
359
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331 //Update the channel output if we've updated all operators |
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332 if (op % 4 == 3) { |
362 | 333 if (chan->algorithm < 4) { |
334 chan->output = operator->output; | |
335 } else if(chan->algorithm == 4) { | |
336 chan->output = operator->output + context->operators[channel * 4 + 1].output; | |
359
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337 } else { |
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338 output = 0; |
362 | 339 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
340 output += context->operators[op].output; | |
359
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341 } |
362 | 342 chan->output = output; |
359
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343 } |
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344 int16_t value = context->channels[channel].output & 0x3FE0; |
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345 if (value & 0x2000) { |
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346 value |= 0xC000; |
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347 } |
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348 if (first_key_on) { |
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349 dfprintf(debug_file, "channel %d output: %d\n", channel, value / 2); |
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350 } |
359
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351 } |
362 | 352 //puts("operator update done"); |
359
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353 } |
364
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354 context->current_op++; |
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355 if (context->current_op == NUM_OPERATORS) { |
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356 context->current_op = 0; |
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357 context->buffer_fraction += context->buffer_inc; |
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358 if (context->buffer_fraction > 1.0) { |
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359 context->buffer_fraction -= 1.0; |
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360 context->audio_buffer[context->buffer_pos] = 0; |
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361 context->audio_buffer[context->buffer_pos + 1] = 0; |
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362 for (int i = 0; i < NUM_CHANNELS; i++) { |
370
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363 int16_t value = context->channels[i].output & 0x3FE0; |
364
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364 if (value & 0x2000) { |
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365 value |= 0xC000; |
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366 } |
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367 if (context->channels[i].lr & 0x80) { |
370
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368 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
364
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369 } |
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370 if (context->channels[i].lr & 0x40) { |
370
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371 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
364
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372 } |
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373 } |
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374 context->buffer_pos += 2; |
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375 if (context->buffer_pos == context->sample_limit) { |
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376 render_wait_ym(context); |
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377 } |
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378 } |
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379 } |
288
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380 } |
359
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381 if (context->current_cycle >= context->write_cycle + BUSY_CYCLES) { |
288
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382 context->status &= 0x7F; |
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383 } |
362 | 384 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
288
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385 } |
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386 |
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387 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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388 { |
364
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389 //printf("address_write_part1: %X\n", address); |
362 | 390 context->selected_reg = address; |
391 context->selected_part = 0; | |
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392 } |
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393 |
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394 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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395 { |
364
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396 //printf("address_write_part2: %X\n", address); |
362 | 397 context->selected_reg = address; |
398 context->selected_part = 1; | |
399 } | |
400 | |
401 uint8_t fnum_to_keycode[] = { | |
402 //F11 = 0 | |
403 0,0,0,0,0,0,0,1, | |
404 //F11 = 1 | |
405 2,3,3,3,3,3,3,3 | |
406 }; | |
407 | |
408 //table courtesy of Nemesis | |
409 uint32_t detune_table[][4] = { | |
410 {0, 0, 1, 2}, //0 (0x00) | |
411 {0, 0, 1, 2}, //1 (0x01) | |
412 {0, 0, 1, 2}, //2 (0x02) | |
413 {0, 0, 1, 2}, //3 (0x03) | |
414 {0, 1, 2, 2}, //4 (0x04) | |
415 {0, 1, 2, 3}, //5 (0x05) | |
416 {0, 1, 2, 3}, //6 (0x06) | |
417 {0, 1, 2, 3}, //7 (0x07) | |
418 {0, 1, 2, 4}, //8 (0x08) | |
419 {0, 1, 3, 4}, //9 (0x09) | |
420 {0, 1, 3, 4}, //10 (0x0A) | |
421 {0, 1, 3, 5}, //11 (0x0B) | |
422 {0, 2, 4, 5}, //12 (0x0C) | |
423 {0, 2, 4, 6}, //13 (0x0D) | |
424 {0, 2, 4, 6}, //14 (0x0E) | |
425 {0, 2, 5, 7}, //15 (0x0F) | |
426 {0, 2, 5, 8}, //16 (0x10) | |
427 {0, 3, 6, 8}, //17 (0x11) | |
428 {0, 3, 6, 9}, //18 (0x12) | |
429 {0, 3, 7,10}, //19 (0x13) | |
430 {0, 4, 8,11}, //20 (0x14) | |
431 {0, 4, 8,12}, //21 (0x15) | |
432 {0, 4, 9,13}, //22 (0x16) | |
433 {0, 5,10,14}, //23 (0x17) | |
434 {0, 5,11,16}, //24 (0x18) | |
435 {0, 6,12,17}, //25 (0x19) | |
436 {0, 6,13,19}, //26 (0x1A) | |
437 {0, 7,14,20}, //27 (0x1B) | |
438 {0, 8,16,22}, //28 (0x1C) | |
439 {0, 8,16,22}, //29 (0x1D) | |
440 {0, 8,16,22}, //30 (0x1E) | |
441 {0, 8,16,22} | |
442 }; //31 (0x1F) | |
443 | |
444 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
445 { | |
446 uint32_t chan_num = op / 4; | |
447 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
448 //base frequency | |
449 ym_channel * channel = context->channels + chan_num; | |
450 uint32_t inc = channel->fnum; | |
451 if (!channel->block) { | |
365
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452 inc >>= 1; |
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453 } else { |
365
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454 inc <<= (channel->block-1); |
362 | 455 } |
456 //detune | |
457 uint32_t detune = detune_table[channel->keycode][operator->detune & 0x3]; | |
458 if (operator->detune & 0x40) { | |
459 inc -= detune; | |
460 //this can underflow, mask to 17-bit result | |
461 inc &= 0x1FFFF; | |
462 } else { | |
463 inc += detune; | |
464 } | |
465 //multiple | |
466 if (operator->multiple) { | |
467 inc *= operator->multiple; | |
468 } else { | |
469 //0.5 | |
470 inc >>= 1; | |
288
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471 } |
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472 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
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473 operator->phase_inc = inc; |
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474 } |
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475 |
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476 void ym_data_write(ym2612_context * context, uint8_t value) |
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477 { |
362 | 478 if (context->selected_reg < 0x21 || context->selected_reg > 0xB6 || (context->selected_reg < 0x30 && context->selected_part)) { |
479 return; | |
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480 } |
370
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481 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
362 | 482 if (context->selected_reg < 0x30) { |
483 //Shared regs | |
484 switch (context->selected_reg) | |
485 { | |
486 //TODO: Test reg and LFO | |
487 case REG_TIMERA_HIGH: | |
488 context->timer_a_load &= 0x3; | |
489 context->timer_a_load |= value << 2; | |
490 break; | |
491 case REG_TIMERA_LOW: | |
492 context->timer_a_load &= 0xFFFC; | |
493 context->timer_a_load |= value & 0x3; | |
494 break; | |
495 case REG_TIMERB: | |
496 context->timer_b_load = value; | |
497 break; | |
498 case REG_TIME_CTRL: | |
499 context->timer_control = value; | |
500 break; | |
501 case REG_KEY_ONOFF: { | |
502 uint8_t channel = value & 0x7; | |
503 if (channel < NUM_CHANNELS) { | |
504 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { | |
505 if (value & bit) { | |
370
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506 first_key_on = 1; |
362 | 507 //printf("Key On for operator %d in channel %d\n", op, channel); |
508 context->operators[op].phase_counter = 0; | |
509 context->operators[op].env_phase = PHASE_ATTACK; | |
510 context->operators[op].envelope = MAX_ENVELOPE; | |
511 } else { | |
512 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
513 context->operators[op].env_phase = PHASE_RELEASE; | |
514 } | |
515 } | |
516 } | |
517 break; | |
518 } | |
519 case REG_DAC: | |
520 if (context->dac_enable) { | |
521 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
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522 //printf("DAC Write %X(%d)\n", value, context->channels[5].output); |
362 | 523 } |
524 break; | |
525 case REG_DAC_ENABLE: | |
364
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526 //printf("DAC Enable: %X\n", value); |
362 | 527 context->dac_enable = value & 0x80; |
528 break; | |
529 } | |
530 } else if (context->selected_reg < 0xA0) { | |
531 //part | |
532 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
533 //channel in part | |
534 if ((context->selected_reg & 0x3) != 0x3) { | |
370
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535 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
362 | 536 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
537 ym_operator * operator = context->operators + op; | |
538 switch (context->selected_reg & 0xF0) | |
539 { | |
540 case REG_DETUNE_MULT: | |
541 operator->detune = value >> 4 & 0x7; | |
542 operator->multiple = value & 0xF; | |
543 ym_update_phase_inc(context, operator, op); | |
544 break; | |
545 case REG_TOTAL_LEVEL: | |
546 operator->total_level = (value & 0x7F) << 5; | |
547 break; | |
548 case REG_ATTACK_KS: | |
549 operator->key_scaling = value >> 6; | |
550 operator->rates[PHASE_ATTACK] = value & 0x1F; | |
551 break; | |
552 case REG_DECAY_AM: | |
553 //TODO: AM flag for LFO | |
554 operator->rates[PHASE_DECAY] = value & 0x1F; | |
555 break; | |
556 case REG_SUSTAIN_RATE: | |
557 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
558 break; | |
559 case REG_S_LVL_R_RATE: | |
560 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
561 operator->sustain_level = value & 0xF0 << 4; | |
562 break; | |
563 } | |
564 } | |
565 } else { | |
566 uint8_t channel = context->selected_reg & 0x3; | |
567 if (channel != 3) { | |
568 if (context->selected_part) { | |
569 channel += 3; | |
570 } | |
571 //printf("write targets channel %d\n", channel); | |
572 switch (context->selected_reg & 0xFC) | |
573 { | |
574 case REG_FNUM_LOW: | |
575 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
576 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
577 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
578 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
579 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
580 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
581 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
582 break; | |
583 case REG_BLOCK_FNUM_H:{ | |
584 context->channels[channel].block_fnum_latch = value; | |
585 break; | |
586 } | |
587 //TODO: Channel 3 special/CSM modes | |
588 case REG_ALG_FEEDBACK: | |
589 context->channels[channel].algorithm = value & 0x7; | |
590 context->channels[channel].feedback = value >> 3 & 0x7; | |
591 break; | |
592 case REG_LR_AMS_PMS: | |
593 context->channels[channel].pms = value & 0x7; | |
594 context->channels[channel].ams = value >> 4 & 0x3; | |
595 context->channels[channel].lr = value & 0xC0; | |
369
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Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
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596 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
362 | 597 break; |
598 } | |
599 } | |
600 } | |
601 | |
602 context->write_cycle = context->current_cycle; | |
288
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
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603 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
604 |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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605 uint8_t ym_read_status(ym2612_context * context) |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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606 { |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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607 return context->status; |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
608 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
609 |