Mercurial > repos > blastem
annotate m68k_core.c @ 1327:57637d17b59e
Fix vgmplay target for ternary tree changes
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 22 Apr 2017 01:22:47 -0700 |
parents | c9dc2603b087 |
children | 85a90964b557 |
rev | line source |
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Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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1 /* |
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2 Copyright 2014 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "m68k_core.h" |
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7 #include "m68k_internal.h" |
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8 #include "68kinst.h" |
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9 #include "backend.h" |
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10 #include "gen.h" |
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11 #include "util.h" |
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12 #include <stdio.h> |
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13 #include <stddef.h> |
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14 #include <stdlib.h> |
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15 #include <string.h> |
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16 |
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17 char disasm_buf[1024]; |
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18 |
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19 int8_t native_reg(m68k_op_info * op, m68k_options * opts) |
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20 { |
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21 if (op->addr_mode == MODE_REG) { |
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22 return opts->dregs[op->params.regs.pri]; |
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23 } |
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24 if (op->addr_mode == MODE_AREG) { |
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25 return opts->aregs[op->params.regs.pri]; |
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26 } |
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27 return -1; |
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28 } |
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29 |
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30 size_t dreg_offset(uint8_t reg) |
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31 { |
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32 return offsetof(m68k_context, dregs) + sizeof(uint32_t) * reg; |
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33 } |
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34 |
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35 size_t areg_offset(uint8_t reg) |
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36 { |
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37 return offsetof(m68k_context, aregs) + sizeof(uint32_t) * reg; |
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38 } |
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39 |
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40 //must be called with an m68k_op_info that uses a register |
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41 size_t reg_offset(m68k_op_info *op) |
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42 { |
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43 return op->addr_mode == MODE_REG ? dreg_offset(op->params.regs.pri) : areg_offset(op->params.regs.pri); |
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44 } |
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45 |
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46 void m68k_print_regs(m68k_context * context) |
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47 { |
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48 printf("XNZVC\n%d%d%d%d%d\n", context->flags[0], context->flags[1], context->flags[2], context->flags[3], context->flags[4]); |
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49 for (int i = 0; i < 8; i++) { |
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50 printf("d%d: %X\n", i, context->dregs[i]); |
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51 } |
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52 for (int i = 0; i < 8; i++) { |
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53 printf("a%d: %X\n", i, context->aregs[i]); |
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54 } |
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55 } |
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56 |
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57 void m68k_read_size(m68k_options *opts, uint8_t size) |
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58 { |
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59 switch (size) |
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60 { |
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61 case OPSIZE_BYTE: |
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62 call(&opts->gen.code, opts->read_8); |
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63 break; |
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64 case OPSIZE_WORD: |
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65 call(&opts->gen.code, opts->read_16); |
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66 break; |
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67 case OPSIZE_LONG: |
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68 call(&opts->gen.code, opts->read_32); |
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69 break; |
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70 } |
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71 } |
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72 |
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73 void m68k_write_size(m68k_options *opts, uint8_t size, uint8_t lowfirst) |
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74 { |
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75 switch (size) |
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76 { |
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77 case OPSIZE_BYTE: |
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78 call(&opts->gen.code, opts->write_8); |
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79 break; |
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80 case OPSIZE_WORD: |
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81 call(&opts->gen.code, opts->write_16); |
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82 break; |
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83 case OPSIZE_LONG: |
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84 if (lowfirst) { |
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85 call(&opts->gen.code, opts->write_32_lowfirst); |
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86 } else { |
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87 call(&opts->gen.code, opts->write_32_highfirst); |
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88 } |
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89 break; |
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90 } |
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91 } |
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92 |
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93 void m68k_save_result(m68kinst * inst, m68k_options * opts) |
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94 { |
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95 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG && inst->dst.addr_mode != MODE_UNUSED) { |
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96 if (inst->dst.addr_mode == MODE_AREG_PREDEC && inst->src.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) { |
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97 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2); |
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98 } |
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99 m68k_write_size(opts, inst->extra.size, 1); |
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100 } |
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101 } |
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102 |
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103 static void translate_m68k_lea_pea(m68k_options * opts, m68kinst * inst) |
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104 { |
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105 code_info *code = &opts->gen.code; |
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106 int8_t dst_reg = inst->op == M68K_PEA ? opts->gen.scratch1 : native_reg(&(inst->dst), opts); |
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107 switch(inst->src.addr_mode) |
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108 { |
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109 case MODE_AREG_INDIRECT: |
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110 cycles(&opts->gen, BUS); |
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111 if (dst_reg >= 0) { |
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112 areg_to_native(opts, inst->src.params.regs.pri, dst_reg); |
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113 } else { |
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114 if (opts->aregs[inst->src.params.regs.pri] >= 0) { |
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115 native_to_areg(opts, opts->aregs[inst->src.params.regs.pri], inst->dst.params.regs.pri); |
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116 } else { |
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117 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
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118 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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119 } |
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120 } |
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121 break; |
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122 case MODE_AREG_DISPLACE: |
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123 cycles(&opts->gen, 8); |
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124 calc_areg_displace(opts, &inst->src, dst_reg >= 0 ? dst_reg : opts->gen.scratch1); |
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125 if (dst_reg < 0) { |
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126 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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127 } |
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128 break; |
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129 case MODE_AREG_INDEX_DISP8: |
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130 cycles(&opts->gen, 12); |
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131 if (dst_reg < 0 || inst->dst.params.regs.pri == inst->src.params.regs.pri || inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) { |
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132 dst_reg = opts->gen.scratch1; |
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133 } |
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134 calc_areg_index_disp8(opts, &inst->src, dst_reg); |
581
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Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
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574
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135 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) { |
574
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136 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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137 } |
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138 break; |
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139 case MODE_PC_DISPLACE: |
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140 cycles(&opts->gen, 8); |
581
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141 if (inst->op == M68K_PEA) { |
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142 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, dst_reg); |
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parents:
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143 } else { |
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parents:
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144 ldi_areg(opts, inst->src.params.regs.displacement + inst->address+2, inst->dst.params.regs.pri); |
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145 } |
574
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146 break; |
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147 case MODE_PC_INDEX_DISP8: |
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148 cycles(&opts->gen, BUS*3); |
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149 if (dst_reg < 0 || inst->dst.params.regs.pri == (inst->src.params.regs.sec >> 1 & 0x7)) { |
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150 dst_reg = opts->gen.scratch1; |
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151 } |
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152 ldi_native(opts, inst->address+2, dst_reg); |
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153 calc_index_disp8(opts, &inst->src, dst_reg); |
581
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Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
574
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|
154 if (dst_reg == opts->gen.scratch1 && inst->op != M68K_PEA) { |
574
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155 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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156 } |
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157 break; |
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158 case MODE_ABSOLUTE: |
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159 case MODE_ABSOLUTE_SHORT: |
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|
160 cycles(&opts->gen, (inst->src.addr_mode == MODE_ABSOLUTE) ? BUS * 3 : BUS * 2); |
581
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574
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|
161 if (inst->op == M68K_PEA) { |
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|
162 ldi_native(opts, inst->src.params.immed, dst_reg); |
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parents:
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163 } else { |
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574
diff
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|
164 ldi_areg(opts, inst->src.params.immed, inst->dst.params.regs.pri); |
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parents:
574
diff
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|
165 } |
574
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166 break; |
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167 default: |
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diff
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|
168 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
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|
169 fatal_error("%X: %s\naddress mode %d not implemented (lea src)\n", inst->address, disasm_buf, inst->src.addr_mode); |
574
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170 } |
581
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574
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|
171 if (inst->op == M68K_PEA) { |
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parents:
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diff
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|
172 subi_areg(opts, 4, 7); |
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parents:
574
diff
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|
173 areg_to_native(opts, 7, opts->gen.scratch2); |
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574
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|
174 call(code, opts->write_32_lowfirst); |
574
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175 } |
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176 } |
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177 |
1102
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parents:
1082
diff
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|
178 static void push_const(m68k_options *opts, int32_t value) |
574
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179 { |
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180 ldi_native(opts, value, opts->gen.scratch1); |
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181 subi_areg(opts, 4, 7); |
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182 areg_to_native(opts, 7, opts->gen.scratch2); |
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183 call(&opts->gen.code, opts->write_32_highfirst); |
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184 } |
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185 |
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186 void jump_m68k_abs(m68k_options * opts, uint32_t address) |
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187 { |
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|
188 code_info *code = &opts->gen.code; |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
189 code_ptr dest_addr = get_native_address(opts, address); |
574
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|
190 if (!dest_addr) { |
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191 opts->gen.deferred = defer_address(opts->gen.deferred, address, code->cur + 1); |
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192 //dummy address to be replaced later, make sure it generates a 4-byte displacement |
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193 dest_addr = code->cur + 256; |
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194 } |
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195 jmp(code, dest_addr); |
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196 //this used to call opts->native_addr for destinations in RAM, but that shouldn't be needed |
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197 //since instruction retranslation patches the original native instruction location |
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198 } |
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199 |
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200 static void translate_m68k_bsr(m68k_options * opts, m68kinst * inst) |
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201 { |
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202 code_info *code = &opts->gen.code; |
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203 int32_t disp = inst->src.params.immed; |
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204 uint32_t after = inst->address + (inst->variant == VAR_BYTE ? 2 : 4); |
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205 //TODO: Add cycles in the right place relative to pushing the return address on the stack |
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206 cycles(&opts->gen, 10); |
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207 push_const(opts, after); |
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208 jump_m68k_abs(opts, inst->address + 2 + disp); |
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209 } |
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210 |
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211 static void translate_m68k_jmp_jsr(m68k_options * opts, m68kinst * inst) |
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212 { |
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213 uint8_t is_jsr = inst->op == M68K_JSR; |
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214 code_info *code = &opts->gen.code; |
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215 code_ptr dest_addr; |
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216 uint8_t sec_reg; |
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217 uint32_t after; |
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218 uint32_t m68k_addr; |
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219 switch(inst->src.addr_mode) |
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220 { |
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221 case MODE_AREG_INDIRECT: |
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222 cycles(&opts->gen, BUS*2); |
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223 if (is_jsr) { |
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224 push_const(opts, inst->address+2); |
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225 } |
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226 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
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227 call(code, opts->native_addr); |
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228 jmp_r(code, opts->gen.scratch1); |
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229 break; |
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230 case MODE_AREG_DISPLACE: |
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231 cycles(&opts->gen, BUS*2); |
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232 if (is_jsr) { |
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233 push_const(opts, inst->address+4); |
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234 } |
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235 calc_areg_displace(opts, &inst->src, opts->gen.scratch1); |
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236 call(code, opts->native_addr); |
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237 jmp_r(code, opts->gen.scratch1); |
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238 break; |
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239 case MODE_AREG_INDEX_DISP8: |
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240 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct |
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241 if (is_jsr) { |
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242 push_const(opts, inst->address+4); |
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243 } |
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244 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1); |
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245 call(code, opts->native_addr); |
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246 jmp_r(code, opts->gen.scratch1); |
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247 break; |
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248 case MODE_PC_DISPLACE: |
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249 //TODO: Add cycles in the right place relative to pushing the return address on the stack |
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250 cycles(&opts->gen, 10); |
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251 if (is_jsr) { |
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252 push_const(opts, inst->address+4); |
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253 } |
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254 jump_m68k_abs(opts, inst->src.params.regs.displacement + inst->address + 2); |
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255 break; |
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256 case MODE_PC_INDEX_DISP8: |
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257 cycles(&opts->gen, BUS*3);//TODO: CHeck that this is correct |
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258 if (is_jsr) { |
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259 push_const(opts, inst->address+4); |
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260 } |
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261 ldi_native(opts, inst->address+2, opts->gen.scratch1); |
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262 calc_index_disp8(opts, &inst->src, opts->gen.scratch1); |
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263 call(code, opts->native_addr); |
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264 jmp_r(code, opts->gen.scratch1); |
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265 break; |
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266 case MODE_ABSOLUTE: |
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267 case MODE_ABSOLUTE_SHORT: |
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268 //TODO: Add cycles in the right place relative to pushing the return address on the stack |
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269 cycles(&opts->gen, inst->src.addr_mode == MODE_ABSOLUTE ? 12 : 10); |
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270 if (is_jsr) { |
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271 push_const(opts, inst->address + (inst->src.addr_mode == MODE_ABSOLUTE ? 6 : 4)); |
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272 } |
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273 jump_m68k_abs(opts, inst->src.params.immed); |
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274 break; |
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275 default: |
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276 m68k_disasm(inst, disasm_buf); |
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277 fatal_error("%s\naddress mode %d not yet supported (%s)\n", disasm_buf, inst->src.addr_mode, is_jsr ? "jsr" : "jmp"); |
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278 } |
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279 } |
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280 |
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281 static void translate_m68k_unlk(m68k_options * opts, m68kinst * inst) |
574
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282 { |
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283 cycles(&opts->gen, BUS); |
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284 areg_to_native(opts, inst->dst.params.regs.pri, opts->aregs[7]); |
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285 areg_to_native(opts, 7, opts->gen.scratch1); |
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286 call(&opts->gen.code, opts->read_32); |
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287 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
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288 addi_areg(opts, 4, 7); |
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289 } |
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290 |
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291 static void translate_m68k_link(m68k_options * opts, m68kinst * inst) |
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292 { |
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293 //compensate for displacement word |
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294 cycles(&opts->gen, BUS); |
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295 subi_areg(opts, 4, 7); |
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296 areg_to_native(opts, 7, opts->gen.scratch2); |
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297 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
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298 call(&opts->gen.code, opts->write_32_highfirst); |
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299 native_to_areg(opts, opts->aregs[7], inst->src.params.regs.pri); |
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300 addi_areg(opts, inst->dst.params.immed, 7); |
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301 //prefetch |
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302 cycles(&opts->gen, BUS); |
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303 } |
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304 |
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Clean up symbol visiblity and delete a ltitle bit of dead code
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305 static void translate_m68k_rts(m68k_options * opts, m68kinst * inst) |
574
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306 { |
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307 code_info *code = &opts->gen.code; |
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308 areg_to_native(opts, 7, opts->gen.scratch1); |
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309 addi_areg(opts, 4, 7); |
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310 call(code, opts->read_32); |
1323
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Fixed timing for RTS and RTE
Michael Pavone <pavone@retrodev.com>
parents:
1298
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311 cycles(&opts->gen, 2*BUS); |
574
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312 call(code, opts->native_addr); |
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313 jmp_r(code, opts->gen.scratch1); |
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314 } |
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315 |
1102
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Clean up symbol visiblity and delete a ltitle bit of dead code
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316 static void translate_m68k_rtr(m68k_options *opts, m68kinst * inst) |
574
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317 { |
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318 code_info *code = &opts->gen.code; |
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319 //Read saved CCR |
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320 areg_to_native(opts, 7, opts->gen.scratch1); |
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321 call(code, opts->read_16); |
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322 addi_areg(opts, 2, 7); |
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323 call(code, opts->set_ccr); |
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324 //Read saved PC |
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325 areg_to_native(opts, 7, opts->gen.scratch1); |
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326 call(code, opts->read_32); |
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327 addi_areg(opts, 4, 7); |
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328 //Get native address and jump to it |
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329 call(code, opts->native_addr); |
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330 jmp_r(code, opts->gen.scratch1); |
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331 } |
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332 |
1102
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Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
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1082
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333 static void translate_m68k_trap(m68k_options *opts, m68kinst *inst) |
574
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334 { |
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335 code_info *code = &opts->gen.code; |
1027
276cd582b728
Fix PC value pushed to stack for A and F line traps
Michael Pavone <pavone@retrodev.com>
parents:
992
diff
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|
336 uint32_t vector, pc = inst->address; |
992
261995d06897
Implemented A line and F line traps.
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337 switch (inst->op) |
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338 { |
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339 case M68K_TRAP: |
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340 vector = inst->src.params.immed + VECTOR_TRAP_0; |
1027
276cd582b728
Fix PC value pushed to stack for A and F line traps
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341 pc += 2; |
992
261995d06897
Implemented A line and F line traps.
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|
342 break; |
261995d06897
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|
343 case M68K_A_LINE_TRAP: |
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|
344 vector = VECTOR_LINE_1010; |
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345 break; |
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|
346 case M68K_F_LINE_TRAP: |
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|
347 vector = VECTOR_LINE_1111; |
261995d06897
Implemented A line and F line traps.
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|
348 break; |
261995d06897
Implemented A line and F line traps.
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|
349 } |
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
350 ldi_native(opts, vector, opts->gen.scratch2); |
1027
276cd582b728
Fix PC value pushed to stack for A and F line traps
Michael Pavone <pavone@retrodev.com>
parents:
992
diff
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|
351 ldi_native(opts, pc, opts->gen.scratch1); |
574
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|
352 jmp(code, opts->trap); |
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|
353 } |
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|
354 |
1102
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Clean up symbol visiblity and delete a ltitle bit of dead code
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|
355 static void translate_m68k_illegal(m68k_options *opts, m68kinst *inst) |
986
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Implement illegal instruction trap
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diff
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|
356 { |
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|
357 code_info *code = &opts->gen.code; |
f680fe746a7d
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|
358 cycles(&opts->gen, BUS); |
f680fe746a7d
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Michael Pavone <pavone@retrodev.com>
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|
359 ldi_native(opts, VECTOR_ILLEGAL_INST, opts->gen.scratch2); |
f680fe746a7d
Implement illegal instruction trap
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parents:
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diff
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|
360 ldi_native(opts, inst->address, opts->gen.scratch1); |
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents:
985
diff
changeset
|
361 jmp(code, opts->trap); |
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents:
985
diff
changeset
|
362 } |
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents:
985
diff
changeset
|
363 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
364 static void translate_m68k_move_usp(m68k_options *opts, m68kinst *inst) |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
365 { |
990
33a46d35b913
Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents:
989
diff
changeset
|
366 m68k_trap_if_not_supervisor(opts, inst); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
367 cycles(&opts->gen, BUS); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
368 int8_t reg; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
369 if (inst->src.addr_mode == MODE_UNUSED) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
370 reg = native_reg(&inst->dst, opts); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
371 if (reg < 0) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
372 reg = opts->gen.scratch1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
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|
373 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
374 areg_to_native(opts, 8, reg); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
375 if (reg == opts->gen.scratch1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
376 native_to_areg(opts, opts->gen.scratch1, inst->dst.params.regs.pri); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
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|
377 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
378 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
379 reg = native_reg(&inst->src, opts); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
380 if (reg < 0) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
381 reg = opts->gen.scratch1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
382 areg_to_native(opts, inst->src.params.regs.pri, reg); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
383 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
384 native_to_areg(opts, reg, 8); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
385 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
386 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
387 |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
388 static void translate_movem_regtomem_reglist(m68k_options * opts, m68kinst *inst) |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
389 { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
390 code_info *code = &opts->gen.code; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
391 int8_t bit,reg,dir; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
392 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
393 reg = 15; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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394 dir = -1; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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395 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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396 reg = 0; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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397 dir = 1; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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398 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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399 for(bit=0; reg < 16 && reg >= 0; reg += dir, bit++) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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400 if (inst->src.params.immed & (1 << bit)) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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401 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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402 subi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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403 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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404 push_native(opts, opts->gen.scratch2); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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405 if (reg > 7) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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406 areg_to_native(opts, reg-8, opts->gen.scratch1); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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407 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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408 dreg_to_native(opts, reg, opts->gen.scratch1); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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409 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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410 if (inst->extra.size == OPSIZE_LONG) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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411 call(code, opts->write_32_lowfirst); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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412 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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413 call(code, opts->write_16); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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414 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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415 pop_native(opts, opts->gen.scratch2); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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416 if (inst->dst.addr_mode != MODE_AREG_PREDEC) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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417 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch2); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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418 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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419 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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420 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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421 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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422 |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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423 static void translate_movem_memtoreg_reglist(m68k_options * opts, m68kinst *inst) |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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424 { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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425 code_info *code = &opts->gen.code; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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426 for(uint8_t reg = 0; reg < 16; reg ++) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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427 if (inst->dst.params.immed & (1 << reg)) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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428 push_native(opts, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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429 if (inst->extra.size == OPSIZE_LONG) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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430 call(code, opts->read_32); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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431 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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432 call(code, opts->read_16); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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433 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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434 if (inst->extra.size == OPSIZE_WORD) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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435 sign_extend16_native(opts, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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436 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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437 if (reg > 7) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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438 native_to_areg(opts, opts->gen.scratch1, reg-8); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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439 } else { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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440 native_to_dreg(opts, opts->gen.scratch1, reg); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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441 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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442 pop_native(opts, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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443 addi_native(opts, (inst->extra.size == OPSIZE_LONG) ? 4 : 2, opts->gen.scratch1); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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444 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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445 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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446 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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447 |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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448 static code_ptr get_movem_impl(m68k_options *opts, m68kinst *inst) |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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449 { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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450 uint8_t reg_to_mem = inst->src.addr_mode == MODE_REG; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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451 uint8_t size = inst->extra.size; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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452 int8_t dir = reg_to_mem && inst->dst.addr_mode == MODE_AREG_PREDEC ? -1 : 1; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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453 uint16_t reglist = reg_to_mem ? inst->src.params.immed : inst->dst.params.immed; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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454 for (uint32_t i = 0; i < opts->num_movem; i++) |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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455 { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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456 if ( |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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457 opts->big_movem[i].reglist == reglist && opts->big_movem[i].reg_to_mem == reg_to_mem |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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458 && opts->big_movem[i].size == size && opts->big_movem[i].dir == dir |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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459 ) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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460 return opts->big_movem[i].impl; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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461 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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462 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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463 if (opts->num_movem == opts->movem_storage) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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464 opts->movem_storage *= 2; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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465 opts->big_movem = realloc(opts->big_movem, sizeof(movem_fun) * opts->movem_storage); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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466 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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467 if (!opts->extra_code.cur) { |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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468 init_code_info(&opts->extra_code); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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469 } |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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470 check_alloc_code(&opts->extra_code, 512); |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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471 code_ptr impl = opts->extra_code.cur; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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472 code_info tmp = opts->gen.code; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
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473 opts->gen.code = opts->extra_code; |
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Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
474 if (reg_to_mem) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
475 translate_movem_regtomem_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
476 } else { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
477 translate_movem_memtoreg_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
478 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
479 opts->extra_code = opts->gen.code; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
480 opts->gen.code = tmp; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
481 |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
482 rts(&opts->extra_code); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
483 return impl; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
484 } |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
485 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
486 static void translate_m68k_movem(m68k_options * opts, m68kinst * inst) |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
487 { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
488 code_info *code = &opts->gen.code; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
489 uint8_t early_cycles; |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
490 uint16_t num_regs = inst->src.addr_mode == MODE_REG ? inst->src.params.immed : inst->dst.params.immed; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
491 { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
492 //TODO: Move this popcount alg to a utility function |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
493 uint16_t a = (num_regs & 0b1010101010101010) >> 1; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
494 uint16_t b = num_regs & 0b0101010101010101; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
495 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
496 a = (num_regs & 0b1100110011001100) >> 2; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
497 b = num_regs & 0b0011001100110011; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
498 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
499 a = (num_regs & 0b1111000011110000) >> 4; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
500 b = num_regs & 0b0000111100001111; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
501 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
502 a = (num_regs & 0b1111111100000000) >> 8; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
503 b = num_regs & 0b0000000011111111; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
504 num_regs = a + b; |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
505 } |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
506 if(inst->src.addr_mode == MODE_REG) { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
507 //reg to mem |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
508 early_cycles = 8; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
509 switch (inst->dst.addr_mode) |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
510 { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
511 case MODE_AREG_INDIRECT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
512 case MODE_AREG_PREDEC: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
513 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
514 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
515 case MODE_AREG_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
516 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
517 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
518 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
519 case MODE_AREG_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
520 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
521 calc_areg_index_disp8(opts, &inst->dst, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
522 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
523 case MODE_PC_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
524 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
525 ldi_native(opts, inst->dst.params.regs.displacement + inst->address+2, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
526 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
527 case MODE_PC_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
528 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
529 ldi_native(opts, inst->address+2, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
530 calc_index_disp8(opts, &inst->dst, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
531 case MODE_ABSOLUTE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
532 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
533 case MODE_ABSOLUTE_SHORT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
534 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
535 ldi_native(opts, inst->dst.params.immed, opts->gen.scratch2); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
536 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
537 default: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
538 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
539 fatal_error("%X: %s\naddress mode %d not implemented (movem dst)\n", inst->address, disasm_buf, inst->dst.addr_mode); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
540 } |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
541 |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
542 cycles(&opts->gen, early_cycles); |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
543 if (num_regs <= 9) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
544 translate_movem_regtomem_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
545 } else { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
546 call(code, get_movem_impl(opts, inst)); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
547 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
548 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
549 native_to_areg(opts, opts->gen.scratch2, inst->dst.params.regs.pri); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
550 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
551 } else { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
552 //mem to reg |
1212
191ac490fb3d
Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents:
1130
diff
changeset
|
553 early_cycles = 8; //includes prefetch |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
554 switch (inst->src.addr_mode) |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
555 { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
556 case MODE_AREG_INDIRECT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
557 case MODE_AREG_POSTINC: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
558 areg_to_native(opts, inst->src.params.regs.pri, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
559 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
560 case MODE_AREG_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
561 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
562 calc_areg_displace(opts, &inst->src, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
563 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
564 case MODE_AREG_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
565 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
566 calc_areg_index_disp8(opts, &inst->src, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
567 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
568 case MODE_PC_DISPLACE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
569 early_cycles += BUS; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
570 ldi_native(opts, inst->src.params.regs.displacement + inst->address+2, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
571 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
572 case MODE_PC_INDEX_DISP8: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
573 early_cycles += 6; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
574 ldi_native(opts, inst->address+2, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
575 calc_index_disp8(opts, &inst->src, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
576 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
577 case MODE_ABSOLUTE: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
578 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
579 case MODE_ABSOLUTE_SHORT: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
580 early_cycles += 4; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
581 ldi_native(opts, inst->src.params.immed, opts->gen.scratch1); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
582 break; |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
583 default: |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
584 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
585 fatal_error("%X: %s\naddress mode %d not implemented (movem src)\n", inst->address, disasm_buf, inst->src.addr_mode); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
586 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
587 cycles(&opts->gen, early_cycles); |
1298
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
588 |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
589 if (num_regs <= 9) { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
590 translate_movem_memtoreg_reglist(opts, inst); |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
591 } else { |
d5a47597b61f
Prevent blowing past our native translated instruction size of 255 bytes when translating movem with a large register list. Fixes bug in which Fantastic Dizzy was completely broken on 32-bit builds
Michael Pavone <pavone@retrodev.com>
parents:
1282
diff
changeset
|
592 call(code, get_movem_impl(opts, inst)); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
593 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
594 if (inst->src.addr_mode == MODE_AREG_POSTINC) { |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
595 native_to_areg(opts, opts->gen.scratch1, inst->src.params.regs.pri); |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
596 } |
1212
191ac490fb3d
Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents:
1130
diff
changeset
|
597 //Extra read |
191ac490fb3d
Implement extra read and fix movem timing generally
Michael Pavone <pavone@retrodev.com>
parents:
1130
diff
changeset
|
598 call(code, opts->read_16); |
588
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
599 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
600 } |
963d5901f583
Move translate_m68k_movem to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
587
diff
changeset
|
601 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
602 static void translate_m68k_nop(m68k_options *opts, m68kinst *inst) |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
603 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
604 cycles(&opts->gen, BUS); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
605 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
606 |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
607 void swap_ssp_usp(m68k_options * opts) |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
608 { |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
609 areg_to_native(opts, 7, opts->gen.scratch2); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
610 areg_to_native(opts, 8, opts->aregs[7]); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
611 native_to_areg(opts, opts->gen.scratch2, 8); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
612 } |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
613 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
614 static void translate_m68k_rte(m68k_options *opts, m68kinst *inst) |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
615 { |
990
33a46d35b913
Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents:
989
diff
changeset
|
616 m68k_trap_if_not_supervisor(opts, inst); |
33a46d35b913
Implement privelege violation exceptions
Michael Pavone <pavone@retrodev.com>
parents:
989
diff
changeset
|
617 |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
618 code_info *code = &opts->gen.code; |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
619 //Read saved SR |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
620 areg_to_native(opts, 7, opts->gen.scratch1); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
621 call(code, opts->read_16); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
622 addi_areg(opts, 2, 7); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
623 call(code, opts->set_sr); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
624 //Read saved PC |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
625 areg_to_native(opts, 7, opts->gen.scratch1); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
626 call(code, opts->read_32); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
627 addi_areg(opts, 4, 7); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
628 check_user_mode_swap_ssp_usp(opts); |
1323
c9dc2603b087
Fixed timing for RTS and RTE
Michael Pavone <pavone@retrodev.com>
parents:
1298
diff
changeset
|
629 cycles(&opts->gen, 2*BUS); |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
630 //Get native address, sync components, recalculate integer points and jump to returned address |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
631 call(code, opts->native_addr_and_sync); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
632 jmp_r(code, opts->gen.scratch1); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
633 } |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
681
diff
changeset
|
634 |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
635 code_ptr get_native_address(m68k_options *opts, uint32_t address) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
636 { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
637 native_map_slot * native_code_map = opts->gen.native_code_map; |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
638 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
639 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
640 if (mem_chunk) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
641 //calculate the lowest alias for this address |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
642 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask); |
1214
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
643 } else { |
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
644 address &= opts->gen.address_mask; |
985
751280fb4494
Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
645 } |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
646 uint32_t chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
647 if (!native_code_map[chunk].base) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
648 return NULL; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
649 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
650 uint32_t offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
651 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET || native_code_map[chunk].offsets[offset] == EXTENSION_WORD) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
652 return NULL; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
653 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
654 return native_code_map[chunk].base + native_code_map[chunk].offsets[offset]; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
655 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
656 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
657 code_ptr get_native_from_context(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
658 { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
659 return get_native_address(context->options, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
660 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
661 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
662 uint32_t get_instruction_start(m68k_options *opts, uint32_t address) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
663 { |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
664 native_map_slot * native_code_map = opts->gen.native_code_map; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
665 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, 0, NULL); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
666 if (mem_chunk) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
667 //calculate the lowest alias for this address |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
668 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask); |
1214
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
669 } else { |
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
670 address &= opts->gen.address_mask; |
985
751280fb4494
Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
671 } |
751280fb4494
Fix interrupt latency from STOP instruction status reg changes. Fix modified code patching when non-standard aliases are used. This fixes the demo MDEM's First
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
672 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
673 uint32_t chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
674 if (!native_code_map[chunk].base) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
675 return 0; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
676 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
677 uint32_t offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
678 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
679 return 0; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
680 } |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
681 while (native_code_map[chunk].offsets[offset] == EXTENSION_WORD) |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
682 { |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
683 --address; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
684 chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
685 offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
686 } |
988
ce9df7a5fdf2
Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents:
987
diff
changeset
|
687 return address; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
688 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
689 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
690 static void map_native_address(m68k_context * context, uint32_t address, code_ptr native_addr, uint8_t size, uint8_t native_size) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
691 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
692 m68k_options * opts = context->options; |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
693 native_map_slot * native_code_map = opts->gen.native_code_map; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
694 uint32_t meta_off; |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
695 memmap_chunk const *mem_chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off); |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
696 if (mem_chunk) { |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
697 if (mem_chunk->flags & MMAP_CODE) { |
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
698 uint32_t masked = (address - mem_chunk->start) & mem_chunk->mask; |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
699 uint32_t final_off = masked + meta_off; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
700 uint32_t ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
701 context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7); |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
702 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
703 uint32_t slot = final_off / 1024; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
704 if (!opts->gen.ram_inst_sizes[slot]) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
705 opts->gen.ram_inst_sizes[slot] = malloc(sizeof(uint8_t) * 512); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
706 } |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
707 opts->gen.ram_inst_sizes[slot][(final_off/2) & 511] = native_size; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
708 |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
709 //TODO: Deal with case in which end of instruction is in a different memory chunk |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
710 masked = (address + size - 1) & mem_chunk->mask; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
711 final_off = masked + meta_off; |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
712 ram_flags_off = final_off >> (opts->gen.ram_flags_shift + 3); |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
713 context->ram_code_flags[ram_flags_off] |= 1 << ((final_off >> opts->gen.ram_flags_shift) & 7); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
714 } |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
715 //calculate the lowest alias for this address |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
716 address = mem_chunk->start + ((address - mem_chunk->start) & mem_chunk->mask); |
1214
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
717 } else { |
afa3d0a227ae
Fix regression in handling of unmapped memory addresses
Michael Pavone <pavone@retrodev.com>
parents:
1212
diff
changeset
|
718 address &= opts->gen.address_mask; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
719 } |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
720 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
721 uint32_t chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
722 if (!native_code_map[chunk].base) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
723 native_code_map[chunk].base = native_addr; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
724 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
725 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
726 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
727 uint32_t offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
728 native_code_map[chunk].offsets[offset] = native_addr-native_code_map[chunk].base; |
988
ce9df7a5fdf2
Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents:
987
diff
changeset
|
729 for(address++,size-=1; size; address++,size-=1) { |
ce9df7a5fdf2
Fix changes made to get_instruction_start and map_native_address to cope with being able to translate at odd addresses.
Michael Pavone <pavone@retrodev.com>
parents:
987
diff
changeset
|
730 address &= opts->gen.address_mask; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
731 chunk = address / NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
732 offset = address % NATIVE_CHUNK_SIZE; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
733 if (!native_code_map[chunk].base) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
734 native_code_map[chunk].base = native_addr; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
735 native_code_map[chunk].offsets = malloc(sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
736 memset(native_code_map[chunk].offsets, 0xFF, sizeof(int32_t) * NATIVE_CHUNK_SIZE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
737 } |
713
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
738 if (native_code_map[chunk].offsets[offset] == INVALID_OFFSET) { |
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
739 //TODO: Better handling of overlapping instructions |
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
740 native_code_map[chunk].offsets[offset] = EXTENSION_WORD; |
f9b80a78d9a6
Don't overwrite an instruction offset mapping with an extension word value. I really need the ability for a word to be mapped to more than one instruction, but this will be more correct for now
Michael Pavone <pavone@retrodev.com>
parents:
706
diff
changeset
|
741 } |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
742 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
743 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
744 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
745 static uint8_t get_native_inst_size(m68k_options * opts, uint32_t address) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
746 { |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
747 uint32_t meta_off; |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
748 memmap_chunk const *chunk = find_map_chunk(address, &opts->gen, MMAP_CODE, &meta_off); |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
749 if (chunk) { |
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
750 meta_off += (address - chunk->start) & chunk->mask; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
751 } |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
752 uint32_t slot = meta_off/1024; |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
753 return opts->gen.ram_inst_sizes[slot][(meta_off/2)%512]; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
754 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
755 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
756 uint8_t m68k_is_terminal(m68kinst * inst) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
757 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
758 return inst->op == M68K_RTS || inst->op == M68K_RTE || inst->op == M68K_RTR || inst->op == M68K_JMP |
1279
996eb76d6da1
RESET is not a terminal instruction on the 68K. Fixes a crash bug in Chavez II and possibly other games
Michael Pavone <pavone@retrodev.com>
parents:
1275
diff
changeset
|
759 || inst->op == M68K_TRAP || inst->op == M68K_ILLEGAL || inst->op == M68K_INVALID |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
760 || (inst->op == M68K_BCC && inst->extra.cond == COND_TRUE); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
761 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
763 static void m68k_handle_deferred(m68k_context * context) |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
764 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 m68k_options * opts = context->options; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
766 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
767 if (opts->gen.deferred) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
768 translate_m68k_stream(opts->gen.deferred->address, context); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
769 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
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parents:
diff
changeset
|
770 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
771 |
989
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
772 uint16_t m68k_get_ir(m68k_context *context) |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
773 { |
1130
8f14767661fa
Remove memory map assumptions from Z80 core and move a little bit of logic to the generic backend.c so it can be shared between CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
774 uint32_t inst_addr = get_instruction_start(context->options, context->last_prefetch_address-2); |
989
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
775 uint16_t *native_addr = get_native_pointer(inst_addr, (void **)context->mem_pointers, &context->options->gen); |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
776 if (native_addr) { |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
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988
diff
changeset
|
777 return *native_addr; |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
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parents:
988
diff
changeset
|
778 } |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
779 fprintf(stderr, "M68K: Failed to calculate value of IR. Last prefetch address: %X\n", context->last_prefetch_address); |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
780 return 0xFFFF; |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
781 } |
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
782 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
783 typedef enum { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
784 RAW_FUNC = 1, |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
785 BINARY_ARITH, |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
786 UNARY_ARITH, |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
787 OP_FUNC |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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788 } impl_type; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
789 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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790 typedef void (*raw_fun)(m68k_options * opts, m68kinst *inst); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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791 typedef void (*op_fun)(m68k_options * opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
792 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
793 typedef struct { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
794 union { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
795 raw_fun raw; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
796 uint32_t flag_mask; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
797 op_fun op; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
798 } impl; |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
799 impl_type itype; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
800 } impl_info; |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
801 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
802 #define RAW_IMPL(inst, fun) [inst] = { .impl = { .raw = fun }, .itype = RAW_FUNC } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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803 #define OP_IMPL(inst, fun) [inst] = { .impl = { .op = fun }, .itype = OP_FUNC } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
804 #define UNARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask }, .itype = UNARY_ARITH } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
805 #define BINARY_IMPL(inst, mask) [inst] = { .impl = { .flag_mask = mask}, .itype = BINARY_ARITH } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
806 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
807 static impl_info m68k_impls[] = { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
808 //math |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
809 BINARY_IMPL(M68K_ADD, X|N|Z|V|C), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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|
810 BINARY_IMPL(M68K_SUB, X|N|Z|V|C), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
811 //z flag is special cased for ADDX/SUBX |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
812 BINARY_IMPL(M68K_ADDX, X|N|V|C), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
813 BINARY_IMPL(M68K_SUBX, X|N|V|C), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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|
814 OP_IMPL(M68K_ABCD, translate_m68k_abcd_sbcd), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
815 OP_IMPL(M68K_SBCD, translate_m68k_abcd_sbcd), |
834 | 816 OP_IMPL(M68K_NBCD, translate_m68k_abcd_sbcd), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
817 BINARY_IMPL(M68K_AND, N|Z|V0|C0), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
818 BINARY_IMPL(M68K_EOR, N|Z|V0|C0), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
819 BINARY_IMPL(M68K_OR, N|Z|V0|C0), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
820 RAW_IMPL(M68K_CMP, translate_m68k_cmp), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
821 OP_IMPL(M68K_DIVS, translate_m68k_div), |
1282
c5821f9de325
Cycle accurate implementation of divs
Michael Pavone <pavone@retrodev.com>
parents:
1279
diff
changeset
|
822 OP_IMPL(M68K_DIVU, translate_m68k_div), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
823 OP_IMPL(M68K_MULS, translate_m68k_mul), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
824 OP_IMPL(M68K_MULU, translate_m68k_mul), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
825 RAW_IMPL(M68K_EXT, translate_m68k_ext), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
826 UNARY_IMPL(M68K_NEG, X|N|Z|V|C), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
581
diff
changeset
|
827 OP_IMPL(M68K_NEGX, translate_m68k_negx), |
614
60a06c025103
Fix flag mask for m68k not
Michael Pavone <pavone@retrodev.com>
parents:
588
diff
changeset
|
828 UNARY_IMPL(M68K_NOT, N|Z|V|C), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
829 UNARY_IMPL(M68K_TST, N|Z|V0|C0), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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diff
changeset
|
830 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
831 //shift/rotate |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
832 OP_IMPL(M68K_ASL, translate_m68k_sl), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
833 OP_IMPL(M68K_LSL, translate_m68k_sl), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
834 OP_IMPL(M68K_ASR, translate_m68k_asr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
835 OP_IMPL(M68K_LSR, translate_m68k_lsr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
836 OP_IMPL(M68K_ROL, translate_m68k_rot), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
837 OP_IMPL(M68K_ROR, translate_m68k_rot), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
838 OP_IMPL(M68K_ROXL, translate_m68k_rot), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
581
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changeset
|
839 OP_IMPL(M68K_ROXR, translate_m68k_rot), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
840 UNARY_IMPL(M68K_SWAP, N|Z|V0|C0), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
841 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
842 //bit |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
581
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changeset
|
843 OP_IMPL(M68K_BCHG, translate_m68k_bit), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
844 OP_IMPL(M68K_BCLR, translate_m68k_bit), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
845 OP_IMPL(M68K_BSET, translate_m68k_bit), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
846 OP_IMPL(M68K_BTST, translate_m68k_bit), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
847 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
848 //data movement |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
849 RAW_IMPL(M68K_MOVE, translate_m68k_move), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
850 RAW_IMPL(M68K_MOVEM, translate_m68k_movem), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
851 RAW_IMPL(M68K_MOVEP, translate_m68k_movep), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
852 RAW_IMPL(M68K_MOVE_USP, translate_m68k_move_usp), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
853 RAW_IMPL(M68K_LEA, translate_m68k_lea_pea), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
854 RAW_IMPL(M68K_PEA, translate_m68k_lea_pea), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
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changeset
|
855 RAW_IMPL(M68K_CLR, translate_m68k_clr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
856 OP_IMPL(M68K_EXG, translate_m68k_exg), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
857 RAW_IMPL(M68K_SCC, translate_m68k_scc), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
858 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
859 //function calls and branches |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
860 RAW_IMPL(M68K_BCC, translate_m68k_bcc), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
861 RAW_IMPL(M68K_BSR, translate_m68k_bsr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
862 RAW_IMPL(M68K_DBCC, translate_m68k_dbcc), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
863 RAW_IMPL(M68K_JMP, translate_m68k_jmp_jsr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
864 RAW_IMPL(M68K_JSR, translate_m68k_jmp_jsr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
865 RAW_IMPL(M68K_RTS, translate_m68k_rts), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
866 RAW_IMPL(M68K_RTE, translate_m68k_rte), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
867 RAW_IMPL(M68K_RTR, translate_m68k_rtr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
868 RAW_IMPL(M68K_LINK, translate_m68k_link), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
869 RAW_IMPL(M68K_UNLK, translate_m68k_unlk), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
870 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
871 //SR/CCR stuff |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
582
diff
changeset
|
872 RAW_IMPL(M68K_ANDI_CCR, translate_m68k_andi_ori_ccr_sr), |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
582
diff
changeset
|
873 RAW_IMPL(M68K_ANDI_SR, translate_m68k_andi_ori_ccr_sr), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
874 RAW_IMPL(M68K_EORI_CCR, translate_m68k_eori_ccr_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
875 RAW_IMPL(M68K_EORI_SR, translate_m68k_eori_ccr_sr), |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
582
diff
changeset
|
876 RAW_IMPL(M68K_ORI_CCR, translate_m68k_andi_ori_ccr_sr), |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
582
diff
changeset
|
877 RAW_IMPL(M68K_ORI_SR, translate_m68k_andi_ori_ccr_sr), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
878 OP_IMPL(M68K_MOVE_CCR, translate_m68k_move_ccr_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
879 OP_IMPL(M68K_MOVE_SR, translate_m68k_move_ccr_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
880 OP_IMPL(M68K_MOVE_FROM_SR, translate_m68k_move_from_sr), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
881 RAW_IMPL(M68K_STOP, translate_m68k_stop), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
882 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
883 //traps |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
884 OP_IMPL(M68K_CHK, translate_m68k_chk), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
885 RAW_IMPL(M68K_TRAP, translate_m68k_trap), |
992
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
886 RAW_IMPL(M68K_A_LINE_TRAP, translate_m68k_trap), |
261995d06897
Implemented A line and F line traps.
Michael Pavone <pavone@retrodev.com>
parents:
990
diff
changeset
|
887 RAW_IMPL(M68K_F_LINE_TRAP, translate_m68k_trap), |
839 | 888 RAW_IMPL(M68K_TRAPV, translate_m68k_trapv), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
889 RAW_IMPL(M68K_ILLEGAL, translate_m68k_illegal), |
986
f680fe746a7d
Implement illegal instruction trap
Michael Pavone <pavone@retrodev.com>
parents:
985
diff
changeset
|
890 RAW_IMPL(M68K_INVALID, translate_m68k_illegal), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
891 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
892 //misc |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
893 RAW_IMPL(M68K_NOP, translate_m68k_nop), |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
894 RAW_IMPL(M68K_RESET, translate_m68k_reset), |
837 | 895 RAW_IMPL(M68K_TAS, translate_m68k_tas), |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
896 }; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
897 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1082
diff
changeset
|
898 static void translate_m68k(m68k_options * opts, m68kinst * inst) |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
899 { |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
900 if (inst->address & 1) { |
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
901 translate_m68k_odd(opts, inst); |
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
902 return; |
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
903 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
904 check_cycles_int(&opts->gen, inst->address); |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
905 //log_address(&opts->gen, inst->address, "M68K: %X @ %d\n"); |
981
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
906 if ( |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
907 (inst->src.addr_mode > MODE_AREG && inst->src.addr_mode < MODE_IMMEDIATE) |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
908 || (inst->dst.addr_mode > MODE_AREG && inst->dst.addr_mode < MODE_IMMEDIATE) |
989
d70000fdff0b
Implemented IR and undefined bits of info word for address error exception frames
Michael Pavone <pavone@retrodev.com>
parents:
988
diff
changeset
|
909 || (inst->op == M68K_BCC && (inst->src.params.immed & 1)) |
981
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
910 ) { |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
911 //Not accurate for all cases, but probably good enough for now |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
912 m68k_set_last_prefetch(opts, inst->address + inst->bytes); |
902c53d9c16f
Half assed, prefetch based open bus value emulation. Gets BlastEm up to 119/122 in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
979
diff
changeset
|
913 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
914 impl_info * info = m68k_impls + inst->op; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
915 if (info->itype == RAW_FUNC) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
916 info->impl.raw(opts, inst); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
917 return; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
918 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
919 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
920 host_ea src_op, dst_op; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
921 if (inst->src.addr_mode != MODE_UNUSED) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
922 translate_m68k_op(inst, &src_op, opts, 0); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
923 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
924 if (inst->dst.addr_mode != MODE_UNUSED) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
925 translate_m68k_op(inst, &dst_op, opts, 1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
926 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
927 if (info->itype == OP_FUNC) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
928 info->impl.op(opts, inst, &src_op, &dst_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
929 } else if (info->itype == BINARY_ARITH) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
930 translate_m68k_arith(opts, inst, info->impl.flag_mask, &src_op, &dst_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
931 } else if (info->itype == UNARY_ARITH) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
932 translate_m68k_unary(opts, inst, info->impl.flag_mask, inst->dst.addr_mode != MODE_UNUSED ? &dst_op : &src_op); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
933 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
934 m68k_disasm(inst, disasm_buf); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
935 fatal_error("%X: %s\ninstruction %d not yet implemented\n", inst->address, disasm_buf, inst->op); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
936 } |
894
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
937 if (opts->gen.code.stack_off) { |
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
938 m68k_disasm(inst, disasm_buf); |
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
939 fatal_error("Stack offset is %X after %X: %s\n", opts->gen.code.stack_off, inst->address, disasm_buf); |
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
940 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
941 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
942 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
943 void translate_m68k_stream(uint32_t address, m68k_context * context) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
944 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
945 m68kinst instbuf; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
946 m68k_options * opts = context->options; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
947 code_info *code = &opts->gen.code; |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
948 if(get_native_address(opts, address)) { |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
949 return; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
950 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
951 uint16_t *encoded, *next; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
952 do { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
953 if (opts->address_log) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
954 fprintf(opts->address_log, "%X\n", address); |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
955 fflush(opts->address_log); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
956 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
957 do { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
958 encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
959 if (!encoded) { |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
960 code_ptr start = code->cur; |
1082
2ec5e6eaf81d
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents:
1027
diff
changeset
|
961 translate_out_of_bounds(opts, address); |
1228
2e6dcb5c11a2
WIP support for XBAND mapper hardware
Michael Pavone <pavone@retrodev.com>
parents:
1214
diff
changeset
|
962 code_ptr after = code->cur; |
1275
f36ef4847ef2
Fix bug in handling of translating unmapped addresses
Michael Pavone <pavone@retrodev.com>
parents:
1262
diff
changeset
|
963 map_native_address(context, address, start, 2, after-start); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
964 break; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
965 } |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
966 code_ptr existing = get_native_address(opts, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
967 if (existing) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
968 jmp(code, existing); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
969 break; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
970 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
971 next = m68k_decode(encoded, &instbuf, address); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
972 if (instbuf.op == M68K_INVALID) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
973 instbuf.src.params.immed = *encoded; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
974 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
975 uint16_t m68k_size = (next-encoded)*2; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
976 address += m68k_size; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
977 //char disbuf[1024]; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
978 //m68k_disasm(&instbuf, disbuf); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
979 //printf("%X: %s\n", instbuf.address, disbuf); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
980 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
981 //make sure the beginning of the code for an instruction is contiguous |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
982 check_code_prologue(code); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
983 code_ptr start = code->cur; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
984 translate_m68k(opts, &instbuf); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
985 code_ptr after = code->cur; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
986 map_native_address(context, instbuf.address, start, m68k_size, after-start); |
987
1f09994e92c5
Initial stab at implementing address error exceptions. Need to fill in the value of IR, undefined bits of last stack frame word and properly deal with address errors that occur during exception processing.
Michael Pavone <pavone@retrodev.com>
parents:
986
diff
changeset
|
987 } while(!m68k_is_terminal(&instbuf) && !(address & 1)); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
988 process_deferred(&opts->gen.deferred, context, (native_addr_func)get_native_from_context); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
989 if (opts->gen.deferred) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
990 address = opts->gen.deferred->address; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
991 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
992 } while(opts->gen.deferred); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
993 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
994 |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
995 void * m68k_retranslate_inst(uint32_t address, m68k_context * context) |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
996 { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
997 m68k_options * opts = context->options; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
998 code_info *code = &opts->gen.code; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
999 uint8_t orig_size = get_native_inst_size(opts, address); |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1000 code_ptr orig_start = get_native_address(context->options, address); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1001 uint32_t orig = address; |
902
6011409ded0d
Fix a few lingering stack alignment rework bugs
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
1002 code_info orig_code = {orig_start, orig_start + orig_size + 5, 0}; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1003 uint16_t *after, *inst = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1004 m68kinst instbuf; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1005 after = m68k_decode(inst, &instbuf, orig); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1006 if (orig_size != MAX_NATIVE_SIZE) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1007 deferred_addr * orig_deferred = opts->gen.deferred; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1008 |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1009 //make sure we have enough code space for the max size instruction |
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1010 check_alloc_code(code, MAX_NATIVE_SIZE); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1011 code_ptr native_start = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1012 translate_m68k(opts, &instbuf); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1013 code_ptr native_end = code->cur; |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1014 /*uint8_t is_terminal = m68k_is_terminal(&instbuf); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1015 if ((native_end - native_start) <= orig_size) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1016 code_ptr native_next; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1017 if (!is_terminal) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1018 native_next = get_native_address(context->native_code_map, orig + (after-inst)*2); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1019 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1020 if (is_terminal || (native_next && ((native_next == orig_start + orig_size) || (orig_size - (native_end - native_start)) > 5))) { |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1021 printf("Using original location: %p\n", orig_code.cur); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1022 remove_deferred_until(&opts->gen.deferred, orig_deferred); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1023 code_info tmp; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1024 tmp.cur = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1025 tmp.last = code->last; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1026 code->cur = orig_code.cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1027 code->last = orig_code.last; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1028 translate_m68k(opts, &instbuf); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1029 native_end = orig_code.cur = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1030 code->cur = tmp.cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1031 code->last = tmp.last; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1032 if (!is_terminal) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1033 nop_fill_or_jmp_next(&orig_code, orig_start + orig_size, native_next); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1034 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1035 m68k_handle_deferred(context); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1036 return orig_start; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1037 } |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1038 }*/ |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1039 |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1040 map_native_address(context, instbuf.address, native_start, (after-inst)*2, MAX_NATIVE_SIZE); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1041 |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1042 jmp(&orig_code, native_start); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1043 if (!m68k_is_terminal(&instbuf)) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1044 code_ptr native_end = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1045 code->cur = native_start + MAX_NATIVE_SIZE; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1046 code_ptr rest = get_native_address_trans(context, orig + (after-inst)*2); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1047 code_ptr tmp = code->cur; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1048 code->cur = native_end; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1049 jmp(code, rest); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1050 code->cur = tmp; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1051 } else { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1052 code->cur = native_start + MAX_NATIVE_SIZE; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1053 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1054 m68k_handle_deferred(context); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1055 return native_start; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1056 } else { |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1057 code_info tmp = *code; |
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1058 *code = orig_code; |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1059 translate_m68k(opts, &instbuf); |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1060 orig_code = *code; |
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1061 *code = tmp; |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1062 if (!m68k_is_terminal(&instbuf)) { |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1063 jmp(&orig_code, get_native_address_trans(context, orig + (after-inst)*2)); |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1064 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1065 m68k_handle_deferred(context); |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1066 return orig_start; |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1067 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1068 } |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
1069 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1070 code_ptr get_native_address_trans(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1071 { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1072 code_ptr ret = get_native_address(context->options, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1073 if (!ret) { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1074 translate_m68k_stream(address, context); |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1075 ret = get_native_address(context->options, address); |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1076 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1077 return ret; |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1078 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1079 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1080 void remove_breakpoint(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1081 { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
725
diff
changeset
|
1082 code_ptr native = get_native_address(context->options, address); |
673
7f1b5570b2a1
Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
1083 code_info tmp = context->options->gen.code; |
7f1b5570b2a1
Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
1084 context->options->gen.code.cur = native; |
706
0a6dea8c8083
Fix problem with removing breakpoints
Michael Pavone <pavone@retrodev.com>
parents:
701
diff
changeset
|
1085 context->options->gen.code.last = native + MAX_NATIVE_SIZE; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1086 check_cycles_int(&context->options->gen, address); |
673
7f1b5570b2a1
Fix 68K remove_breakpoint
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
1087 context->options->gen.code = tmp; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1088 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1089 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1090 void start_68k_context(m68k_context * context, uint32_t address) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1091 { |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1092 code_ptr addr = get_native_address_trans(context, address); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1093 m68k_options * options = context->options; |
883
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1094 context->should_return = 0; |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1095 options->start_context(addr, context); |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1096 } |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1097 |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1098 void resume_68k(m68k_context *context) |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1099 { |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1100 code_ptr addr = context->resume_pc; |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1101 context->resume_pc = NULL; |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1102 m68k_options * options = context->options; |
9f149f0e98b7
It is now possible to switch back and forth between the menu ROM and the game
Michael Pavone <pavone@retrodev.com>
parents:
839
diff
changeset
|
1103 context->should_return = 0; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1104 options->start_context(addr, context); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1105 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1106 |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1107 void m68k_reset(m68k_context * context) |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1108 { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1109 //TODO: Actually execute the M68K reset vector rather than simulating some of its behavior |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1110 uint16_t *reset_vec = get_native_pointer(0, (void **)context->mem_pointers, &context->options->gen); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1111 context->aregs[7] = reset_vec[0] << 16 | reset_vec[1]; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
614
diff
changeset
|
1112 uint32_t address = reset_vec[2] << 16 | reset_vec[3]; |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1113 start_68k_context(context, address); |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1114 } |
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1115 |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1116 void m68k_options_free(m68k_options *opts) |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1117 { |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1118 free(opts->gen.native_code_map); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1119 free(opts->gen.ram_inst_sizes); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1120 free(opts); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1121 } |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
883
diff
changeset
|
1122 |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1123 |
1082
2ec5e6eaf81d
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents:
1027
diff
changeset
|
1124 m68k_context * init_68k_context(m68k_options * opts, m68k_reset_handler reset_handler) |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1125 { |
796
41f73c76b978
Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents:
726
diff
changeset
|
1126 size_t ctx_size = sizeof(m68k_context) + ram_size(&opts->gen) / (1 << opts->gen.ram_flags_shift) / 8; |
41f73c76b978
Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents:
726
diff
changeset
|
1127 m68k_context * context = malloc(ctx_size); |
41f73c76b978
Fix some memory issues
=?UTF-8?q?Higor=20Eur=C3=ADpedes?= <heuripedes@gmail.com>
parents:
726
diff
changeset
|
1128 memset(context, 0, ctx_size); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1129 context->options = opts; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
1130 context->int_cycle = CYCLE_NEVER; |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1131 context->status = 0x27; |
1082
2ec5e6eaf81d
Add support for specifying a reset handler in the M68K core. Adjust memory map initialization to handle extra field. Improved handling of out of bounds execution.
Michael Pavone <pavone@retrodev.com>
parents:
1027
diff
changeset
|
1132 context->reset_handler = (code_ptr)reset_handler; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
1133 return context; |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1134 } |