Mercurial > repos > blastem
annotate backend_x86.c @ 592:4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
author | Michael Pavone <pavone@retrodev.com> |
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date | Wed, 17 Dec 2014 23:03:19 -0800 |
parents | ea80559c67cb |
children | 5ef3fe516da9 |
rev | line source |
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567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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1 #include "backend.h" |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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2 #include "gen_x86.h" |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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3 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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4 void cycles(cpu_options *opts, uint32_t num) |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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5 { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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6 add_ir(&opts->code, num, opts->cycles, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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7 } |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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parents:
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8 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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9 void check_cycles_int(cpu_options *opts, uint32_t address) |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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10 { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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11 code_info *code = &opts->code; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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12 cmp_rr(code, opts->cycles, opts->limit, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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13 code_ptr jmp_off = code->cur+1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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14 jcc(code, CC_NC, jmp_off+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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15 mov_ir(code, address, opts->scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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16 call(code, opts->handle_cycle_limit_int); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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17 *jmp_off = code->cur - (jmp_off+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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18 } |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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19 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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parents:
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20 void check_cycles(cpu_options * opts) |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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parents:
diff
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21 { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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22 code_info *code = &opts->code; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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parents:
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23 cmp_rr(code, opts->cycles, opts->limit, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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24 check_alloc_code(code, MAX_INST_LEN*2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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25 code_ptr jmp_off = code->cur+1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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26 jcc(code, CC_NC, jmp_off+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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27 call(code, opts->handle_cycle_limit); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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28 *jmp_off = code->cur - (jmp_off+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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29 } |
589
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30 |
590
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WIP effort to update z80 core for code gen changes
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31 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc) |
589
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32 { |
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33 code_info *code = &opts->code; |
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34 code_ptr start = code->cur; |
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35 check_cycles(opts); |
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36 cycles(opts, opts->bus_cycles); |
590
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37 if (after_inc) { |
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38 *after_inc = code->cur; |
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39 } |
589
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40 if (opts->address_size == SZ_D && opts->address_mask < 0xFFFFFFFF) { |
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41 and_ir(code, opts->address_mask, opts->scratch1, SZ_D); |
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42 } |
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43 code_ptr lb_jcc = NULL, ub_jcc = NULL; |
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44 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8; |
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45 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1; |
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46 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ; |
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47 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B; |
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48 for (uint32_t chunk = 0; chunk < num_chunks; chunk++) |
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49 { |
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50 if (memmap[chunk].start > 0) { |
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51 cmp_ir(code, memmap[chunk].start, adr_reg, opts->address_size); |
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52 lb_jcc = code->cur + 1; |
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53 jcc(code, CC_C, code->cur + 2); |
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54 } |
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55 if (memmap[chunk].end < opts->max_address) { |
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56 cmp_ir(code, memmap[chunk].end, adr_reg, opts->address_size); |
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57 ub_jcc = code->cur + 1; |
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58 jcc(code, CC_NC, code->cur + 2); |
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59 } |
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60 |
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61 if (memmap[chunk].mask != opts->address_mask) { |
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62 and_ir(code, memmap[chunk].mask, adr_reg, opts->address_size); |
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63 } |
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64 void * cfun; |
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65 switch (fun_type) |
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66 { |
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67 case READ_16: |
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68 cfun = memmap[chunk].read_16; |
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69 break; |
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70 case READ_8: |
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71 cfun = memmap[chunk].read_8; |
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72 break; |
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73 case WRITE_16: |
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74 cfun = memmap[chunk].write_16; |
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75 break; |
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76 case WRITE_8: |
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77 cfun = memmap[chunk].write_8; |
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78 break; |
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79 default: |
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80 cfun = NULL; |
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81 } |
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82 if(memmap[chunk].buffer && memmap[chunk].flags & access_flag) { |
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83 if (memmap[chunk].flags & MMAP_PTR_IDX) { |
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84 if (memmap[chunk].flags & MMAP_FUNC_NULL) { |
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85 cmp_irdisp(code, 0, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, SZ_PTR); |
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86 code_ptr not_null = code->cur + 1; |
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87 jcc(code, CC_NZ, code->cur + 2); |
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88 call(code, opts->save_context); |
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89 #ifdef X86_64 |
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90 if (is_write) { |
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91 if (opts->scratch2 != RDI) { |
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92 mov_rr(code, opts->scratch2, RDI, opts->address_size); |
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93 } |
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94 mov_rr(code, opts->scratch1, RDX, size); |
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95 } else { |
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96 push_r(code, opts->context_reg); |
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97 mov_rr(code, opts->scratch1, RDI, opts->address_size); |
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98 } |
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99 test_ir(code, 8, RSP, opts->address_size); |
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100 code_ptr adjust_rsp = code->cur + 1; |
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101 jcc(code, CC_NZ, code->cur + 2); |
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102 call(code, cfun); |
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103 code_ptr no_adjust = code->cur + 1; |
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104 jmp(code, code->cur + 2); |
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105 *adjust_rsp = code->cur - (adjust_rsp + 1); |
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106 sub_ir(code, 8, RSP, SZ_PTR); |
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107 call(code, cfun); |
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108 add_ir(code, 8, RSP, SZ_PTR); |
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109 *no_adjust = code->cur - (no_adjust + 1); |
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110 #else |
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111 if (is_write) { |
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112 push_r(code, opts->scratch1); |
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113 } else { |
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114 push_r(code, opts->context_reg);//save opts->context_reg for later |
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115 } |
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116 push_r(code, opts->context_reg); |
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117 push_r(code, is_write ? opts->scratch2 : opts->scratch1); |
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118 call(code, cfun); |
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119 add_ir(code, is_write ? 12 : 8, RSP, opts->address_size); |
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120 #endif |
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121 if (is_write) { |
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122 mov_rr(code, RAX, opts->context_reg, SZ_PTR); |
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123 } else { |
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124 pop_r(code, opts->context_reg); |
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125 mov_rr(code, RAX, opts->scratch1, size); |
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126 } |
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127 jmp(code, opts->load_context); |
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128 |
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129 *not_null = code->cur - (not_null + 1); |
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130 } |
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131 if (opts->byte_swap && size == SZ_B) { |
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132 xor_ir(code, 1, adr_reg, opts->address_size); |
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133 } |
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134 if (opts->address_size != SZ_D) { |
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135 movzx_rr(code, adr_reg, adr_reg, opts->address_size, SZ_D); |
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136 } |
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137 add_rdispr(code, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, adr_reg, SZ_PTR); |
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138 if (is_write) { |
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139 mov_rrind(code, opts->scratch1, opts->scratch2, size); |
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140 |
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141 } else { |
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142 mov_rindr(code, opts->scratch1, opts->scratch1, size); |
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143 } |
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144 } else { |
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145 uint8_t tmp_size = size; |
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146 if (size == SZ_B) { |
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147 if ((memmap[chunk].flags & MMAP_ONLY_ODD) || (memmap[chunk].flags & MMAP_ONLY_EVEN)) { |
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148 bt_ir(code, 0, adr_reg, opts->address_size); |
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149 code_ptr good_addr = code->cur + 1; |
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150 jcc(code, (memmap[chunk].flags & MMAP_ONLY_ODD) ? CC_C : CC_NC, code->cur + 2); |
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151 if (!is_write) { |
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152 mov_ir(code, 0xFF, opts->scratch1, SZ_B); |
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153 } |
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154 retn(code); |
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155 *good_addr = code->cur - (good_addr + 1); |
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156 shr_ir(code, 1, adr_reg, opts->address_size); |
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157 } else { |
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158 xor_ir(code, 1, adr_reg, opts->address_size); |
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159 } |
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160 } else if ((memmap[chunk].flags & MMAP_ONLY_ODD) || (memmap[chunk].flags & MMAP_ONLY_EVEN)) { |
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161 tmp_size = SZ_B; |
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162 shr_ir(code, 1, adr_reg, opts->address_size); |
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163 if ((memmap[chunk].flags & MMAP_ONLY_EVEN) && is_write) { |
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164 shr_ir(code, 8, opts->scratch1, SZ_W); |
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165 } |
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166 } |
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167 if ((intptr_t)memmap[chunk].buffer <= 0x7FFFFFFF && (intptr_t)memmap[chunk].buffer >= -2147483648) { |
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168 if (is_write) { |
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169 mov_rrdisp(code, opts->scratch1, opts->scratch2, (intptr_t)memmap[chunk].buffer, tmp_size); |
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170 } else { |
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171 mov_rdispr(code, opts->scratch1, (intptr_t)memmap[chunk].buffer, opts->scratch1, tmp_size); |
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172 } |
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173 } else { |
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174 if (is_write) { |
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175 push_r(code, opts->scratch1); |
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176 mov_ir(code, (intptr_t)memmap[chunk].buffer, opts->scratch1, SZ_PTR); |
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177 add_rr(code, opts->scratch1, opts->scratch2, SZ_PTR); |
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178 pop_r(code, opts->scratch1); |
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179 mov_rrind(code, opts->scratch1, opts->scratch2, tmp_size); |
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180 } else { |
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181 mov_ir(code, (intptr_t)memmap[chunk].buffer, opts->scratch2, SZ_PTR); |
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182 mov_rindexr(code, opts->scratch2, opts->scratch1, 1, opts->scratch1, tmp_size); |
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183 } |
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184 } |
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185 if (size != tmp_size && !is_write) { |
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186 if (memmap[chunk].flags & MMAP_ONLY_EVEN) { |
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187 shl_ir(code, 8, opts->scratch1, SZ_W); |
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188 mov_ir(code, 0xFF, opts->scratch1, SZ_B); |
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189 } else { |
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190 or_ir(code, 0xFF00, opts->scratch1, SZ_W); |
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191 } |
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192 } |
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193 } |
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194 if (is_write && (memmap[chunk].flags & MMAP_CODE)) { |
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195 //TODO: Fixme for Z80 |
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196 mov_rr(code, opts->scratch2, opts->scratch1, opts->address_size); |
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197 shr_ir(code, 11, opts->scratch1, opts->address_size); |
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198 bt_rrdisp(code, opts->scratch1, opts->context_reg, opts->ram_flags_off, opts->address_size); |
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199 code_ptr not_code = code->cur + 1; |
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200 jcc(code, CC_NC, code->cur + 2); |
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201 call(code, opts->save_context); |
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202 #ifdef X86_32 |
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203 push_r(code, opts->context_reg); |
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204 push_r(code, opts->scratch2); |
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205 #endif |
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206 call(code, opts->handle_code_write); |
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207 #ifdef X86_32 |
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208 add_ir(code, 8, RSP, SZ_D); |
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209 #endif |
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210 mov_rr(code, RAX, opts->context_reg, SZ_PTR); |
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211 call(code, opts->load_context); |
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212 *not_code = code->cur - (not_code+1); |
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213 } |
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214 retn(code); |
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215 } else if (cfun) { |
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216 call(code, opts->save_context); |
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217 #ifdef X86_64 |
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218 if (is_write) { |
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219 if (opts->scratch2 != RDI) { |
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220 mov_rr(code, opts->scratch2, RDI, opts->address_size); |
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221 } |
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222 mov_rr(code, opts->scratch1, RDX, size); |
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223 } else { |
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224 push_r(code, opts->context_reg); |
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225 mov_rr(code, opts->scratch1, RDI, opts->address_size); |
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226 } |
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227 test_ir(code, 8, RSP, SZ_D); |
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228 code_ptr adjust_rsp = code->cur + 1; |
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229 jcc(code, CC_NZ, code->cur + 2); |
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230 call(code, cfun); |
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231 code_ptr no_adjust = code->cur + 1; |
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232 jmp(code, code->cur + 2); |
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233 *adjust_rsp = code->cur - (adjust_rsp + 1); |
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234 sub_ir(code, 8, RSP, SZ_PTR); |
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235 call(code, cfun); |
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236 add_ir(code, 8, RSP, SZ_PTR); |
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237 *no_adjust = code->cur - (no_adjust+1); |
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238 #else |
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239 if (is_write) { |
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240 push_r(code, opts->scratch1); |
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241 } else { |
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242 push_r(code, opts->context_reg);//save opts->context_reg for later |
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243 } |
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244 push_r(code, opts->context_reg); |
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245 push_r(code, is_write ? opts->scratch2 : opts->scratch1); |
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246 call(code, cfun); |
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247 add_ir(code, is_write ? 12 : 8, RSP, SZ_D); |
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248 #endif |
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249 if (is_write) { |
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250 mov_rr(code, RAX, opts->context_reg, SZ_PTR); |
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251 } else { |
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252 pop_r(code, opts->context_reg); |
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253 mov_rr(code, RAX, opts->scratch1, size); |
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254 } |
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255 jmp(code, opts->load_context); |
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256 } else { |
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257 //Not sure the best course of action here |
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258 if (!is_write) { |
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259 mov_ir(code, size == SZ_B ? 0xFF : 0xFFFF, opts->scratch1, size); |
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260 } |
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261 retn(code); |
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262 } |
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263 if (lb_jcc) { |
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264 *lb_jcc = code->cur - (lb_jcc+1); |
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265 lb_jcc = NULL; |
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266 } |
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267 if (ub_jcc) { |
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268 *ub_jcc = code->cur - (ub_jcc+1); |
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269 ub_jcc = NULL; |
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270 } |
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271 } |
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272 if (!is_write) { |
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273 mov_ir(code, size == SZ_B ? 0xFF : 0xFFFF, opts->scratch1, size); |
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274 } |
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275 retn(code); |
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276 return start; |
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277 } |