Mercurial > repos > blastem
annotate blastem.c @ 774:41dc895e85ff
Fix map for NFL Quarterback Club 96. Fix default EEPROM value. Initial work for supporing Sega mapper in ROM DB
author | Michael Pavone <pavone@retrodev.com> |
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date | Sun, 19 Jul 2015 20:51:09 -0700 |
parents | a3b90f746dcf |
children | cbf97d335444 |
rev | line source |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "68kinst.h" |
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7 #include "m68k_core.h" |
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8 #include "z80_to_x86.h" |
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9 #include "mem.h" |
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10 #include "vdp.h" |
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11 #include "render.h" |
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12 #include "blastem.h" |
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13 #include "gdb_remote.h" |
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14 #include "gst.h" |
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15 #include "util.h" |
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16 #include "romdb.h" |
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17 #include <stdio.h> |
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18 #include <stdlib.h> |
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19 #include <string.h> |
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20 |
531 | 21 #define BLASTEM_VERSION "0.2.0" |
464 | 22 |
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23 #define MCLKS_NTSC 53693175 |
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24 #define MCLKS_PAL 53203395 |
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25 |
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26 #define MCLKS_PER_68K 7 |
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27 #define MCLKS_PER_YM MCLKS_PER_68K |
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28 #define MCLKS_PER_Z80 15 |
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29 #define MCLKS_PER_PSG (MCLKS_PER_Z80*16) |
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30 |
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31 //TODO: Figure out the exact value for this |
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32 #define LINES_NTSC 262 |
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33 #define LINES_PAL 312 |
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34 |
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35 #define MAX_SOUND_CYCLES 100000 |
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36 |
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37 uint16_t cart[CARTRIDGE_WORDS]; |
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38 uint16_t ram[RAM_WORDS]; |
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39 uint8_t z80_ram[Z80_RAM_BYTES]; |
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40 |
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41 int headless = 0; |
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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42 int exit_after = 0; |
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43 int z80_enabled = 1; |
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44 int frame_limit = 0; |
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45 |
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46 tern_node * config; |
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47 |
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48 #ifndef MIN |
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49 #define MIN(a,b) ((a) < (b) ? (a) : (b)) |
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50 #endif |
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51 |
166 | 52 #define SMD_HEADER_SIZE 512 |
53 #define SMD_MAGIC1 0x03 | |
54 #define SMD_MAGIC2 0xAA | |
55 #define SMD_MAGIC3 0xBB | |
56 #define SMD_BLOCK_SIZE 0x4000 | |
57 | |
58 int load_smd_rom(long filesize, FILE * f) | |
59 { | |
60 uint8_t block[SMD_BLOCK_SIZE]; | |
61 filesize -= SMD_HEADER_SIZE; | |
62 fseek(f, SMD_HEADER_SIZE, SEEK_SET); | |
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63 |
166 | 64 uint16_t * dst = cart; |
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65 int rom_size = filesize; |
166 | 66 while (filesize > 0) { |
67 fread(block, 1, SMD_BLOCK_SIZE, f); | |
68 for (uint8_t *low = block, *high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) { | |
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69 *(dst++) = *low << 8 | *high; |
166 | 70 } |
71 filesize -= SMD_BLOCK_SIZE; | |
72 } | |
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73 return filesize; |
166 | 74 } |
75 | |
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76 void byteswap_rom() |
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77 { |
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78 for(unsigned short * cur = cart; cur - cart < CARTRIDGE_WORDS; ++cur) |
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79 { |
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80 *cur = (*cur >> 8) | (*cur << 8); |
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81 } |
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82 } |
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83 |
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84 int load_rom(char * filename) |
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85 { |
166 | 86 uint8_t header[10]; |
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87 FILE * f = fopen(filename, "rb"); |
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88 if (!f) { |
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89 return 0; |
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90 } |
166 | 91 fread(header, 1, sizeof(header), f); |
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92 fseek(f, 0, SEEK_END); |
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93 long filesize = ftell(f); |
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94 if (filesize/2 > CARTRIDGE_WORDS) { |
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95 //carts bigger than 4MB not currently supported |
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96 filesize = CARTRIDGE_WORDS*2; |
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97 } |
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98 fseek(f, 0, SEEK_SET); |
166 | 99 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) { |
100 int i; | |
101 for (i = 3; i < 8; i++) { | |
102 if (header[i] != 0) { | |
103 break; | |
104 } | |
105 } | |
106 if (i == 8) { | |
107 if (header[2]) { | |
108 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename); | |
109 exit(1); | |
110 } | |
111 return load_smd_rom(filesize, f); | |
112 } | |
113 } | |
114 fread(cart, 2, filesize/2, f); | |
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115 fclose(f); |
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116 return filesize; |
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117 } |
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118 |
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119 uint16_t read_dma_value(uint32_t address) |
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120 { |
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121 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2 |
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122 if (address < 0x200000) { |
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123 return cart[address]; |
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124 } else if(address >= 0x700000) { |
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125 return ram[address & 0x7FFF]; |
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126 } |
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127 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area |
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128 return 0; |
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129 } |
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130 |
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131 void adjust_int_cycle(m68k_context * context, vdp_context * v_context) |
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132 { |
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133 //static int old_int_cycle = CYCLE_NEVER; |
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134 genesis_context *gen = context->system; |
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135 if (context->sync_cycle - context->current_cycle > gen->max_cycles) { |
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136 context->sync_cycle = context->current_cycle + gen->max_cycles; |
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137 } |
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138 context->int_cycle = CYCLE_NEVER; |
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139 if ((context->status & 0x7) < 6) { |
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140 uint32_t next_vint = vdp_next_vint(v_context); |
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141 if (next_vint != CYCLE_NEVER) { |
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142 context->int_cycle = next_vint; |
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143 context->int_num = 6; |
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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diff
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|
144 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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diff
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|
145 if ((context->status & 0x7) < 4) { |
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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diff
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|
146 uint32_t next_hint = vdp_next_hint(v_context); |
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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diff
changeset
|
147 if (next_hint != CYCLE_NEVER) { |
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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parents:
290
diff
changeset
|
148 if (next_hint < context->int_cycle) { |
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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parents:
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diff
changeset
|
149 context->int_cycle = next_hint; |
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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diff
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|
150 context->int_num = 4; |
488
32f053ad9b02
Basic OpenGL rendering is working
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diff
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|
151 |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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parents:
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diff
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|
152 } |
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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parents:
290
diff
changeset
|
153 } |
186
02e25abe2dcd
Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
154 } |
02e25abe2dcd
Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
155 } |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
700
diff
changeset
|
156 /*if (context->int_cycle != old_int_cycle) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
700
diff
changeset
|
157 printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->current_cycle, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter); |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
700
diff
changeset
|
158 old_int_cycle = context->int_cycle; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
700
diff
changeset
|
159 }*/ |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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parents:
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diff
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|
160 |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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parents:
290
diff
changeset
|
161 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle; |
488
32f053ad9b02
Basic OpenGL rendering is working
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parents:
487
diff
changeset
|
162 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n", |
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
163 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7), |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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parents:
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diff
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|
164 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/ |
186
02e25abe2dcd
Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
165 } |
02e25abe2dcd
Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
166 |
198
209a37eed3e7
Add support for breaking into the debugger while game is running
Mike Pavone <pavone@retrodev.com>
parents:
197
diff
changeset
|
167 int break_on_sync = 0; |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
447
diff
changeset
|
168 int save_state = 0; |
260
625f8e4d5fd2
Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
215
diff
changeset
|
169 |
280 | 170 //#define DO_DEBUG_PRINT |
268
6c2d7e003a55
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parents:
266
diff
changeset
|
171 #ifdef DO_DEBUG_PRINT |
6c2d7e003a55
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Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
172 #define dprintf printf |
271
969ee17471c5
Protect debug prints for busreq/reset regs with appropriate macros
Mike Pavone <pavone@retrodev.com>
parents:
268
diff
changeset
|
173 #define dputs puts |
268
6c2d7e003a55
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diff
changeset
|
174 #else |
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parents:
266
diff
changeset
|
175 #define dprintf |
271
969ee17471c5
Protect debug prints for busreq/reset regs with appropriate macros
Mike Pavone <pavone@retrodev.com>
parents:
268
diff
changeset
|
176 #define dputs |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
177 #endif |
6c2d7e003a55
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parents:
266
diff
changeset
|
178 |
402
de2c085ce174
Assert z80 interrupt longer so that they are not missed when they should not be
Mike Pavone <pavone@retrodev.com>
parents:
398
diff
changeset
|
179 #define Z80_VINT_DURATION 128 |
de2c085ce174
Assert z80 interrupt longer so that they are not missed when they should not be
Mike Pavone <pavone@retrodev.com>
parents:
398
diff
changeset
|
180 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
181 void z80_next_int_pulse(z80_context * z_context) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
182 { |
682 | 183 genesis_context * gen = z_context->system; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
184 z_context->int_pulse_start = vdp_next_vint_z80(gen->vdp); |
670
f4f3e74b0ce6
Restore Z80 interrupt pulse duration and make a small improvement to debug print output
Michael Pavone <pavone@retrodev.com>
parents:
669
diff
changeset
|
185 z_context->int_pulse_end = z_context->int_pulse_start + Z80_VINT_DURATION * MCLKS_PER_Z80; |
682 | 186 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
187 |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
188 void sync_z80(z80_context * z_context, uint32_t mclks) |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
189 { |
565
9324f721efa6
Add a separate flag/define for disabling the Z80 at compile time to ease refactoring
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
190 #ifndef NO_Z80 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
191 if (z80_enabled) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
192 z80_run(z_context, mclks); |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
534
diff
changeset
|
193 } else |
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
534
diff
changeset
|
194 #endif |
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
534
diff
changeset
|
195 { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
196 z_context->current_cycle = mclks; |
260
625f8e4d5fd2
Initial stab at integartiong Z80 core
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parents:
215
diff
changeset
|
197 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
198 } |
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
199 |
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
200 void sync_sound(genesis_context * gen, uint32_t target) |
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
201 { |
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
202 //printf("YM | Cycle: %d, bpos: %d, PSG | Cycle: %d, bpos: %d\n", gen->ym->current_cycle, gen->ym->buffer_pos, gen->psg->cycles, gen->psg->buffer_pos * 2); |
483
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
203 while (target > gen->psg->cycles && target - gen->psg->cycles > MAX_SOUND_CYCLES) { |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
204 uint32_t cur_target = gen->psg->cycles + MAX_SOUND_CYCLES; |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
205 //printf("Running PSG to cycle %d\n", cur_target); |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
206 psg_run(gen->psg, cur_target); |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
207 //printf("Running YM-2612 to cycle %d\n", cur_target); |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
208 ym_run(gen->ym, cur_target); |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
209 } |
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
210 psg_run(gen->psg, target); |
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
211 ym_run(gen->ym, target); |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
212 |
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
213 //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2); |
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
214 } |
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
374
diff
changeset
|
215 |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
216 uint32_t last_frame_num; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
217 m68k_context * sync_components(m68k_context * context, uint32_t address) |
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
218 { |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
219 genesis_context * gen = context->system; |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
220 vdp_context * v_context = gen->vdp; |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
221 z80_context * z_context = gen->z80; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
222 uint32_t mclks = context->current_cycle; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
223 sync_z80(z_context, mclks); |
695 | 224 sync_sound(gen, mclks); |
736
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
225 while (context->current_cycle > mclks) { |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
226 mclks = context->current_cycle; |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
227 sync_z80(z_context, mclks); |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
228 sync_sound(gen, mclks); |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
229 } |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
230 vdp_run_context(v_context, mclks); |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
231 if (v_context->frame != last_frame_num) { |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
232 //printf("reached frame end %d | MCLK Cycles: %d, Target: %d, VDP cycles: %d, vcounter: %d, hslot: %d\n", last_frame_num, mclks, gen->frame_end, v_context->cycles, v_context->vcounter, v_context->hslot); |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
233 last_frame_num = v_context->frame; |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
234 |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
235 if (!headless) { |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
236 break_on_sync |= wait_render_frame(v_context, frame_limit); |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
237 } else if(exit_after){ |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
238 --exit_after; |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
239 if (!exit_after) { |
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
696
diff
changeset
|
240 exit(0); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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241 } |
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242 } |
697
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243 |
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244 vdp_adjust_cycles(v_context, mclks); |
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245 io_adjust_cycles(gen->ports, context->current_cycle, mclks); |
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246 io_adjust_cycles(gen->ports+1, context->current_cycle, mclks); |
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247 io_adjust_cycles(gen->ports+2, context->current_cycle, mclks); |
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248 context->current_cycle -= mclks; |
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249 z80_adjust_cycles(z_context, mclks); |
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250 gen->ym->current_cycle -= mclks; |
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251 gen->psg->cycles -= mclks; |
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252 if (gen->ym->write_cycle != CYCLE_NEVER) { |
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253 gen->ym->write_cycle = gen->ym->write_cycle >= mclks ? gen->ym->write_cycle - mclks : 0; |
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254 } |
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255 } |
700 | 256 gen->frame_end = vdp_cycles_to_frame_end(v_context); |
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257 context->sync_cycle = gen->frame_end; |
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258 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot); |
317
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Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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259 if (context->int_ack) { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
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260 //printf("acknowledging %d @ %d:%d, vcounter: %d, hslot: %d\n", context->int_ack, context->current_cycle, v_context->cycles, v_context->vcounter, v_context->hslot); |
317
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261 vdp_int_ack(v_context, context->int_ack); |
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262 context->int_ack = 0; |
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263 } |
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264 if (!address && (break_on_sync || save_state)) { |
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265 context->sync_cycle = context->current_cycle + 1; |
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266 } |
186
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Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
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267 adjust_int_cycle(context, v_context); |
451
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268 if (address) { |
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269 if (break_on_sync) { |
695 | 270 break_on_sync = 0; |
271 debugger(context, address); | |
272 } | |
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273 if (save_state && (z_context->pc || (!z_context->reset && !z_context->busreq))) { |
451
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274 save_state = 0; |
667
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275 //advance Z80 core to the start of an instruction |
451
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276 while (!z_context->pc) |
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277 { |
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278 sync_z80(z_context, z_context->current_cycle + MCLKS_PER_Z80); |
451
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279 } |
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280 save_gst(gen, "savestate.gst", address); |
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281 puts("Saved state to savestate.gst"); |
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282 } else if(save_state) { |
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283 context->sync_cycle = context->current_cycle + 1; |
451
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284 } |
198
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285 } |
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286 return context; |
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287 } |
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288 |
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289 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value) |
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290 { |
343
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291 if (vdp_port & 0x2700E0) { |
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292 printf("machine freeze due to write to address %X\n", 0xC00000 | vdp_port); |
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293 exit(1); |
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294 } |
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295 vdp_port &= 0x1F; |
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296 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle); |
198
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297 sync_components(context, 0); |
263
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Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
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298 vdp_context * v_context = context->video_context; |
508
b976c6d6e5fb
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299 genesis_context * gen = context->system; |
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300 if (vdp_port < 0x10) { |
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301 int blocked; |
345
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302 uint32_t before_cycle = v_context->cycles; |
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303 if (vdp_port < 4) { |
697
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304 |
149
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305 while (vdp_data_port_write(v_context, value) < 0) { |
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306 while(v_context->flags & FLAG_DMA_RUN) { |
696
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Added config option to allow specifying a max sync cycle smaller than the end of frame
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307 vdp_run_dma_done(v_context, gen->frame_end); |
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308 if (v_context->cycles >= gen->frame_end) { |
667
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All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
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309 context->current_cycle = v_context->cycles; |
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310 gen->bus_busy = 1; |
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311 sync_components(context, 0); |
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312 gen->bus_busy = 0; |
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313 } |
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314 } |
667
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315 //context->current_cycle = v_context->cycles; |
149
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316 } |
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317 } else if(vdp_port < 8) { |
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318 blocked = vdp_control_port_write(v_context, value); |
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319 if (blocked) { |
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320 while (blocked) { |
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321 while(v_context->flags & FLAG_DMA_RUN) { |
696
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322 vdp_run_dma_done(v_context, gen->frame_end); |
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323 if (v_context->cycles >= gen->frame_end) { |
667
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All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
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324 context->current_cycle = v_context->cycles; |
697
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325 gen->bus_busy = 1; |
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326 sync_components(context, 0); |
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327 gen->bus_busy = 0; |
149
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328 } |
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329 } |
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330 if (blocked < 0) { |
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331 blocked = vdp_control_port_write(v_context, value); |
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332 } else { |
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333 blocked = 0; |
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334 } |
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335 } |
88
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336 } else { |
697
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337 context->sync_cycle = gen->frame_end = vdp_cycles_to_frame_end(v_context); |
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338 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot); |
186
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Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write
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339 adjust_int_cycle(context, v_context); |
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340 } |
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341 } else { |
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342 printf("Illegal write to HV Counter port %X\n", vdp_port); |
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343 exit(1); |
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344 } |
345
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Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall.
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344
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345 if (v_context->cycles != before_cycle) { |
667
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All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
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346 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle); |
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347 context->current_cycle = v_context->cycles; |
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348 //Lock the Z80 out of the bus until the VDP access is complete |
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349 gen->bus_busy = 1; |
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350 sync_z80(gen->z80, v_context->cycles); |
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351 gen->bus_busy = 0; |
345
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352 } |
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353 } else if (vdp_port < 0x18) { |
354
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Initial PSG support. Mostly works, noise channel is borked though.
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354 psg_write(gen->psg, value); |
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355 } else { |
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356 //TODO: Implement undocumented test register(s) |
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357 } |
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358 return context; |
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359 } |
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360 |
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361 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value) |
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362 { |
357
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363 return vdp_port_write(vdp_port, context, vdp_port < 0x10 ? value | value << 8 : ((vdp_port & 1) ? value : 0)); |
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364 } |
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365 |
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366 void * z80_vdp_port_write(uint32_t vdp_port, void * vcontext, uint8_t value) |
357
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367 { |
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368 z80_context * context = vcontext; |
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369 genesis_context * gen = context->system; |
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370 vdp_port &= 0xFF; |
358
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371 if (vdp_port & 0xE0) { |
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372 printf("machine freeze due to write to Z80 address %X\n", 0x7F00 | vdp_port); |
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373 exit(1); |
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374 } |
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375 if (vdp_port < 0x10) { |
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376 //These probably won't currently interact well with the 68K accessing the VDP |
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377 vdp_run_context(gen->vdp, context->current_cycle); |
358
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378 if (vdp_port < 4) { |
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379 vdp_data_port_write(gen->vdp, value << 8 | value); |
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380 } else if (vdp_port < 8) { |
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381 vdp_control_port_write(gen->vdp, value << 8 | value); |
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382 } else { |
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383 printf("Illegal write to HV Counter port %X\n", vdp_port); |
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384 exit(1); |
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385 } |
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386 } else if (vdp_port < 0x18) { |
667
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|
387 sync_sound(gen, context->current_cycle); |
358
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388 psg_write(gen->psg, value); |
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389 } else { |
470
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390 vdp_test_port_write(gen->vdp, value); |
358
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|
391 } |
357
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392 return context; |
343
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393 } |
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394 |
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395 uint16_t vdp_port_read(uint32_t vdp_port, m68k_context * context) |
88
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396 { |
343
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397 if (vdp_port & 0x2700E0) { |
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398 printf("machine freeze due to read from address %X\n", 0xC00000 | vdp_port); |
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399 exit(1); |
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400 } |
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401 vdp_port &= 0x1F; |
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402 uint16_t value; |
198
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|
403 sync_components(context, 0); |
263
2989ed7b8608
Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K.
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260
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|
404 vdp_context * v_context = context->video_context; |
470
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405 uint32_t before_cycle = v_context->cycles; |
88
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|
406 if (vdp_port < 0x10) { |
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|
407 if (vdp_port < 4) { |
343
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408 value = vdp_data_port_read(v_context); |
88
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|
409 } else if(vdp_port < 8) { |
343
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|
410 value = vdp_control_port_read(v_context); |
88
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|
411 } else { |
343
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|
412 value = vdp_hv_counter_read(v_context); |
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|
413 //printf("HV Counter: %X at cycle %d\n", value, v_context->cycles); |
88
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|
414 } |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
469
diff
changeset
|
415 } else if (vdp_port < 0x18){ |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
469
diff
changeset
|
416 printf("Illegal read from PSG port %X\n", vdp_port); |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
469
diff
changeset
|
417 exit(1); |
88
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diff
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|
418 } else { |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
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469
diff
changeset
|
419 value = vdp_test_port_read(v_context); |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
469
diff
changeset
|
420 } |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
469
diff
changeset
|
421 if (v_context->cycles != before_cycle) { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
422 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle); |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
423 context->current_cycle = v_context->cycles; |
680
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Some small synchronization improvements that do not seem to fix anything
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diff
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|
424 //Lock the Z80 out of the bus until the VDP access is complete |
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diff
changeset
|
425 genesis_context *gen = context->system; |
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|
426 gen->bus_busy = 1; |
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|
427 sync_z80(gen->z80, v_context->cycles); |
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|
428 gen->bus_busy = 0; |
88
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|
429 } |
343
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diff
changeset
|
430 return value; |
467bfa17004a
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342
diff
changeset
|
431 } |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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diff
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|
432 |
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diff
changeset
|
433 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context) |
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diff
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|
434 { |
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diff
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|
435 uint16_t value = vdp_port_read(vdp_port, context); |
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diff
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|
436 if (vdp_port & 1) { |
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342
diff
changeset
|
437 return value; |
467bfa17004a
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342
diff
changeset
|
438 } else { |
467bfa17004a
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342
diff
changeset
|
439 return value >> 8; |
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342
diff
changeset
|
440 } |
88
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Forgot to add blastem main file earlier
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diff
changeset
|
441 } |
c339559f1d4f
Forgot to add blastem main file earlier
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diff
changeset
|
442 |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
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parents:
590
diff
changeset
|
443 uint8_t z80_vdp_port_read(uint32_t vdp_port, void * vcontext) |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
444 { |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
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590
diff
changeset
|
445 z80_context * context = vcontext; |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
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590
diff
changeset
|
446 if (vdp_port & 0xE0) { |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
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parents:
590
diff
changeset
|
447 printf("machine freeze due to read from Z80 address %X\n", 0x7F00 | vdp_port); |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
448 exit(1); |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
449 } |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
450 genesis_context * gen = context->system; |
736
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
451 //VDP access goes over the 68K bus like a bank area access |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
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parents:
721
diff
changeset
|
452 //typical delay from bus arbitration |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
453 context->current_cycle += 3 * MCLKS_PER_Z80; |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
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|
454 //TODO: add cycle for an access right after a previous one |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
455 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
456 // Needs a new logic analyzer capture to get the actual delay on the 68K side |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
457 gen->m68k->current_cycle += 8 * MCLKS_PER_68K; |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
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|
458 |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
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parents:
721
diff
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|
459 |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
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parents:
590
diff
changeset
|
460 vdp_port &= 0x1F; |
4ff7bbb3943b
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parents:
590
diff
changeset
|
461 uint16_t ret; |
4ff7bbb3943b
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parents:
590
diff
changeset
|
462 if (vdp_port < 0x10) { |
4ff7bbb3943b
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parents:
590
diff
changeset
|
463 //These probably won't currently interact well with the 68K accessing the VDP |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
464 vdp_run_context(gen->vdp, context->current_cycle); |
592
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parents:
590
diff
changeset
|
465 if (vdp_port < 4) { |
4ff7bbb3943b
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parents:
590
diff
changeset
|
466 ret = vdp_data_port_read(gen->vdp); |
4ff7bbb3943b
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parents:
590
diff
changeset
|
467 } else if (vdp_port < 8) { |
4ff7bbb3943b
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parents:
590
diff
changeset
|
468 ret = vdp_control_port_read(gen->vdp); |
4ff7bbb3943b
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
469 } else { |
4ff7bbb3943b
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parents:
590
diff
changeset
|
470 printf("Illegal write to HV Counter port %X\n", vdp_port); |
4ff7bbb3943b
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parents:
590
diff
changeset
|
471 exit(1); |
4ff7bbb3943b
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parents:
590
diff
changeset
|
472 } |
4ff7bbb3943b
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
473 } else { |
4ff7bbb3943b
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parents:
590
diff
changeset
|
474 //TODO: Figure out the correct value today |
4ff7bbb3943b
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diff
changeset
|
475 ret = 0xFFFF; |
4ff7bbb3943b
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
476 } |
4ff7bbb3943b
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parents:
590
diff
changeset
|
477 return vdp_port & 1 ? ret : ret >> 8; |
4ff7bbb3943b
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590
diff
changeset
|
478 } |
4ff7bbb3943b
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590
diff
changeset
|
479 |
279
6be6056735a9
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480 uint32_t zram_counter = 0; |
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|
481 |
88
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changeset
|
482 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value) |
c339559f1d4f
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diff
changeset
|
483 { |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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280
diff
changeset
|
484 genesis_context * gen = context->system; |
153
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changeset
|
485 if (location < 0x10000) { |
668
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Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
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486 if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { |
153
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487 location &= 0x7FFF; |
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488 if (location < 0x4000) { |
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|
489 z80_ram[location & 0x1FFF] = value; |
565
9324f721efa6
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diff
changeset
|
490 #ifndef NO_Z80 |
288
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280
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changeset
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491 z80_handle_code_write(location & 0x1FFF, gen->z80); |
548
a3afee2271ce
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534
diff
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492 #endif |
288
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493 } else if (location < 0x6000) { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
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parents:
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|
494 sync_sound(gen, context->current_cycle); |
288
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495 if (location & 1) { |
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496 ym_data_write(gen->ym, value); |
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|
497 } else if(location & 2) { |
a8ee7934a1f8
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parents:
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diff
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|
498 ym_address_write_part2(gen->ym, value); |
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|
499 } else { |
a8ee7934a1f8
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|
500 ym_address_write_part1(gen->ym, value); |
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|
501 } |
405
042c4ba4a838
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404
diff
changeset
|
502 } else if (location == 0x6000) { |
042c4ba4a838
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parents:
404
diff
changeset
|
503 gen->z80->bank_reg = (gen->z80->bank_reg >> 1 | value << 8) & 0x1FF; |
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Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again
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parents:
404
diff
changeset
|
504 if (gen->z80->bank_reg < 0x80) { |
042c4ba4a838
Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again
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parents:
404
diff
changeset
|
505 gen->z80->mem_pointers[1] = (gen->z80->bank_reg << 15) + ((char *)gen->z80->mem_pointers[2]); |
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Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again
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parents:
404
diff
changeset
|
506 } else { |
042c4ba4a838
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parents:
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diff
changeset
|
507 gen->z80->mem_pointers[1] = NULL; |
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parents:
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diff
changeset
|
508 } |
395
0b5f93358a93
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parents:
392
diff
changeset
|
509 } else { |
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Add debugger command for saving Z80 RAM to a file
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392
diff
changeset
|
510 printf("68K write to unhandled Z80 address %X\n", location); |
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392
diff
changeset
|
511 exit(1); |
153
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|
512 } |
88
c339559f1d4f
Forgot to add blastem main file earlier
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parents:
diff
changeset
|
513 } |
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changeset
|
514 } else { |
153
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changeset
|
515 location &= 0x1FFF; |
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|
516 if (location < 0x100) { |
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diff
changeset
|
517 switch(location/2) |
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changeset
|
518 { |
42c031184e8a
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diff
changeset
|
519 case 0x1: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
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parents:
418
diff
changeset
|
520 io_data_write(gen->ports, value, context->current_cycle); |
153
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diff
changeset
|
521 break; |
42c031184e8a
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diff
changeset
|
522 case 0x2: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
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parents:
418
diff
changeset
|
523 io_data_write(gen->ports+1, value, context->current_cycle); |
153
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149
diff
changeset
|
524 break; |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
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parents:
418
diff
changeset
|
525 case 0x3: |
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
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parents:
418
diff
changeset
|
526 io_data_write(gen->ports+2, value, context->current_cycle); |
153
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diff
changeset
|
527 break; |
42c031184e8a
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149
diff
changeset
|
528 case 0x4: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
529 gen->ports[0].control = value; |
153
42c031184e8a
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parents:
149
diff
changeset
|
530 break; |
42c031184e8a
Implement access to Z80 RAM
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parents:
149
diff
changeset
|
531 case 0x5: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
532 gen->ports[1].control = value; |
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
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parents:
418
diff
changeset
|
533 break; |
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
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parents:
418
diff
changeset
|
534 case 0x6: |
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
535 gen->ports[2].control = value; |
153
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parents:
149
diff
changeset
|
536 break; |
88
c339559f1d4f
Forgot to add blastem main file earlier
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parents:
diff
changeset
|
537 } |
153
42c031184e8a
Implement access to Z80 RAM
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parents:
149
diff
changeset
|
538 } else { |
42c031184e8a
Implement access to Z80 RAM
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parents:
149
diff
changeset
|
539 if (location == 0x1100) { |
42c031184e8a
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parents:
149
diff
changeset
|
540 if (value & 1) { |
271
969ee17471c5
Protect debug prints for busreq/reset regs with appropriate macros
Mike Pavone <pavone@retrodev.com>
parents:
268
diff
changeset
|
541 dputs("bus requesting Z80"); |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
542 if (z80_enabled) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
543 z80_assert_busreq(gen->z80, context->current_cycle); |
677
687c1dd3bcb9
Fake busack when Z80 is disabled
Michael Pavone <pavone@retrodev.com>
parents:
672
diff
changeset
|
544 } else { |
687c1dd3bcb9
Fake busack when Z80 is disabled
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parents:
672
diff
changeset
|
545 gen->z80->busack = 1; |
153
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149
diff
changeset
|
546 } |
42c031184e8a
Implement access to Z80 RAM
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149
diff
changeset
|
547 } else { |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
548 if (gen->z80->busreq) { |
271
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268
diff
changeset
|
549 dputs("releasing z80 bus"); |
280 | 550 #ifdef DO_DEBUG_PRINT |
279
6be6056735a9
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Mike Pavone <pavone@retrodev.com>
parents:
276
diff
changeset
|
551 char fname[20]; |
6be6056735a9
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parents:
276
diff
changeset
|
552 sprintf(fname, "zram-%d", zram_counter++); |
6be6056735a9
Fix native address lookup in bannked memory area
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parents:
276
diff
changeset
|
553 FILE * f = fopen(fname, "wb"); |
6be6056735a9
Fix native address lookup in bannked memory area
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parents:
276
diff
changeset
|
554 fwrite(z80_ram, 1, sizeof(z80_ram), f); |
6be6056735a9
Fix native address lookup in bannked memory area
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276
diff
changeset
|
555 fclose(f); |
280 | 556 #endif |
260
625f8e4d5fd2
Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
215
diff
changeset
|
557 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
558 if (z80_enabled) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
559 z80_clear_busreq(gen->z80, context->current_cycle); |
677
687c1dd3bcb9
Fake busack when Z80 is disabled
Michael Pavone <pavone@retrodev.com>
parents:
672
diff
changeset
|
560 } else { |
687c1dd3bcb9
Fake busack when Z80 is disabled
Michael Pavone <pavone@retrodev.com>
parents:
672
diff
changeset
|
561 gen->z80->busack = 0; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
562 } |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
563 } |
153
42c031184e8a
Implement access to Z80 RAM
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parents:
149
diff
changeset
|
564 } else if (location == 0x1200) { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
565 sync_z80(gen->z80, context->current_cycle); |
153
42c031184e8a
Implement access to Z80 RAM
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parents:
149
diff
changeset
|
566 if (value & 1) { |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
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|
567 if (z80_enabled) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
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parents:
667
diff
changeset
|
568 z80_clear_reset(gen->z80, context->current_cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
569 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
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parents:
667
diff
changeset
|
570 gen->z80->reset = 0; |
153
42c031184e8a
Implement access to Z80 RAM
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parents:
149
diff
changeset
|
571 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
572 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
573 if (z80_enabled) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
574 z80_assert_reset(gen->z80, context->current_cycle); |
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Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
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diff
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|
575 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
576 gen->z80->reset = 1; |
260
625f8e4d5fd2
Initial stab at integartiong Z80 core
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parents:
215
diff
changeset
|
577 } |
153
42c031184e8a
Implement access to Z80 RAM
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parents:
149
diff
changeset
|
578 } |
88
c339559f1d4f
Forgot to add blastem main file earlier
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parents:
diff
changeset
|
579 } |
c339559f1d4f
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
580 } |
c339559f1d4f
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
581 } |
c339559f1d4f
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
582 return context; |
c339559f1d4f
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parents:
diff
changeset
|
583 } |
c339559f1d4f
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
584 |
c339559f1d4f
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parents:
diff
changeset
|
585 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value) |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
586 { |
404
88fa2ad53e64
Minor refactor of io_read functions to avoid duplication of logic between byte and word versions
Mike Pavone <pavone@retrodev.com>
parents:
402
diff
changeset
|
587 if (location < 0x10000 || (location & 0x1FFF) >= 0x100) { |
88fa2ad53e64
Minor refactor of io_read functions to avoid duplication of logic between byte and word versions
Mike Pavone <pavone@retrodev.com>
parents:
402
diff
changeset
|
588 return io_write(location, context, value >> 8); |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
589 } else { |
404
88fa2ad53e64
Minor refactor of io_read functions to avoid duplication of logic between byte and word versions
Mike Pavone <pavone@retrodev.com>
parents:
402
diff
changeset
|
590 return io_write(location, context, value); |
88
c339559f1d4f
Forgot to add blastem main file earlier
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parents:
diff
changeset
|
591 } |
c339559f1d4f
Forgot to add blastem main file earlier
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parents:
diff
changeset
|
592 } |
c339559f1d4f
Forgot to add blastem main file earlier
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parents:
diff
changeset
|
593 |
130
0bdbffa9fe90
Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
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115
diff
changeset
|
594 #define USA 0x80 |
0bdbffa9fe90
Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
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115
diff
changeset
|
595 #define JAP 0x00 |
0bdbffa9fe90
Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents:
115
diff
changeset
|
596 #define EUR 0xC0 |
0bdbffa9fe90
Make version register return correct value for USA
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parents:
115
diff
changeset
|
597 #define NO_DISK 0x20 |
0bdbffa9fe90
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parents:
115
diff
changeset
|
598 uint8_t version_reg = NO_DISK | USA; |
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Make version register return correct value for USA
Mike Pavone <pavone@retrodev.com>
parents:
115
diff
changeset
|
599 |
343
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|
600 uint8_t io_read(uint32_t location, m68k_context * context) |
88
c339559f1d4f
Forgot to add blastem main file earlier
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diff
changeset
|
601 { |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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342
diff
changeset
|
602 uint8_t value; |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
603 genesis_context *gen = context->system; |
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
604 if (location < 0x10000) { |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
605 if (!z80_enabled || z80_get_busack(gen->z80, context->current_cycle)) { |
153
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Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
606 location &= 0x7FFF; |
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
607 if (location < 0x4000) { |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
608 value = z80_ram[location & 0x1FFF]; |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
609 } else if (location < 0x6000) { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
610 sync_sound(gen, context->current_cycle); |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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342
diff
changeset
|
611 value = ym_read_status(gen->ym); |
153
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Implement access to Z80 RAM
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parents:
149
diff
changeset
|
612 } else { |
343
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Mostly working runtime generation of memory map read/write functions
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342
diff
changeset
|
613 value = 0xFF; |
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diff
changeset
|
614 } |
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changeset
|
615 } else { |
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diff
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|
616 value = 0xFF; |
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diff
changeset
|
617 } |
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|
618 } else { |
467bfa17004a
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changeset
|
619 location &= 0x1FFF; |
467bfa17004a
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diff
changeset
|
620 if (location < 0x100) { |
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diff
changeset
|
621 switch(location/2) |
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diff
changeset
|
622 { |
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diff
changeset
|
623 case 0x0: |
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parents:
342
diff
changeset
|
624 //version bits should be 0 for now since we're not emulating TMSS |
467bfa17004a
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342
diff
changeset
|
625 value = version_reg; |
467bfa17004a
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Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
626 break; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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parents:
342
diff
changeset
|
627 case 0x1: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
628 value = io_data_read(gen->ports, context->current_cycle); |
343
467bfa17004a
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parents:
342
diff
changeset
|
629 break; |
467bfa17004a
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parents:
342
diff
changeset
|
630 case 0x2: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
631 value = io_data_read(gen->ports+1, context->current_cycle); |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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parents:
342
diff
changeset
|
632 break; |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
633 case 0x3: |
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
634 value = io_data_read(gen->ports+2, context->current_cycle); |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
635 break; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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parents:
342
diff
changeset
|
636 case 0x4: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
637 value = gen->ports[0].control; |
343
467bfa17004a
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parents:
342
diff
changeset
|
638 break; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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parents:
342
diff
changeset
|
639 case 0x5: |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
640 value = gen->ports[1].control; |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
641 break; |
421
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
642 case 0x6: |
d0cacb4ade0b
Move IO code to a separate file and do a tiny bit of refactoring
Mike Pavone <pavone@retrodev.com>
parents:
418
diff
changeset
|
643 value = gen->ports[2].control; |
405
042c4ba4a838
Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again
Mike Pavone <pavone@retrodev.com>
parents:
404
diff
changeset
|
644 break; |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
645 default: |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
646 value = 0xFF; |
153
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
647 } |
42c031184e8a
Implement access to Z80 RAM
Mike Pavone <pavone@retrodev.com>
parents:
149
diff
changeset
|
648 } else { |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
649 if (location == 0x1100) { |
677
687c1dd3bcb9
Fake busack when Z80 is disabled
Michael Pavone <pavone@retrodev.com>
parents:
672
diff
changeset
|
650 value = z80_enabled ? !z80_get_busack(gen->z80, context->current_cycle) : !gen->z80->busack; |
753
cee1275f5d08
Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values
Michael Pavone <pavone@retrodev.com>
parents:
752
diff
changeset
|
651 //TODO: actual pre-fetch emulation |
cee1275f5d08
Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values
Michael Pavone <pavone@retrodev.com>
parents:
752
diff
changeset
|
652 value |= 0x4E; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
653 dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d)\n", value, context->current_cycle, gen->z80->reset); |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
654 } else if (location == 0x1200) { |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
655 value = !gen->z80->reset; |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
656 } else { |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
657 value = 0xFF; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
658 printf("Byte read of unknown IO location: %X\n", location); |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
659 } |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
660 } |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
661 } |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
662 return value; |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
663 } |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
664 |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
665 uint16_t io_read_w(uint32_t location, m68k_context * context) |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
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parents:
342
diff
changeset
|
666 { |
404
88fa2ad53e64
Minor refactor of io_read functions to avoid duplication of logic between byte and word versions
Mike Pavone <pavone@retrodev.com>
parents:
402
diff
changeset
|
667 uint16_t value = io_read(location, context); |
88fa2ad53e64
Minor refactor of io_read functions to avoid duplication of logic between byte and word versions
Mike Pavone <pavone@retrodev.com>
parents:
402
diff
changeset
|
668 if (location < 0x10000 || (location & 0x1FFF) < 0x100) { |
88fa2ad53e64
Minor refactor of io_read functions to avoid duplication of logic between byte and word versions
Mike Pavone <pavone@retrodev.com>
parents:
402
diff
changeset
|
669 value = value | (value << 8); |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
670 } else { |
404
88fa2ad53e64
Minor refactor of io_read functions to avoid duplication of logic between byte and word versions
Mike Pavone <pavone@retrodev.com>
parents:
402
diff
changeset
|
671 value <<= 8; |
753
cee1275f5d08
Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values
Michael Pavone <pavone@retrodev.com>
parents:
752
diff
changeset
|
672 //TODO: actual pre-fetch emulation |
cee1275f5d08
Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values
Michael Pavone <pavone@retrodev.com>
parents:
752
diff
changeset
|
673 value |= 0x73; |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
674 } |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
675 return value; |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
676 } |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
677 |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
678 void * z80_write_ym(uint32_t location, void * vcontext, uint8_t value) |
290
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679 { |
592
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Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
680 z80_context * context = vcontext; |
290
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Implement writes from Z80 to YM-2612
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changeset
|
681 genesis_context * gen = context->system; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
682 sync_sound(gen, context->current_cycle); |
290
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Implement writes from Z80 to YM-2612
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diff
changeset
|
683 if (location & 1) { |
171f97e70d85
Implement writes from Z80 to YM-2612
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diff
changeset
|
684 ym_data_write(gen->ym, value); |
171f97e70d85
Implement writes from Z80 to YM-2612
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parents:
289
diff
changeset
|
685 } else if (location & 2) { |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
686 ym_address_write_part2(gen->ym, value); |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
687 } else { |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
688 ym_address_write_part1(gen->ym, value); |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
689 } |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
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289
diff
changeset
|
690 return context; |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
691 } |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
692 |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
693 uint8_t z80_read_ym(uint32_t location, void * vcontext) |
290
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Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
694 { |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
695 z80_context * context = vcontext; |
290
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
696 genesis_context * gen = context->system; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
697 sync_sound(gen, context->current_cycle); |
290
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
698 return ym_read_status(gen->ym); |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
699 } |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
700 |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
701 uint8_t z80_read_bank(uint32_t location, void * vcontext) |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
702 { |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
703 z80_context * context = vcontext; |
672
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
704 genesis_context *gen = context->system; |
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
705 if (gen->bus_busy) { |
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
706 context->current_cycle = context->sync_cycle; |
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
707 } |
660
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
708 //typical delay from bus arbitration |
671
8ad39a2b0bce
Fix bank area access delay for master clock change
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
709 context->current_cycle += 3 * MCLKS_PER_Z80; |
672
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Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
710 //TODO: add cycle for an access right after a previous one |
736
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
711 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
712 // Needs a new logic analyzer capture to get the actual delay on the 68K side |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
713 gen->m68k->current_cycle += 8 * MCLKS_PER_68K; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
714 |
660
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
715 location &= 0x7FFF; |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
716 if (context->mem_pointers[1]) { |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
717 return context->mem_pointers[1][location ^ 1]; |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
718 } |
604
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
719 uint32_t address = context->bank_reg << 15 | location; |
616
649db9397fa1
Add support for Z80 access to VDP via bank area
Michael Pavone <pavone@retrodev.com>
parents:
606
diff
changeset
|
720 if (address >= 0xC00000 && address < 0xE00000) { |
649db9397fa1
Add support for Z80 access to VDP via bank area
Michael Pavone <pavone@retrodev.com>
parents:
606
diff
changeset
|
721 return z80_vdp_port_read(location & 0xFF, context); |
649db9397fa1
Add support for Z80 access to VDP via bank area
Michael Pavone <pavone@retrodev.com>
parents:
606
diff
changeset
|
722 } else { |
660
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
723 fprintf(stderr, "Unhandled read by Z80 from address %X through banked memory area (%X)\n", address, context->bank_reg << 15); |
616
649db9397fa1
Add support for Z80 access to VDP via bank area
Michael Pavone <pavone@retrodev.com>
parents:
606
diff
changeset
|
724 } |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
725 return 0; |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
726 } |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
727 |
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
728 void *z80_write_bank(uint32_t location, void * vcontext, uint8_t value) |
290
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
729 { |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
730 z80_context * context = vcontext; |
672
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
731 genesis_context *gen = context->system; |
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
732 if (gen->bus_busy) { |
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
733 context->current_cycle = context->sync_cycle; |
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
734 } |
660
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
735 //typical delay from bus arbitration |
671
8ad39a2b0bce
Fix bank area access delay for master clock change
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
736 context->current_cycle += 3 * MCLKS_PER_Z80; |
672
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
737 //TODO: add cycle for an access right after a previous one |
736
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
738 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
739 // Needs a new logic analyzer capture to get the actual delay on the 68K side |
535e97bad27f
Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate
Michael Pavone <pavone@retrodev.com>
parents:
721
diff
changeset
|
740 gen->m68k->current_cycle += 8 * MCLKS_PER_68K; |
672
18ef3b61e70b
Restore emulation of Z80 being locked out of the 68K bus during DMA and the like
Michael Pavone <pavone@retrodev.com>
parents:
671
diff
changeset
|
741 |
660
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
742 location &= 0x7FFF; |
604
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
743 uint32_t address = context->bank_reg << 15 | location; |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
744 if (address >= 0xE00000) { |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
745 address &= 0xFFFF; |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
746 ((uint8_t *)ram)[address ^ 1] = value; |
616
649db9397fa1
Add support for Z80 access to VDP via bank area
Michael Pavone <pavone@retrodev.com>
parents:
606
diff
changeset
|
747 } else if (address >= 0xC00000) { |
649db9397fa1
Add support for Z80 access to VDP via bank area
Michael Pavone <pavone@retrodev.com>
parents:
606
diff
changeset
|
748 z80_vdp_port_write(location & 0xFF, context, value); |
604
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
749 } else { |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
750 fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address); |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
751 } |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
752 return context; |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
753 } |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
754 |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
755 void *z80_write_bank_reg(uint32_t location, void * vcontext, uint8_t value) |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
756 { |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
757 z80_context * context = vcontext; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
758 |
604
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
759 context->bank_reg = (context->bank_reg >> 1 | value << 8) & 0x1FF; |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
760 if (context->bank_reg < 0x80) { |
660
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
761 genesis_context *gen = context->system; |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
762 context->mem_pointers[1] = get_native_pointer(context->bank_reg << 15, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen); |
604
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
763 } else { |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
764 context->mem_pointers[1] = NULL; |
39d7d463ed5b
Get Z80 banked access sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
602
diff
changeset
|
765 } |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
766 |
592
4ff7bbb3943b
Get rest of emulator compiling again with Z80 core enabled
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
767 return context; |
290
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
768 } |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
769 |
483
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
770 void set_speed_percent(genesis_context * context, uint32_t percent) |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
771 { |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
772 uint32_t old_clock = context->master_clock; |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
773 context->master_clock = ((uint64_t)context->normal_clock * (uint64_t)percent) / 100; |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
774 while (context->ym->current_cycle != context->psg->cycles) { |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
775 sync_sound(context, context->psg->cycles + MCLKS_PER_PSG); |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
776 } |
483
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
777 ym_adjust_master_clock(context->ym, context->master_clock); |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
778 psg_adjust_master_clock(context->psg, context->master_clock); |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
779 } |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
780 |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
781 #define MAX_MAP_CHUNKS (4+7+1) |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
782 |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
783 const memmap_chunk base_map[] = { |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
784 {0xE00000, 0x1000000, 0xFFFF, 0, MMAP_READ | MMAP_WRITE | MMAP_CODE, ram, |
343
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
785 NULL, NULL, NULL, NULL}, |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
786 {0xC00000, 0xE00000, 0x1FFFFF, 0, 0, NULL, |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
787 (read_16_fun)vdp_port_read, (write_16_fun)vdp_port_write, |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
788 (read_8_fun)vdp_port_read_b, (write_8_fun)vdp_port_write_b}, |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
789 {0xA00000, 0xA12000, 0x1FFFF, 0, 0, NULL, |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
790 (read_16_fun)io_read_w, (write_16_fun)io_write_w, |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
791 (read_8_fun)io_read, (write_8_fun)io_write} |
467bfa17004a
Mostly working runtime generation of memory map read/write functions
Mike Pavone <pavone@retrodev.com>
parents:
342
diff
changeset
|
792 }; |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
793 |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
794 char * save_filename; |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
795 genesis_context * genesis; |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
796 void persist_save() |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
797 { |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
798 FILE * f = fopen(save_filename, "wb"); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
799 if (!f) { |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
800 fprintf(stderr, "Failed to open %s file %s for writing\n", genesis->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
801 return; |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
802 } |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
803 fwrite(genesis->save_storage, 1, genesis->save_size, f); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
804 fclose(f); |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
805 printf("Saved %s to %s\n", genesis->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
806 } |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
807 |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
808 void init_run_cpu(genesis_context * gen, rom_info *rom, FILE * address_log, char * statefile, uint8_t * debugger) |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
809 { |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
565
diff
changeset
|
810 m68k_options opts; |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
811 |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
812 gen->save_type = rom->save_type; |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
813 if (gen->save_type != SAVE_NONE) { |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
814 gen->save_ram_mask = rom->save_mask; |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
815 gen->save_size = rom->save_size; |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
816 gen->save_storage = rom->save_buffer; |
769
4638b88bc72d
Initial work on I2C EEPROM implementation
Michael Pavone <pavone@retrodev.com>
parents:
767
diff
changeset
|
817 gen->eeprom_map = rom->eeprom_map; |
4638b88bc72d
Initial work on I2C EEPROM implementation
Michael Pavone <pavone@retrodev.com>
parents:
767
diff
changeset
|
818 gen->num_eeprom = rom->num_eeprom; |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
819 FILE * f = fopen(save_filename, "rb"); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
820 if (f) { |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
821 uint32_t read = fread(gen->save_storage, 1, rom->save_size, f); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
822 fclose(f); |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
823 if (read > 0) { |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
824 printf("Loaded %s from %s\n", rom->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
825 } |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
826 } |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
827 atexit(persist_save); |
769
4638b88bc72d
Initial work on I2C EEPROM implementation
Michael Pavone <pavone@retrodev.com>
parents:
767
diff
changeset
|
828 if (gen->save_type == SAVE_I2C) { |
770 | 829 eeprom_init(&gen->eeprom, gen->save_storage, gen->save_size); |
769
4638b88bc72d
Initial work on I2C EEPROM implementation
Michael Pavone <pavone@retrodev.com>
parents:
767
diff
changeset
|
830 } |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
831 } else { |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
832 gen->save_storage = NULL; |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
833 } |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
834 |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
835 init_m68k_opts(&opts, rom->map, rom->map_chunks, MCLKS_PER_68K); |
211 | 836 opts.address_log = address_log; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
837 m68k_context *context = init_68k_context(&opts); |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
838 gen->m68k = context; |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
839 |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
840 context->video_context = gen->vdp; |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
841 context->system = gen; |
211 | 842 //cartridge ROM |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
843 context->mem_pointers[0] = cart; |
696
0b2242bbc84a
Added config option to allow specifying a max sync cycle smaller than the end of frame
Michael Pavone <pavone@retrodev.com>
parents:
695
diff
changeset
|
844 context->target_cycle = context->sync_cycle = gen->frame_end > gen->max_cycles ? gen->frame_end : gen->max_cycles; |
211 | 845 //work RAM |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
846 context->mem_pointers[1] = ram; |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
847 //save RAM/map |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
848 context->mem_pointers[2] = rom->map[1].buffer; |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
849 context->mem_pointers[3] = (uint16_t *)gen->save_storage; |
752
296ddfcf0d43
Minor cleanup in init_run_cpu
Michael Pavone <pavone@retrodev.com>
parents:
736
diff
changeset
|
850 |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
851 if (statefile) { |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
852 uint32_t pc = load_gst(gen, statefile); |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
853 if (!pc) { |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
447
diff
changeset
|
854 fprintf(stderr, "Failed to load save state %s\n", statefile); |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
855 exit(1); |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
856 } |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
447
diff
changeset
|
857 printf("Loaded %s\n", statefile); |
515
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
858 if (debugger) { |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
859 insert_breakpoint(context, pc, debugger); |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
860 } |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
447
diff
changeset
|
861 adjust_int_cycle(gen->m68k, gen->vdp); |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
862 start_68k_context(context, pc); |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
863 } else { |
515
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
864 if (debugger) { |
752
296ddfcf0d43
Minor cleanup in init_run_cpu
Michael Pavone <pavone@retrodev.com>
parents:
736
diff
changeset
|
865 uint32_t address = cart[2] << 16 | cart[3]; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
866 insert_breakpoint(context, address, debugger); |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
867 } |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
683
diff
changeset
|
868 m68k_reset(context); |
211 | 869 } |
870 } | |
871 | |
764
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
872 char *title; |
340
58a085cfc6bd
Set window title based on ROM header name
Mike Pavone <pavone@retrodev.com>
parents:
338
diff
changeset
|
873 |
764
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
874 void update_title(char *rom_name) |
340
58a085cfc6bd
Set window title based on ROM header name
Mike Pavone <pavone@retrodev.com>
parents:
338
diff
changeset
|
875 { |
764
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
876 if (title) { |
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
877 free(title); |
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
878 title = NULL; |
340
58a085cfc6bd
Set window title based on ROM header name
Mike Pavone <pavone@retrodev.com>
parents:
338
diff
changeset
|
879 } |
764
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
880 title = alloc_concat(rom_name, " - BlastEm"); |
340
58a085cfc6bd
Set window title based on ROM header name
Mike Pavone <pavone@retrodev.com>
parents:
338
diff
changeset
|
881 } |
58a085cfc6bd
Set window title based on ROM header name
Mike Pavone <pavone@retrodev.com>
parents:
338
diff
changeset
|
882 |
765
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
883 void set_region(rom_info *info, uint8_t region) |
341
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
884 { |
765
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
885 if (!region) { |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
886 char * def_region = tern_find_ptr(config, "default_region"); |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
887 if (def_region && (!info->regions || (info->regions & translate_region_char(toupper(*def_region))))) { |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
888 region = translate_region_char(toupper(*def_region)); |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
889 } else { |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
890 region = info->regions; |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
891 } |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
892 } |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
893 if (region & REGION_E) { |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
894 version_reg = NO_DISK | EUR; |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
895 } else if (region & REGION_J) { |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
896 version_reg = NO_DISK | JAP; |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
897 } else { |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
898 version_reg = NO_DISK | USA; |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
899 } |
341
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
900 } |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
901 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
902 #ifndef NO_Z80 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
903 const memmap_chunk z80_map[] = { |
660
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
904 { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ | MMAP_WRITE | MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL }, |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
905 { 0x8000, 0x10000, 0x7FFF, 0, 0, NULL, NULL, NULL, z80_read_bank, z80_write_bank}, |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
906 { 0x4000, 0x6000, 0x0003, 0, 0, NULL, NULL, NULL, z80_read_ym, z80_write_ym}, |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
907 { 0x6000, 0x6100, 0xFFFF, 0, 0, NULL, NULL, NULL, NULL, z80_write_bank_reg}, |
e7cae6d9aaa6
Add the 3 cycle delay back in to Z80 bank area access
Michael Pavone <pavone@retrodev.com>
parents:
659
diff
changeset
|
908 { 0x7F00, 0x8000, 0x00FF, 0, 0, NULL, NULL, NULL, z80_vdp_port_read, z80_vdp_port_write} |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
909 }; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
910 #endif |
341
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
911 |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
912 int main(int argc, char ** argv) |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
913 { |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
914 if (argc < 2) { |
469
5f3344d0d42f
Fix argument handling so that the rom filename does not need to be specified first
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
915 fputs("Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n", stderr); |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
916 return 1; |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
917 } |
496
6fc71114d145
Extract function to determine executable directory from load_config so it can be used elsewhere
Mike Pavone <pavone@retrodev.com>
parents:
488
diff
changeset
|
918 set_exe_str(argv[0]); |
6fc71114d145
Extract function to determine executable directory from load_config so it can be used elsewhere
Mike Pavone <pavone@retrodev.com>
parents:
488
diff
changeset
|
919 config = load_config(); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
920 int width = -1; |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
921 int height = -1; |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
922 int debug = 0; |
407
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
405
diff
changeset
|
923 int ym_log = 0; |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
924 int loaded = 0; |
469
5f3344d0d42f
Fix argument handling so that the rom filename does not need to be specified first
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
925 uint8_t force_version = 0; |
5f3344d0d42f
Fix argument handling so that the rom filename does not need to be specified first
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
926 char * romfname = NULL; |
197
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
927 FILE *address_log = NULL; |
425
8b3ae850d1c4
Forgot to null initialize the statfile pointer
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
928 char * statefile = NULL; |
766
1b2f8280ba81
WIP changes to support reading cart memory map from ROM DB
Michael Pavone <pavone@retrodev.com>
parents:
765
diff
changeset
|
929 int rom_size; |
515
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
930 uint8_t * debuggerfun = NULL; |
501
e1355aa80f4d
Use OpenGL by default. Add OpenGL switch to help text
Mike Pavone <pavone@retrodev.com>
parents:
496
diff
changeset
|
931 uint8_t fullscreen = 0, use_gl = 1; |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
932 for (int i = 1; i < argc; i++) { |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
933 if (argv[i][0] == '-') { |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
934 switch(argv[i][1]) { |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
935 case 'b': |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
936 i++; |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
937 if (i >= argc) { |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
938 fputs("-b must be followed by a frame count\n", stderr); |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
939 return 1; |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
940 } |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
941 headless = 1; |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
942 exit_after = atoi(argv[i]); |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
501
diff
changeset
|
943 break; |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
944 case 'd': |
515
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
945 debuggerfun = (uint8_t *)debugger; |
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
946 break; |
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
947 case 'D': |
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
948 gdb_remote_init(); |
1495179d6737
Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work.
Mike Pavone <pavone@retrodev.com>
parents:
510
diff
changeset
|
949 debuggerfun = (uint8_t *)gdb_debug_enter; |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
950 break; |
338
5c34a9c39394
Re-enable frame limit, but add a command line flag to disable it
Mike Pavone <pavone@retrodev.com>
parents:
336
diff
changeset
|
951 case 'f': |
444
cc754a309ead
Add fullscreen support and add a keybinding for exiting the emulator
Mike Pavone <pavone@retrodev.com>
parents:
434
diff
changeset
|
952 fullscreen = 1; |
338
5c34a9c39394
Re-enable frame limit, but add a command line flag to disable it
Mike Pavone <pavone@retrodev.com>
parents:
336
diff
changeset
|
953 break; |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
954 case 'g': |
501
e1355aa80f4d
Use OpenGL by default. Add OpenGL switch to help text
Mike Pavone <pavone@retrodev.com>
parents:
496
diff
changeset
|
955 use_gl = 0; |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
956 break; |
197
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
957 case 'l': |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
958 address_log = fopen("address.log", "w"); |
7c227a8ec53d
Add instruction address logging to translator and support for reading an address log to the disassembler
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
959 break; |
464 | 960 case 'v': |
961 printf("blastem %s\n", BLASTEM_VERSION); | |
962 return 0; | |
963 break; | |
265
c6d12878ea93
Add -n flag for disabling the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
964 case 'n': |
c6d12878ea93
Add -n flag for disabling the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
965 z80_enabled = 0; |
c6d12878ea93
Add -n flag for disabling the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
966 break; |
341
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
967 case 'r': |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
968 i++; |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
969 if (i >= argc) { |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
970 fputs("-r must be followed by region (J, U or E)\n", stderr); |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
971 return 1; |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
972 } |
765
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
973 force_version = translate_region_char(toupper(argv[i][0])); |
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
974 if (!force_version) { |
341
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
975 fprintf(stderr, "'%c' is not a valid region character for the -r option\n", argv[i][0]); |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
976 return 1; |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
977 } |
6ad8e36de685
Support regions other than USA
Mike Pavone <pavone@retrodev.com>
parents:
340
diff
changeset
|
978 break; |
424
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
979 case 's': |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
980 i++; |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
981 if (i >= argc) { |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
982 fputs("-s must be followed by a savestate filename\n", stderr); |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
983 return 1; |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
984 } |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
985 statefile = argv[i]; |
7e8e179116af
Add support for loading GST format savestates
Mike Pavone <pavone@retrodev.com>
parents:
422
diff
changeset
|
986 break; |
407
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
405
diff
changeset
|
987 case 'y': |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
405
diff
changeset
|
988 ym_log = 1; |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
405
diff
changeset
|
989 break; |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
990 case 'h': |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
991 puts( |
469
5f3344d0d42f
Fix argument handling so that the rom filename does not need to be specified first
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
992 "Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n" |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
993 "Options:\n" |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
994 " -h Print this help text\n" |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
995 " -r (J|U|E) Force region to Japan, US or Europe respectively\n" |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
996 " -f Start in fullscreen mode\n" |
501
e1355aa80f4d
Use OpenGL by default. Add OpenGL switch to help text
Mike Pavone <pavone@retrodev.com>
parents:
496
diff
changeset
|
997 " -g Disable OpenGL rendering\n" |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
998 " -s FILE Load a GST format savestate from FILE\n" |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
999 " -d Enter debugger on startup\n" |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1000 " -n Disable Z80\n" |
501
e1355aa80f4d
Use OpenGL by default. Add OpenGL switch to help text
Mike Pavone <pavone@retrodev.com>
parents:
496
diff
changeset
|
1001 " -v Display version number and exit\n" |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1002 " -l Log 68K code addresses (useful for assemblers)\n" |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1003 " -y Log individual YM-2612 channels to WAVE files\n" |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1004 ); |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1005 return 0; |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1006 default: |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1007 fprintf(stderr, "Unrecognized switch %s\n", argv[i]); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1008 return 1; |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1009 } |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1010 } else if (!loaded) { |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1011 if (!(rom_size = load_rom(argv[i]))) { |
469
5f3344d0d42f
Fix argument handling so that the rom filename does not need to be specified first
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1012 fprintf(stderr, "Failed to open %s for reading\n", argv[i]); |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1013 return 1; |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1014 } |
469
5f3344d0d42f
Fix argument handling so that the rom filename does not need to be specified first
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1015 romfname = argv[i]; |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1016 loaded = 1; |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1017 } else if (width < 0) { |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1018 width = atoi(argv[i]); |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1019 } else if (height < 0) { |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1020 height = atoi(argv[i]); |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1021 } |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1022 } |
463
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1023 if (!loaded) { |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1024 fputs("You must specify a ROM filename!\n", stderr); |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1025 return 1; |
a1d298119153
Added -h help text option
Mike Pavone <pavone@retrodev.com>
parents:
458
diff
changeset
|
1026 } |
764
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
1027 tern_node *rom_db = load_rom_db(); |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1028 rom_info info = configure_rom(rom_db, cart, rom_size, base_map, sizeof(base_map)/sizeof(base_map[0])); |
764
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
1029 byteswap_rom(); |
765
dc54387ee1cd
Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM.
Michael Pavone <pavone@retrodev.com>
parents:
764
diff
changeset
|
1030 set_region(&info, force_version); |
764
bb60259e8edf
Initial work on ROM database
Michael Pavone <pavone@retrodev.com>
parents:
753
diff
changeset
|
1031 update_title(info.name); |
433
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1032 int def_width = 0; |
766
1b2f8280ba81
WIP changes to support reading cart memory map from ROM DB
Michael Pavone <pavone@retrodev.com>
parents:
765
diff
changeset
|
1033 char *config_width = tern_find_path(config, "video\0width\0").ptrval; |
433
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1034 if (config_width) { |
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1035 def_width = atoi(config_width); |
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1036 } |
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1037 if (!def_width) { |
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1038 def_width = 640; |
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1039 } |
ed4d0017c041
Read default render width from config file
Mike Pavone <pavone@retrodev.com>
parents:
430
diff
changeset
|
1040 width = width < 320 ? def_width : width; |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
166
diff
changeset
|
1041 height = height < 240 ? (width/320) * 240 : height; |
354
15dd6418fe67
Initial PSG support. Mostly works, noise channel is borked though.
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
1042 uint32_t fps = 60; |
342
13f994c88c34
Get frame time correct and frame rate sort of correct for EUR region
Mike Pavone <pavone@retrodev.com>
parents:
341
diff
changeset
|
1043 if (version_reg & 0x40) { |
354
15dd6418fe67
Initial PSG support. Mostly works, noise channel is borked though.
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
1044 fps = 50; |
15dd6418fe67
Initial PSG support. Mostly works, noise channel is borked though.
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
1045 } |
15dd6418fe67
Initial PSG support. Mostly works, noise channel is borked though.
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
1046 if (!headless) { |
719
019d27995e32
Upgrade to SDL 2.0 and drop support for the non-OpenGL render path
Michael Pavone <pavone@retrodev.com>
parents:
718
diff
changeset
|
1047 render_init(width, height, title, fps, fullscreen); |
342
13f994c88c34
Get frame time correct and frame rate sort of correct for EUR region
Mike Pavone <pavone@retrodev.com>
parents:
341
diff
changeset
|
1048 } |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1049 vdp_context v_context; |
483
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
1050 genesis_context gen; |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
1051 memset(&gen, 0, sizeof(gen)); |
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
1052 gen.master_clock = gen.normal_clock = fps == 60 ? MCLKS_NTSC : MCLKS_PAL; |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
1053 |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
534
diff
changeset
|
1054 init_vdp_context(&v_context, version_reg & 0x40); |
696
0b2242bbc84a
Added config option to allow specifying a max sync cycle smaller than the end of frame
Michael Pavone <pavone@retrodev.com>
parents:
695
diff
changeset
|
1055 gen.frame_end = vdp_cycles_to_frame_end(&v_context); |
766
1b2f8280ba81
WIP changes to support reading cart memory map from ROM DB
Michael Pavone <pavone@retrodev.com>
parents:
765
diff
changeset
|
1056 char * config_cycles = tern_find_path(config, "clocks\0max_cycles\0").ptrval; |
696
0b2242bbc84a
Added config option to allow specifying a max sync cycle smaller than the end of frame
Michael Pavone <pavone@retrodev.com>
parents:
695
diff
changeset
|
1057 gen.max_cycles = config_cycles ? atoi(config_cycles) : 10000000; |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
1058 |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
1059 ym2612_context y_context; |
483
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
1060 ym_init(&y_context, render_sample_rate(), gen.master_clock, MCLKS_PER_YM, render_audio_buffer(), ym_log ? YM_OPT_WAVE_LOG : 0); |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
1061 |
354
15dd6418fe67
Initial PSG support. Mostly works, noise channel is borked though.
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
1062 psg_context p_context; |
483
3e1573fa22cf
Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents:
482
diff
changeset
|
1063 psg_init(&p_context, render_sample_rate(), gen.master_clock, MCLKS_PER_PSG, render_audio_buffer()); |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
1064 |
260
625f8e4d5fd2
Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
215
diff
changeset
|
1065 z80_context z_context; |
565
9324f721efa6
Add a separate flag/define for disabling the Z80 at compile time to ease refactoring
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1066 #ifndef NO_Z80 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
1067 z80_options z_opts; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
661
diff
changeset
|
1068 init_z80_opts(&z_opts, z80_map, 5, MCLKS_PER_Z80); |
260
625f8e4d5fd2
Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
215
diff
changeset
|
1069 init_z80_context(&z_context, &z_opts); |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
1070 z80_assert_reset(&z_context, 0); |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
534
diff
changeset
|
1071 #endif |
290
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
1072 |
171f97e70d85
Implement writes from Z80 to YM-2612
Mike Pavone <pavone@retrodev.com>
parents:
289
diff
changeset
|
1073 z_context.system = &gen; |
260
625f8e4d5fd2
Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
215
diff
changeset
|
1074 z_context.mem_pointers[0] = z80_ram; |
625f8e4d5fd2
Initial stab at integartiong Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
215
diff
changeset
|
1075 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart; |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
1076 |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
1077 gen.z80 = &z_context; |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
1078 gen.vdp = &v_context; |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
280
diff
changeset
|
1079 gen.ym = &y_context; |
354
15dd6418fe67
Initial PSG support. Mostly works, noise channel is borked though.
Mike Pavone <pavone@retrodev.com>
parents:
351
diff
changeset
|
1080 gen.psg = &p_context; |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1081 genesis = &gen; |
693
318ebe078315
Fix missing call to setup_io_devices
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
1082 setup_io_devices(config, gen.ports); |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
1083 |
469
5f3344d0d42f
Fix argument handling so that the rom filename does not need to be specified first
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1084 int fname_size = strlen(romfname); |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1085 char * ext = info.save_type == SAVE_I2C ? "eeprom" : "sram"; |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1086 save_filename = malloc(fname_size+strlen(ext) + 2); |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1087 memcpy(save_filename, romfname, fname_size); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1088 int i; |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1089 for (i = fname_size-1; fname_size >= 0; --i) { |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1090 if (save_filename[i] == '.') { |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1091 strcpy(save_filename + i + 1, ext); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1092 break; |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1093 } |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1094 } |
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1095 if (i < 0) { |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1096 save_filename[fname_size] = '.'; |
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1097 strcpy(save_filename + fname_size + 1, ext); |
351
2f264d2a60c2
Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper.
Mike Pavone <pavone@retrodev.com>
parents:
346
diff
changeset
|
1098 } |
645
d77c79cec800
Initial support for configurable IO, custom IO and sega transfer board emulation
Michael Pavone <pavone@retrodev.com>
parents:
628
diff
changeset
|
1099 set_keybindings(gen.ports); |
488
32f053ad9b02
Basic OpenGL rendering is working
Mike Pavone <pavone@retrodev.com>
parents:
487
diff
changeset
|
1100 |
767
ea525f600b1d
SRAM detection from ROM header is no working correctly again
Michael Pavone <pavone@retrodev.com>
parents:
766
diff
changeset
|
1101 init_run_cpu(&gen, &info, address_log, statefile, debuggerfun); |
88
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1102 return 0; |
c339559f1d4f
Forgot to add blastem main file earlier
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1103 } |