Mercurial > repos > blastem
annotate z80_to_x86.c @ 1043:3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
author | Michael Pavone <pavone@retrodev.com> |
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date | Sun, 24 Jul 2016 18:53:22 -0700 |
parents | a6c6b621d0dc |
children | 1625555e346e |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "z80inst.h" |
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7 #include "z80_to_x86.h" |
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8 #include "gen_x86.h" |
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9 #include "mem.h" |
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10 #include "util.h" |
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11 #include <stdio.h> |
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12 #include <stdlib.h> |
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13 #include <stddef.h> |
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14 #include <string.h> |
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15 |
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16 #define MODE_UNUSED (MODE_IMMED-1) |
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17 #define MAX_MCYCLE_LENGTH 6 |
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18 |
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19 //#define DO_DEBUG_PRINT |
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20 |
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21 #ifdef DO_DEBUG_PRINT |
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22 #define dprintf printf |
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23 #else |
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24 #define dprintf |
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25 #endif |
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26 |
652 | 27 uint32_t zbreakpoint_patch(z80_context * context, uint16_t address, code_ptr dst); |
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28 void z80_handle_deferred(z80_context * context); |
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29 |
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30 uint8_t z80_size(z80inst * inst) |
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31 { |
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32 uint8_t reg = (inst->reg & 0x1F); |
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33 if (reg != Z80_UNUSED && reg != Z80_USE_IMMED) { |
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34 return reg < Z80_BC ? SZ_B : SZ_W; |
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35 } |
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36 //TODO: Handle any necessary special cases |
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37 return SZ_B; |
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38 } |
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39 |
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40 uint8_t zf_off(uint8_t flag) |
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41 { |
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42 return offsetof(z80_context, flags) + flag; |
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43 } |
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44 |
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45 uint8_t zaf_off(uint8_t flag) |
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46 { |
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47 return offsetof(z80_context, alt_flags) + flag; |
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48 } |
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49 |
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50 uint8_t zr_off(uint8_t reg) |
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51 { |
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52 if (reg > Z80_A) { |
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53 reg = z80_low_reg(reg); |
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54 } |
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55 return offsetof(z80_context, regs) + reg; |
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56 } |
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57 |
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58 uint8_t zar_off(uint8_t reg) |
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59 { |
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60 if (reg > Z80_A) { |
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61 reg = z80_low_reg(reg); |
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62 } |
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63 return offsetof(z80_context, alt_regs) + reg; |
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64 } |
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65 |
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66 void zreg_to_native(z80_options *opts, uint8_t reg, uint8_t native_reg) |
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67 { |
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68 if (opts->regs[reg] >= 0) { |
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69 mov_rr(&opts->gen.code, opts->regs[reg], native_reg, reg > Z80_A ? SZ_W : SZ_B); |
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70 } else { |
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71 mov_rdispr(&opts->gen.code, opts->gen.context_reg, zr_off(reg), native_reg, reg > Z80_A ? SZ_W : SZ_B); |
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72 } |
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73 } |
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74 |
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75 void native_to_zreg(z80_options *opts, uint8_t native_reg, uint8_t reg) |
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76 { |
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77 if (opts->regs[reg] >= 0) { |
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78 mov_rr(&opts->gen.code, native_reg, opts->regs[reg], reg > Z80_A ? SZ_W : SZ_B); |
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79 } else { |
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80 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, zr_off(reg), reg > Z80_A ? SZ_W : SZ_B); |
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81 } |
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82 } |
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83 |
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84 void translate_z80_reg(z80inst * inst, host_ea * ea, z80_options * opts) |
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85 { |
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86 code_info *code = &opts->gen.code; |
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87 if (inst->reg == Z80_USE_IMMED) { |
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88 ea->mode = MODE_IMMED; |
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89 ea->disp = inst->immed; |
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90 } else if ((inst->reg & 0x1F) == Z80_UNUSED) { |
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91 ea->mode = MODE_UNUSED; |
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92 } else { |
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93 ea->mode = MODE_REG_DIRECT; |
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94 if (inst->reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
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95 if ((inst->addr_mode & 0x1F) == Z80_REG && inst->ea_reg == Z80_IYL) { |
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96 mov_rr(code, opts->regs[Z80_IY], opts->gen.scratch1, SZ_W); |
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97 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
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98 ea->base = opts->gen.scratch1; |
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99 } else { |
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100 ea->base = opts->regs[Z80_IYL]; |
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101 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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102 } |
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103 } else if(opts->regs[inst->reg] >= 0) { |
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104 ea->base = opts->regs[inst->reg]; |
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105 if (ea->base >= AH && ea->base <= BH) { |
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106 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
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107 uint8_t other_reg = opts->regs[inst->ea_reg]; |
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108 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
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109 //we can't mix an *H reg with a register that requires the REX prefix |
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110 ea->base = opts->regs[z80_low_reg(inst->reg)]; |
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111 ror_ir(code, 8, ea->base, SZ_W); |
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112 } |
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113 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { |
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114 //temp regs require REX prefix too |
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115 ea->base = opts->regs[z80_low_reg(inst->reg)]; |
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116 ror_ir(code, 8, ea->base, SZ_W); |
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117 } |
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118 } |
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119 } else { |
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120 ea->mode = MODE_REG_DISPLACE8; |
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121 ea->base = opts->gen.context_reg; |
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122 ea->disp = zr_off(inst->reg); |
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123 } |
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124 } |
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125 } |
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126 |
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127 void z80_save_reg(z80inst * inst, z80_options * opts) |
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128 { |
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129 code_info *code = &opts->gen.code; |
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130 if (inst->reg == Z80_USE_IMMED || inst->reg == Z80_UNUSED) { |
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131 return; |
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132 } |
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133 if (inst->reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
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134 if ((inst->addr_mode & 0x1F) == Z80_REG && inst->ea_reg == Z80_IYL) { |
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135 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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136 mov_rr(code, opts->gen.scratch1, opts->regs[Z80_IYL], SZ_B); |
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137 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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138 } else { |
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139 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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140 } |
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141 } else if (opts->regs[inst->reg] >= AH && opts->regs[inst->reg] <= BH) { |
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142 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
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143 uint8_t other_reg = opts->regs[inst->ea_reg]; |
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144 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
268
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145 //we can't mix an *H reg with a register that requires the REX prefix |
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146 ror_ir(code, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W); |
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147 } |
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148 } else if((inst->addr_mode & 0x1F) != Z80_UNUSED && (inst->addr_mode & 0x1F) != Z80_IMMED) { |
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149 //temp regs require REX prefix too |
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150 ror_ir(code, 8, opts->regs[z80_low_reg(inst->reg)], SZ_W); |
267
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151 } |
213
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152 } |
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153 } |
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154 |
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155 void translate_z80_ea(z80inst * inst, host_ea * ea, z80_options * opts, uint8_t read, uint8_t modify) |
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156 { |
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157 code_info *code = &opts->gen.code; |
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158 uint8_t size, areg; |
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159 int8_t reg; |
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160 ea->mode = MODE_REG_DIRECT; |
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161 areg = read ? opts->gen.scratch1 : opts->gen.scratch2; |
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162 switch(inst->addr_mode & 0x1F) |
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163 { |
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164 case Z80_REG: |
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165 if (inst->ea_reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
312
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166 if (inst->reg == Z80_IYL) { |
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167 mov_rr(code, opts->regs[Z80_IY], opts->gen.scratch1, SZ_W); |
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168 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
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169 ea->base = opts->gen.scratch1; |
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170 } else { |
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171 ea->base = opts->regs[Z80_IYL]; |
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172 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
312
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173 } |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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174 } else if(opts->regs[inst->ea_reg] >= 0) { |
213
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175 ea->base = opts->regs[inst->ea_reg]; |
267
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176 if (ea->base >= AH && ea->base <= BH && inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED) { |
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177 uint8_t other_reg = opts->regs[inst->reg]; |
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178 #ifdef X86_64 |
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179 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
267
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180 //we can't mix an *H reg with a register that requires the REX prefix |
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181 ea->base = opts->regs[z80_low_reg(inst->ea_reg)]; |
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182 ror_ir(code, 8, ea->base, SZ_W); |
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183 } |
666
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184 #endif |
267
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185 } |
651
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Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
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186 } else { |
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|
187 ea->mode = MODE_REG_DISPLACE8; |
659
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Minor Z80 core cleanup
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diff
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|
188 ea->base = opts->gen.context_reg; |
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189 ea->disp = zr_off(inst->ea_reg); |
213
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190 } |
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191 break; |
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192 case Z80_REG_INDIRECT: |
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193 zreg_to_native(opts, inst->ea_reg, areg); |
213
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194 size = z80_size(inst); |
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195 if (read) { |
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196 if (modify) { |
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197 //push_r(code, opts->gen.scratch1); |
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198 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
213
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199 } |
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200 if (size == SZ_B) { |
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201 call(code, opts->read_8); |
213
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202 } else { |
591
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203 call(code, opts->read_16); |
213
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204 } |
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205 if (modify) { |
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206 //pop_r(code, opts->gen.scratch2); |
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207 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, scratch1), opts->gen.scratch2, SZ_W); |
213
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208 } |
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209 } |
590
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210 ea->base = opts->gen.scratch1; |
213
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211 break; |
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212 case Z80_IMMED: |
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213 ea->mode = MODE_IMMED; |
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214 ea->disp = inst->immed; |
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215 break; |
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216 case Z80_IMMED_INDIRECT: |
591
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217 mov_ir(code, inst->immed, areg, SZ_W); |
213
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218 size = z80_size(inst); |
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219 if (read) { |
277
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220 /*if (modify) { |
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221 push_r(code, opts->gen.scratch1); |
277
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222 }*/ |
213
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223 if (size == SZ_B) { |
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224 call(code, opts->read_8); |
213
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225 } else { |
593
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226 call(code, opts->read_16); |
213
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227 } |
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228 if (modify) { |
591
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229 //pop_r(code, opts->gen.scratch2); |
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230 mov_ir(code, inst->immed, opts->gen.scratch2, SZ_W); |
213
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231 } |
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232 } |
590
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233 ea->base = opts->gen.scratch1; |
213
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234 break; |
235
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235 case Z80_IX_DISPLACE: |
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236 case Z80_IY_DISPLACE: |
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237 zreg_to_native(opts, (inst->addr_mode & 0x1F) == Z80_IX_DISPLACE ? Z80_IX : Z80_IY, areg); |
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238 add_ir(code, inst->ea_reg & 0x80 ? inst->ea_reg - 256 : inst->ea_reg, areg, SZ_W); |
213
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239 size = z80_size(inst); |
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240 if (read) { |
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241 if (modify) { |
591
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242 //push_r(code, opts->gen.scratch1); |
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243 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
213
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244 } |
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245 if (size == SZ_B) { |
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246 call(code, opts->read_8); |
213
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247 } else { |
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248 call(code, opts->read_16); |
213
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249 } |
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250 if (modify) { |
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251 //pop_r(code, opts->gen.scratch2); |
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252 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, scratch1), opts->gen.scratch2, SZ_W); |
213
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253 } |
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254 } |
590
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255 ea->base = opts->gen.scratch1; |
213
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256 break; |
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257 case Z80_UNUSED: |
235
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258 ea->mode = MODE_UNUSED; |
213
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259 break; |
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260 default: |
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261 fatal_error("Unrecognized Z80 addressing mode %d\n", inst->addr_mode & 0x1F); |
213
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262 } |
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263 } |
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264 |
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265 void z80_save_ea(code_info *code, z80inst * inst, z80_options * opts) |
213
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266 { |
267
1788e3f29c28
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267 if ((inst->addr_mode & 0x1F) == Z80_REG) { |
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268 if (inst->ea_reg == Z80_IYH && opts->regs[Z80_IYL] >= 0) { |
312
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269 if (inst->reg == Z80_IYL) { |
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270 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
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271 mov_rr(code, opts->gen.scratch1, opts->regs[Z80_IYL], SZ_B); |
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272 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
312
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273 } else { |
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274 ror_ir(code, 8, opts->regs[Z80_IY], SZ_W); |
312
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275 } |
267
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276 } else if (inst->reg != Z80_UNUSED && inst->reg != Z80_USE_IMMED && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
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277 uint8_t other_reg = opts->regs[inst->reg]; |
666
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278 #ifdef X86_64 |
269
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279 if (other_reg >= R8 || (other_reg >= RSP && other_reg <= RDI)) { |
267
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280 //we can't mix an *H reg with a register that requires the REX prefix |
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281 ror_ir(code, 8, opts->regs[z80_low_reg(inst->ea_reg)], SZ_W); |
267
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282 } |
666
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283 #endif |
267
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284 } |
213
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285 } |
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286 } |
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287 |
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288 void z80_save_result(z80_options *opts, z80inst * inst) |
213
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289 { |
253
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290 switch(inst->addr_mode & 0x1f) |
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291 { |
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292 case Z80_REG_INDIRECT: |
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293 case Z80_IMMED_INDIRECT: |
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294 case Z80_IX_DISPLACE: |
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295 case Z80_IY_DISPLACE: |
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296 if (z80_size(inst) == SZ_B) { |
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297 call(&opts->gen.code, opts->write_8); |
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298 } else { |
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299 call(&opts->gen.code, opts->write_16_lowfirst); |
253
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300 } |
213
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301 } |
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302 } |
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303 |
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304 enum { |
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305 DONT_READ=0, |
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306 READ |
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307 }; |
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308 |
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309 enum { |
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310 DONT_MODIFY=0, |
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311 MODIFY |
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312 }; |
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313 |
235
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314 void z80_print_regs_exit(z80_context * context) |
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315 { |
505
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316 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\nSP: %X\n\nIM: %d, IFF1: %d, IFF2: %d\n", |
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317 context->regs[Z80_A], context->regs[Z80_B], context->regs[Z80_C], |
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318 context->regs[Z80_D], context->regs[Z80_E], |
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319 (context->regs[Z80_H] << 8) | context->regs[Z80_L], |
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320 (context->regs[Z80_IXH] << 8) | context->regs[Z80_IXL], |
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321 (context->regs[Z80_IYH] << 8) | context->regs[Z80_IYL], |
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322 context->sp, context->im, context->iff1, context->iff2); |
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323 puts("--Alternate Regs--"); |
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324 printf("A: %X\nB: %X\nC: %X\nD: %X\nE: %X\nHL: %X\nIX: %X\nIY: %X\n", |
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325 context->alt_regs[Z80_A], context->alt_regs[Z80_B], context->alt_regs[Z80_C], |
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326 context->alt_regs[Z80_D], context->alt_regs[Z80_E], |
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327 (context->alt_regs[Z80_H] << 8) | context->alt_regs[Z80_L], |
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328 (context->alt_regs[Z80_IXH] << 8) | context->alt_regs[Z80_IXL], |
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329 (context->alt_regs[Z80_IYH] << 8) | context->alt_regs[Z80_IYL]); |
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330 exit(0); |
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331 } |
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332 |
652 | 333 void translate_z80inst(z80inst * inst, z80_context * context, uint16_t address, uint8_t interp) |
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334 { |
591
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335 uint32_t num_cycles; |
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336 host_ea src_op, dst_op; |
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337 uint8_t size; |
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338 z80_options *opts = context->options; |
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339 uint8_t * start = opts->gen.code.cur; |
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340 code_info *code = &opts->gen.code; |
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341 if (!interp) { |
652 | 342 check_cycles_int(&opts->gen, address); |
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343 if (context->breakpoint_flags[address / 8] & (1 << (address % 8))) { |
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344 zbreakpoint_patch(context, address, start); |
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345 } |
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346 #ifdef Z80_LOG_ADDRESS |
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347 log_address(&opts->gen, address, "Z80: %X @ %d\n"); |
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348 #endif |
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349 } |
213
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350 switch(inst->op) |
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351 { |
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352 case Z80_LD: |
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353 size = z80_size(inst); |
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354 switch (inst->addr_mode & 0x1F) |
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355 { |
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356 case Z80_REG: |
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357 case Z80_REG_INDIRECT: |
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358 num_cycles = size == SZ_B ? 4 : 6; |
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359 if (inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY || (inst->ea_reg >= Z80_IXL && inst->ea_reg <= Z80_IYH)) { |
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360 num_cycles += 4; |
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361 } |
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362 if (inst->reg == Z80_I || inst->ea_reg == Z80_I || inst->reg == Z80_R || inst->ea_reg == Z80_R) { |
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363 num_cycles += 5; |
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364 } |
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365 break; |
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366 case Z80_IMMED: |
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367 num_cycles = size == SZ_B ? 7 : 10; |
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368 break; |
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369 case Z80_IMMED_INDIRECT: |
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370 num_cycles = 10; |
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371 break; |
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372 case Z80_IX_DISPLACE: |
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373 case Z80_IY_DISPLACE: |
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374 num_cycles = 16; |
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375 break; |
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376 } |
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377 if ((inst->reg >= Z80_IXL && inst->reg <= Z80_IYH) || inst->reg == Z80_IX || inst->reg == Z80_IY) { |
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378 num_cycles += 4; |
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379 } |
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380 cycles(&opts->gen, num_cycles); |
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381 if (inst->addr_mode & Z80_DIR) { |
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382 translate_z80_ea(inst, &dst_op, opts, DONT_READ, MODIFY); |
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383 translate_z80_reg(inst, &src_op, opts); |
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384 } else { |
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385 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
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386 translate_z80_reg(inst, &dst_op, opts); |
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387 } |
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388 if (src_op.mode == MODE_REG_DIRECT) { |
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389 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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390 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, size); |
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391 } else { |
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392 mov_rr(code, src_op.base, dst_op.base, size); |
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393 } |
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394 } else if(src_op.mode == MODE_IMMED) { |
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395 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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396 mov_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, size); |
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397 } else { |
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398 mov_ir(code, src_op.disp, dst_op.base, size); |
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399 } |
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400 } else { |
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401 if(dst_op.mode == MODE_REG_DISPLACE8) { |
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402 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, size); |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
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403 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, size); |
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729
diff
changeset
|
404 } else { |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
405 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, size); |
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|
406 } |
213
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Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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|
407 } |
842 | 408 if ((inst->ea_reg == Z80_I || inst->ea_reg == Z80_R) && inst->addr_mode == Z80_REG) { |
409 //ld a, i and ld a, r sets some flags | |
652 | 410 cmp_ir(code, 0, dst_op.base, SZ_B); |
411 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); | |
412 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); | |
821
21a69dfb6ee7
Implement half carry for a couple of the trivial cases
Michael Pavone <pavone@retrodev.com>
parents:
819
diff
changeset
|
413 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B);; |
652 | 414 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B);; |
659
759c38bf97f8
Minor Z80 core cleanup
Michael Pavone <pavone@retrodev.com>
parents:
657
diff
changeset
|
415 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, iff2), opts->gen.scratch1, SZ_B); |
652 | 416 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
417 } |
591
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418 z80_save_reg(inst, opts); |
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419 z80_save_ea(code, inst, opts); |
235
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diff
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420 if (inst->addr_mode & Z80_DIR) { |
593
5ef3fe516da9
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parents:
592
diff
changeset
|
421 z80_save_result(opts, inst); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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diff
changeset
|
422 } |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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diff
changeset
|
423 break; |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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diff
changeset
|
424 case Z80_PUSH: |
591
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425 cycles(&opts->gen, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 9 : 5); |
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426 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
235
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|
427 if (inst->reg == Z80_AF) { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
428 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
591
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diff
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429 shl_ir(code, 8, opts->gen.scratch1, SZ_W); |
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changeset
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430 mov_rdispr(code, opts->gen.context_reg, zf_off(ZF_S), opts->gen.scratch1, SZ_B); |
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changeset
|
431 shl_ir(code, 1, opts->gen.scratch1, SZ_B); |
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432 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_Z), opts->gen.scratch1, SZ_B); |
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433 shl_ir(code, 2, opts->gen.scratch1, SZ_B); |
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Get Z80 core back into compileable state
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changeset
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434 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_H), opts->gen.scratch1, SZ_B); |
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changeset
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435 shl_ir(code, 2, opts->gen.scratch1, SZ_B); |
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changeset
|
436 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_PV), opts->gen.scratch1, SZ_B); |
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Get Z80 core back into compileable state
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diff
changeset
|
437 shl_ir(code, 1, opts->gen.scratch1, SZ_B); |
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|
438 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_N), opts->gen.scratch1, SZ_B); |
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changeset
|
439 shl_ir(code, 1, opts->gen.scratch1, SZ_B); |
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Get Z80 core back into compileable state
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changeset
|
440 or_rdispr(code, opts->gen.context_reg, zf_off(ZF_C), opts->gen.scratch1, SZ_B); |
235
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|
441 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
442 zreg_to_native(opts, inst->reg, opts->gen.scratch1); |
235
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443 } |
591
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changeset
|
444 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
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diff
changeset
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445 call(code, opts->write_16_highfirst); |
235
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446 //no call to save_z80_reg needed since there's no chance we'll use the only |
d9bf8e61c33c
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213
diff
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|
447 //the upper half of a register pair |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
448 break; |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
449 case Z80_POP: |
591
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|
450 cycles(&opts->gen, (inst->reg == Z80_IX || inst->reg == Z80_IY) ? 8 : 4); |
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Get Z80 core back into compileable state
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diff
changeset
|
451 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
452 call(code, opts->read_16); |
591
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|
453 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
235
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diff
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|
454 if (inst->reg == Z80_AF) { |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
455 |
591
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changeset
|
456 bt_ir(code, 0, opts->gen.scratch1, SZ_W); |
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590
diff
changeset
|
457 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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diff
changeset
|
458 bt_ir(code, 1, opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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changeset
|
459 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_N)); |
966b46c68942
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diff
changeset
|
460 bt_ir(code, 2, opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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diff
changeset
|
461 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
462 bt_ir(code, 4, opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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diff
changeset
|
463 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
464 bt_ir(code, 6, opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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diff
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|
465 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_Z)); |
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Get Z80 core back into compileable state
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diff
changeset
|
466 bt_ir(code, 7, opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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diff
changeset
|
467 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
468 shr_ir(code, 8, opts->gen.scratch1, SZ_W); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
469 native_to_zreg(opts, opts->gen.scratch1, Z80_A); |
235
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diff
changeset
|
470 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
471 native_to_zreg(opts, opts->gen.scratch1, inst->reg); |
235
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472 } |
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|
473 //no call to save_z80_reg needed since there's no chance we'll use the only |
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Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
474 //the upper half of a register pair |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
475 break; |
241
2586d49ddd46
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|
476 case Z80_EX: |
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diff
changeset
|
477 if (inst->addr_mode == Z80_REG || inst->reg == Z80_HL) { |
591
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|
478 num_cycles = 4; |
241
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479 } else { |
591
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|
480 num_cycles = 8; |
241
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|
481 } |
591
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482 cycles(&opts->gen, num_cycles); |
241
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|
483 if (inst->addr_mode == Z80_REG) { |
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|
484 if(inst->reg == Z80_AF) { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
485 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
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diff
changeset
|
486 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_A), opts->gen.scratch2, SZ_B); |
591
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diff
changeset
|
487 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_A), SZ_B); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
488 native_to_zreg(opts, opts->gen.scratch2, Z80_A); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
489 |
241
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490 //Flags are currently word aligned, so we can move |
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|
491 //them efficiently a word at a time |
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492 for (int f = ZF_C; f < ZF_NUM; f+=2) { |
591
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|
493 mov_rdispr(code, opts->gen.context_reg, zf_off(f), opts->gen.scratch1, SZ_W); |
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|
494 mov_rdispr(code, opts->gen.context_reg, zaf_off(f), opts->gen.scratch2, SZ_W); |
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changeset
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495 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zaf_off(f), SZ_W); |
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496 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, zf_off(f), SZ_W); |
241
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497 } |
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498 } else { |
729
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Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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parents:
716
diff
changeset
|
499 if (opts->regs[Z80_DE] >= 0 && opts->regs[Z80_HL] >= 0) { |
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diff
changeset
|
500 xchg_rr(code, opts->regs[Z80_DE], opts->regs[Z80_HL], SZ_W); |
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parents:
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diff
changeset
|
501 } else { |
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Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
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diff
changeset
|
502 zreg_to_native(opts, Z80_DE, opts->gen.scratch1); |
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parents:
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diff
changeset
|
503 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
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Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
504 native_to_zreg(opts, opts->gen.scratch1, Z80_HL); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
505 native_to_zreg(opts, opts->gen.scratch2, Z80_DE); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
506 } |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
507 } |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
508 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
509 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
510 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
511 if (opts->regs[inst->reg] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
512 xchg_rr(code, opts->regs[inst->reg], opts->gen.scratch1, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
513 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
514 zreg_to_native(opts, inst->reg, opts->gen.scratch2); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
515 xchg_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
516 native_to_zreg(opts, opts->gen.scratch2, inst->reg); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
517 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
518 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
519 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
520 cycles(&opts->gen, 1); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
521 uint8_t high_reg = z80_high_reg(inst->reg); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
522 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
523 add_ir(code, 1, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
524 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
525 if (opts->regs[inst->reg] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
526 //even though some of the upper halves can be used directly |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
527 //the limitations on mixing *H regs with the REX prefix |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
528 //prevent us from taking advantage of it |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
529 uint8_t use_reg = opts->regs[inst->reg]; |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
530 ror_ir(code, 8, use_reg, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
531 xchg_rr(code, use_reg, opts->gen.scratch1, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
532 //restore reg to normal rotation |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
533 ror_ir(code, 8, use_reg, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
534 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
535 zreg_to_native(opts, high_reg, opts->gen.scratch2); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
536 xchg_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_B); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
537 native_to_zreg(opts, opts->gen.scratch2, high_reg); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
538 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
539 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
540 add_ir(code, 1, opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
541 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
542 cycles(&opts->gen, 2); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
543 } |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
544 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
545 case Z80_EXX: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
546 cycles(&opts->gen, 4); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
547 zreg_to_native(opts, Z80_BC, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
548 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_BC), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
549 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
550 native_to_zreg(opts, opts->gen.scratch2, Z80_BC); |
840
5822c6e5642f
Fix timing of IM instruction
Michael Pavone <pavone@retrodev.com>
parents:
828
diff
changeset
|
551 |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
552 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
553 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_HL), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
554 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
555 native_to_zreg(opts, opts->gen.scratch2, Z80_HL); |
840
5822c6e5642f
Fix timing of IM instruction
Michael Pavone <pavone@retrodev.com>
parents:
828
diff
changeset
|
556 |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
557 zreg_to_native(opts, Z80_DE, opts->gen.scratch1); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
558 mov_rdispr(code, opts->gen.context_reg, zar_off(Z80_DE), opts->gen.scratch2, SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
559 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zar_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
560 native_to_zreg(opts, opts->gen.scratch2, Z80_DE); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
561 break; |
272 | 562 case Z80_LDI: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
563 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
564 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
565 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
566 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
567 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
568 cycles(&opts->gen, 2); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
569 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
570 add_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
571 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
572 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
573 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
574 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
575 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
576 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
577 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
578 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
579 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
580 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
581 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
582 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
583 } |
821
21a69dfb6ee7
Implement half carry for a couple of the trivial cases
Michael Pavone <pavone@retrodev.com>
parents:
819
diff
changeset
|
584 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
585 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
586 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
272 | 587 break; |
588 } | |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
589 case Z80_LDIR: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
590 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
591 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
592 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
593 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
594 call(code, opts->write_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
595 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
596 add_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
597 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
598 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
599 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
600 if (opts->regs[Z80_HL] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
601 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
602 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
603 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
604 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
605 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
606 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
607 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
608 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
609 } |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
610 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
611 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
612 uint8_t * cont = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
613 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
614 cycles(&opts->gen, 7); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
615 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
616 jmp(code, start); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
617 *cont = code->cur - (cont + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
618 cycles(&opts->gen, 2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
619 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
261
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
620 break; |
f0c53a4bbfa3
Implement LDIR and fix a bug in which context was not restored after a call to z80_handle_code_write
Mike Pavone <pavone@retrodev.com>
parents:
259
diff
changeset
|
621 } |
273 | 622 case Z80_LDD: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
623 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
624 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
625 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
626 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
627 call(code, opts->write_8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
628 cycles(&opts->gen, 2); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
629 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
630 sub_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
631 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
632 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
633 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
634 if (opts->regs[Z80_HL] >= 0) { |
828
22c3c52b9871
Fixed a copy pasta error in the implementation of LDD and LDDR. HL should be decremented and not incremented in those instructions.
Michael Pavone <pavone@retrodev.com>
parents:
821
diff
changeset
|
635 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
636 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
637 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
638 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
639 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
640 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
641 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
642 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
643 } |
821
21a69dfb6ee7
Implement half carry for a couple of the trivial cases
Michael Pavone <pavone@retrodev.com>
parents:
819
diff
changeset
|
644 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
645 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
646 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
273 | 647 break; |
648 } | |
649 case Z80_LDDR: { | |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
650 cycles(&opts->gen, 8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
651 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
652 call(code, opts->read_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
653 zreg_to_native(opts, Z80_DE, opts->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
654 call(code, opts->write_8); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
655 if (opts->regs[Z80_DE] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
656 sub_ir(code, 1, opts->regs[Z80_DE], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
657 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
658 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_DE), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
659 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
660 if (opts->regs[Z80_HL] >= 0) { |
828
22c3c52b9871
Fixed a copy pasta error in the implementation of LDD and LDDR. HL should be decremented and not incremented in those instructions.
Michael Pavone <pavone@retrodev.com>
parents:
821
diff
changeset
|
661 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
662 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
663 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
664 } |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
665 if (opts->regs[Z80_BC] >= 0) { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
666 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
667 } else { |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
668 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
669 } |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
670 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
671 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
672 uint8_t * cont = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
673 jcc(code, CC_Z, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
674 cycles(&opts->gen, 7); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
675 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
676 jmp(code, start); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
677 *cont = code->cur - (cont + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
678 cycles(&opts->gen, 2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
679 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
273 | 680 break; |
681 } | |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
682 case Z80_CPI: |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
683 cycles(&opts->gen, 8);//T-States 4,4 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
684 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
685 call(code, opts->read_8);//T-States 3 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
686 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
687 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
688 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
689 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
690 //TODO: Implement half-carry flag |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
691 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
692 if (opts->regs[Z80_HL] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
693 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
694 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
695 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
696 } |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
697 if (opts->regs[Z80_BC] >= 0) { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
698 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
699 } else { |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
700 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
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701 } |
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702 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
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703 break; |
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704 case Z80_CPIR: { |
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705 cycles(&opts->gen, 8);//T-States 4,4 |
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706 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
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707 call(code, opts->read_8);//T-States 3 |
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708 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
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709 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
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710 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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711 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
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712 //TODO: Implement half-carry flag |
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713 cycles(&opts->gen, 5);//T-States 5 |
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714 if (opts->regs[Z80_HL] >= 0) { |
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715 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
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716 } else { |
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717 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
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718 } |
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719 if (opts->regs[Z80_BC] >= 0) { |
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720 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
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721 } else { |
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722 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
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723 } |
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|
724 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
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|
725 uint8_t * cont = code->cur+1; |
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726 jcc(code, CC_Z, code->cur+2); |
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727 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
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728 uint8_t * cont2 = code->cur+1; |
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729 jcc(code, CC_Z, code->cur+2); |
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730 //repeat case |
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731 cycles(&opts->gen, 5);//T-States 5 |
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732 jmp(code, start); |
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733 *cont = code->cur - (cont + 1); |
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734 *cont2 = code->cur - (cont2 + 1); |
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735 break; |
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736 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
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737 case Z80_CPD: |
1043
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738 cycles(&opts->gen, 8);//T-States 4,4 |
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739 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
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|
740 call(code, opts->read_8);//T-States 3 |
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|
741 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
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742 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
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743 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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744 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
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|
745 //TODO: Implement half-carry flag |
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746 cycles(&opts->gen, 5);//T-States 5 |
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|
747 if (opts->regs[Z80_HL] >= 0) { |
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748 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
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|
749 } else { |
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750 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
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|
751 } |
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|
752 if (opts->regs[Z80_BC] >= 0) { |
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753 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
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|
754 } else { |
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|
755 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
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756 } |
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|
757 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
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758 break; |
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|
759 case Z80_CPDR: { |
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760 cycles(&opts->gen, 8);//T-States 4,4 |
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|
761 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
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762 call(code, opts->read_8);//T-States 3 |
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763 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
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764 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
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|
765 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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|
766 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
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|
767 //TODO: Implement half-carry flag |
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768 cycles(&opts->gen, 5);//T-States 5 |
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Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
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|
769 if (opts->regs[Z80_HL] >= 0) { |
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770 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
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Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
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771 } else { |
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772 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_W); |
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773 } |
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|
774 if (opts->regs[Z80_BC] >= 0) { |
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775 sub_ir(code, 1, opts->regs[Z80_BC], SZ_W); |
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776 } else { |
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|
777 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_BC), SZ_W); |
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|
778 } |
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|
779 setcc_rdisp(code, CC_NZ, opts->gen.context_reg, zf_off(ZF_PV)); |
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|
780 uint8_t * cont = code->cur+1; |
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781 jcc(code, CC_Z, code->cur+2); |
3980ef0f6307
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|
782 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
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|
783 uint8_t * cont2 = code->cur+1; |
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changeset
|
784 jcc(code, CC_Z, code->cur+2); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
785 //repeat case |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
786 cycles(&opts->gen, 5);//T-States 5 |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
787 jmp(code, start); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
788 *cont = code->cur - (cont + 1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
789 *cont2 = code->cur - (cont2 + 1); |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
790 break; |
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
791 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
792 case Z80_ADD: |
591
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parents:
590
diff
changeset
|
793 num_cycles = 4; |
235
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213
diff
changeset
|
794 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
795 num_cycles += 12; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
796 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
797 num_cycles += 3; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
798 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
799 num_cycles += 4; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
800 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
801 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
802 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
803 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
804 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
805 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
806 add_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
807 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
808 add_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
809 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
810 add_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
811 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
812 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
813 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
814 add_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
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More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
815 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
816 add_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
817 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
818 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
819 add_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
820 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
821 } |
591
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diff
changeset
|
822 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
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Get Z80 core back into compileable state
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diff
changeset
|
823 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
213
4d4559b04c59
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
824 //TODO: Implement half-carry flag |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
825 if (z80_size(inst) == SZ_B) { |
591
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diff
changeset
|
826 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
827 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
828 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
829 } |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
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diff
changeset
|
830 z80_save_reg(inst, opts); |
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Get Z80 core back into compileable state
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diff
changeset
|
831 z80_save_ea(code, inst, opts); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
832 break; |
248
9c7a3db7bcd0
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247
diff
changeset
|
833 case Z80_ADC: |
591
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Get Z80 core back into compileable state
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diff
changeset
|
834 num_cycles = 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
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diff
changeset
|
835 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
836 num_cycles += 12; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
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247
diff
changeset
|
837 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
838 num_cycles += 3; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
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changeset
|
839 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
840 num_cycles += 4; |
248
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Implement ADC and SBC in Z80 core (untested)
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247
diff
changeset
|
841 } |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
842 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
843 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
844 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
845 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
846 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
847 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
848 adc_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
849 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
850 adc_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
851 } else { |
38e9bee03749
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diff
changeset
|
852 adc_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
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diff
changeset
|
853 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
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247
diff
changeset
|
854 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
855 if (src_op.mode == MODE_REG_DIRECT) { |
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diff
changeset
|
856 adc_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
857 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
858 adc_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
859 } else { |
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
860 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
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diff
changeset
|
861 adc_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
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diff
changeset
|
862 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
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|
863 } |
591
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diff
changeset
|
864 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
865 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
248
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changeset
|
866 //TODO: Implement half-carry flag |
591
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parents:
590
diff
changeset
|
867 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
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Get Z80 core back into compileable state
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diff
changeset
|
868 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
869 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
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diff
changeset
|
870 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
871 z80_save_ea(code, inst, opts); |
248
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diff
changeset
|
872 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
873 case Z80_SUB: |
591
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parents:
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diff
changeset
|
874 num_cycles = 4; |
235
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Get Z80 core working for simple programs
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213
diff
changeset
|
875 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
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parents:
590
diff
changeset
|
876 num_cycles += 12; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
877 } else if(inst->addr_mode == Z80_IMMED) { |
591
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590
diff
changeset
|
878 num_cycles += 3; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
879 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
880 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
881 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
882 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
883 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
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Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
884 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
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Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
885 sub_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
886 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
887 sub_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
888 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
889 sub_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
890 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
891 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
892 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
893 sub_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
894 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
895 sub_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
896 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
897 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
898 sub_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
899 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
900 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
901 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
902 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
903 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
904 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
905 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
906 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
907 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
908 z80_save_ea(code, inst, opts); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
909 break; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
910 case Z80_SBC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
911 num_cycles = 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
912 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
913 num_cycles += 12; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
914 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
915 num_cycles += 3; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
916 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
917 num_cycles += 4; |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
918 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
919 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
920 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
921 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
922 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
923 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
924 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
925 sbb_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
926 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
927 sbb_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
928 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
929 sbb_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
930 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
931 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
932 if (src_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
933 sbb_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
934 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
935 sbb_irdisp(code, src_op.disp, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
936 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
937 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
938 sbb_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
939 } |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
940 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
941 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
942 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
943 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
944 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
945 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
946 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
947 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
948 z80_save_ea(code, inst, opts); |
248
9c7a3db7bcd0
Implement ADC and SBC in Z80 core (untested)
Mike Pavone <pavone@retrodev.com>
parents:
247
diff
changeset
|
949 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
950 case Z80_AND: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
951 num_cycles = 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
952 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
953 num_cycles += 12; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
954 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
955 num_cycles += 3; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
956 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
957 num_cycles += 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
958 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
959 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
960 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
961 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
962 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
963 and_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
964 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
965 and_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
966 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
967 and_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
968 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
969 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
970 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
971 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
972 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
973 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
974 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
975 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
976 z80_save_ea(code, inst, opts); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
977 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
978 case Z80_OR: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
979 num_cycles = 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
980 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
981 num_cycles += 12; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
982 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
983 num_cycles += 3; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
984 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
985 num_cycles += 4; |
236
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986 } |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
987 cycles(&opts->gen, num_cycles); |
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diff
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|
988 translate_z80_reg(inst, &dst_op, opts); |
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Get Z80 core back into compileable state
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diff
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|
989 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
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990 if (src_op.mode == MODE_REG_DIRECT) { |
591
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diff
changeset
|
991 or_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
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More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
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|
992 } else if (src_op.mode == MODE_IMMED) { |
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993 or_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
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994 } else { |
730
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|
995 or_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
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996 } |
591
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|
997 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
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Michael Pavone <pavone@retrodev.com>
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1040
diff
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|
998 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
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Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
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1040
diff
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|
999 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1000 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
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|
1001 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1002 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
591
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Get Z80 core back into compileable state
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590
diff
changeset
|
1003 z80_save_reg(inst, opts); |
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|
1004 z80_save_ea(code, inst, opts); |
236
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1005 break; |
213
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
1006 case Z80_XOR: |
591
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1007 num_cycles = 4; |
236
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1008 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
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diff
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|
1009 num_cycles += 12; |
236
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1010 } else if(inst->addr_mode == Z80_IMMED) { |
591
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|
1011 num_cycles += 3; |
236
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1012 } else if(z80_size(inst) == SZ_W) { |
591
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Get Z80 core back into compileable state
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diff
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|
1013 num_cycles += 4; |
236
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235
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|
1014 } |
591
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diff
changeset
|
1015 cycles(&opts->gen, num_cycles); |
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diff
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|
1016 translate_z80_reg(inst, &dst_op, opts); |
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Get Z80 core back into compileable state
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|
1017 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
236
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|
1018 if (src_op.mode == MODE_REG_DIRECT) { |
591
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Get Z80 core back into compileable state
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590
diff
changeset
|
1019 xor_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
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More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1020 } else if (src_op.mode == MODE_IMMED) { |
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|
1021 xor_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
236
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1022 } else { |
730
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More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1023 xor_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
236
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1024 } |
591
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changeset
|
1025 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1026 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1027 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1028 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1029 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1030 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1031 z80_save_reg(inst, opts); |
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Get Z80 core back into compileable state
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diff
changeset
|
1032 z80_save_ea(code, inst, opts); |
236
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235
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|
1033 break; |
242 | 1034 case Z80_CP: |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1035 num_cycles = 4; |
242 | 1036 if (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
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Get Z80 core back into compileable state
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590
diff
changeset
|
1037 num_cycles += 12; |
242 | 1038 } else if(inst->addr_mode == Z80_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1039 num_cycles += 3; |
242 | 1040 } |
591
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Get Z80 core back into compileable state
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diff
changeset
|
1041 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1042 translate_z80_reg(inst, &dst_op, opts); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1043 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
242 | 1044 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1045 cmp_rr(code, src_op.base, dst_op.base, z80_size(inst)); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1046 } else if (src_op.mode == MODE_IMMED) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1047 cmp_ir(code, src_op.disp, dst_op.base, z80_size(inst)); |
242 | 1048 } else { |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1049 cmp_rdispr(code, src_op.base, src_op.disp, dst_op.base, z80_size(inst)); |
242 | 1050 } |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1051 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1052 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1053 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
242 | 1054 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1055 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1056 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1057 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1058 z80_save_ea(code, inst, opts); |
242 | 1059 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1060 case Z80_INC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1061 num_cycles = 4; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1062 if (inst->reg == Z80_IX || inst->reg == Z80_IY) { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1063 num_cycles += 6; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1064 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1065 num_cycles += 2; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1066 } else if(inst->reg == Z80_IXH || inst->reg == Z80_IXL || inst->reg == Z80_IYH || inst->reg == Z80_IYL || inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1067 num_cycles += 4; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1068 } |
591
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Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1069 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1070 translate_z80_reg(inst, &dst_op, opts); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1071 if (dst_op.mode == MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1072 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1073 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1074 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
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Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1075 add_ir(code, 1, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1076 } else { |
38e9bee03749
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729
diff
changeset
|
1077 add_irdisp(code, 1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
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729
diff
changeset
|
1078 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1079 if (z80_size(inst) == SZ_B) { |
591
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590
diff
changeset
|
1080 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1081 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1082 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
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diff
changeset
|
1083 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1084 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1085 } |
591
966b46c68942
Get Z80 core back into compileable state
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parents:
590
diff
changeset
|
1086 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
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590
diff
changeset
|
1087 z80_save_ea(code, inst, opts); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1088 z80_save_result(opts, inst); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1089 break; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1090 case Z80_DEC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1091 num_cycles = 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1092 if (inst->reg == Z80_IX || inst->reg == Z80_IY) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1093 num_cycles += 6; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1094 } else if(z80_size(inst) == SZ_W) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1095 num_cycles += 2; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1096 } else if(inst->reg == Z80_IXH || inst->reg == Z80_IXL || inst->reg == Z80_IYH || inst->reg == Z80_IYL || inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1097 num_cycles += 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1098 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1099 cycles(&opts->gen, num_cycles); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1100 translate_z80_reg(inst, &dst_op, opts); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1101 if (dst_op.mode == MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1102 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1103 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1104 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1105 sub_ir(code, 1, dst_op.base, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1106 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1107 sub_irdisp(code, 1, dst_op.base, dst_op.disp, z80_size(inst)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1108 } |
840
5822c6e5642f
Fix timing of IM instruction
Michael Pavone <pavone@retrodev.com>
parents:
828
diff
changeset
|
1109 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1110 if (z80_size(inst) == SZ_B) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1111 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1112 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1113 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1114 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1115 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1116 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1117 z80_save_reg(inst, opts); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1118 z80_save_ea(code, inst, opts); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1119 z80_save_result(opts, inst); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1120 break; |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1121 case Z80_DAA: |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1122 cycles(&opts->gen, 4); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1123 xor_rr(code, opts->gen.scratch2, opts->gen.scratch2, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1124 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1125 code_ptr corf_low = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1126 jcc(code, CC_NZ, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1127 zreg_to_native(opts, Z80_A, opts->gen.scratch1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1128 and_ir(code, 0xF, opts->gen.scratch1, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1129 cmp_ir(code, 0xA, opts->gen.scratch1, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1130 |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1131 code_ptr no_corf_low = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1132 jcc(code, CC_C, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1133 *corf_low = code->cur - (corf_low + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1134 mov_ir(code, 6, opts->gen.scratch2, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1135 //TODO: Deal with edge case of 9 in high nibble |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1136 mov_ir(code, 0x90, opts->gen.scratch1, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1137 code_ptr after_cmp_set = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1138 jmp(code, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1139 |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1140 *no_corf_low = code->cur - (no_corf_low + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1141 mov_ir(code, 0xA0, opts->gen.scratch1, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1142 *after_cmp_set = code->cur - (after_cmp_set + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1143 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1144 code_ptr corf_high = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1145 jcc(code, CC_NZ, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1146 cmp_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1147 code_ptr no_corf_high = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1148 jcc(code, CC_C, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1149 *corf_high = code->cur - (corf_high + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1150 or_ir(code, 0x60, opts->gen.scratch2, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1151 *no_corf_high = code->cur - (no_corf_high + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1152 |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1153 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1154 code_ptr not_sub = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1155 jcc(code, CC_Z, code->cur+2); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1156 neg_r(code, opts->gen.scratch2, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1157 *not_sub = code->cur - (not_sub + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1158 add_rr(code, opts->gen.scratch2, opts->regs[Z80_A], SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1159 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1160 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1161 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1162 code_ptr no_carry = code->cur+1; |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1163 jcc(code, CC_NC, code->cur+2); |
1043
3980ef0f6307
Implement block CP instructions. Fix bug that would corrupt context reg in DAA. Fix flag values for when LD block instructions are interrupted part way through.
Michael Pavone <pavone@retrodev.com>
parents:
1042
diff
changeset
|
1164 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1165 *no_carry = code->cur - (no_carry + 1); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1166 //TODO: Implement half-carry flag |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1167 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1168 case Z80_CPL: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1169 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1170 not_r(code, opts->regs[Z80_A], SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1171 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1172 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1173 break; |
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1174 case Z80_NEG: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1175 cycles(&opts->gen, 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1176 neg_r(code, opts->regs[Z80_A], SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1177 //TODO: Implement half-carry flag |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1178 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1179 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1180 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1181 setcc_rdisp(code, CC_O, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1182 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
274
be2b845d3e94
Implement CPL and NEG (untested)
Mike Pavone <pavone@retrodev.com>
parents:
273
diff
changeset
|
1183 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1184 case Z80_CCF: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1185 cycles(&opts->gen, 4); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1186 mov_rdispr(code, opts->gen.context_reg, zf_off(ZF_C), opts->gen.scratch1, SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1187 xor_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1188 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1189 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
257 | 1190 break; |
1191 case Z80_SCF: | |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1192 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1193 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1194 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1195 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
257 | 1196 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1197 case Z80_NOP: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1198 if (inst->immed == 42) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1199 call(code, opts->gen.save_context); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
1200 call_args(code, (code_ptr)z80_print_regs_exit, 1, opts->gen.context_reg); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1201 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1202 cycles(&opts->gen, 4 * inst->immed); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1203 } |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1204 break; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1205 case Z80_HALT: { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1206 code_ptr loop_top = code->cur; |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1207 //this isn't terribly efficient, but it's good enough for now |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1208 cycles(&opts->gen, 4); |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1209 check_cycles_int(&opts->gen, address); |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1210 jmp(code, loop_top); |
285
021aeb6df19b
Implement HALT (sort of tested)
Mike Pavone <pavone@retrodev.com>
parents:
284
diff
changeset
|
1211 break; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1212 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1213 case Z80_DI: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1214 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1215 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1216 mov_irdisp(code, 0, opts->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1217 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, sync_cycle), opts->gen.limit, SZ_D); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1218 mov_irdisp(code, 0xFFFFFFFF, opts->gen.context_reg, offsetof(z80_context, int_cycle), SZ_D); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1219 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1220 case Z80_EI: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1221 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1222 mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(z80_context, int_enable_cycle), SZ_D); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1223 mov_irdisp(code, 1, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1224 mov_irdisp(code, 1, opts->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
335 | 1225 //interrupt enable has a one-instruction latency, minimum instruction duration is 4 cycles |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
1226 add_irdisp(code, 4*opts->gen.clock_divider, opts->gen.context_reg, offsetof(z80_context, int_enable_cycle), SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1227 call(code, opts->do_sync); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1228 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1229 case Z80_IM: |
840
5822c6e5642f
Fix timing of IM instruction
Michael Pavone <pavone@retrodev.com>
parents:
828
diff
changeset
|
1230 cycles(&opts->gen, 8); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1231 mov_irdisp(code, inst->immed, opts->gen.context_reg, offsetof(z80_context, im), SZ_B); |
243
2f069a0b487e
Implement EI, DI and IM in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
242
diff
changeset
|
1232 break; |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1233 case Z80_RLC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1234 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1235 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1236 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1237 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1238 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1239 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1240 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1241 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1242 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1243 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1244 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1245 rol_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1246 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1247 rol_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1248 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1249 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1250 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1251 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1252 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1253 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1254 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1255 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1256 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1257 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1258 //rlca does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1259 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1260 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1261 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1262 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1263 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1264 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1265 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1266 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1267 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1268 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1269 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1270 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1271 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1272 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1273 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1274 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1275 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1276 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1277 case Z80_RL: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1278 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1279 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1280 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1281 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1282 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1283 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1284 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1285 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1286 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1287 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1288 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1289 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1290 rcl_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1291 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1292 rcl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1293 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1294 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1295 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1296 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1297 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1298 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1299 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1300 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1301 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1302 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1303 //rla does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1304 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1305 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1306 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1307 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1308 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1309 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1310 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1311 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1312 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1313 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1314 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1315 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1316 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1317 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1318 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1319 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1320 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1321 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1322 case Z80_RRC: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1323 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1324 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1325 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1326 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1327 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1328 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1329 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1330 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1331 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1332 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1333 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1334 ror_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1335 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1336 ror_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1337 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1338 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1339 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1340 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1341 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1342 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1343 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1344 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1345 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1346 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1347 //rrca does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1348 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1349 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1350 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1351 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1352 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1353 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1354 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1355 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1356 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1357 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1358 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1359 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1360 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1361 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1362 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1363 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1364 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1365 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1366 case Z80_RR: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1367 num_cycles = inst->immed == 0 ? 4 : (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1368 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1369 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1370 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1371 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1372 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1373 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1374 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1375 translate_z80_reg(inst, &dst_op, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1376 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1377 bt_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1378 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1379 rcr_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1380 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1381 rcr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1382 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1383 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1384 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1385 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1386 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1387 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1388 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1389 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1390 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1391 if (inst->immed) { |
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1392 //rra does not set these flags |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1393 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1394 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1395 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1396 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1397 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1398 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1399 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1400 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
651
103d5cabbe14
Fix flags for rra, rrca, rla and rlca. Fix timing for rr, rrc, rl and rlc when using IX or IY. Fix access to I and R registers (R still needs to be made 7-bit though). Fix flags for ld a, i. The fix for access to I fixes PCM playback in Titan Overdrive and music playback in Crackdown.
Michael Pavone <pavone@retrodev.com>
parents:
644
diff
changeset
|
1401 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1402 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1403 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1404 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1405 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1406 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1407 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1408 z80_save_reg(inst, opts); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1409 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1410 break; |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1411 case Z80_SLA: |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1412 case Z80_SLL: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1413 num_cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1414 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1415 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1416 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1417 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1418 cycles(&opts->gen, 1); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1419 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1420 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1421 translate_z80_reg(inst, &dst_op, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1422 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1423 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1424 shl_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1425 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1426 shl_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1427 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1428 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1429 if (inst->op == Z80_SLL) { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1430 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1431 or_ir(code, 1, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1432 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1433 or_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1434 } |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1435 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1436 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1437 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1438 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1439 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1440 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1441 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1442 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1443 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1444 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1445 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1446 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1447 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1448 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1449 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1450 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1451 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1452 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1453 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1454 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1455 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1456 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1457 z80_save_reg(inst, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1458 } |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1459 break; |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1460 case Z80_SRA: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1461 num_cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1462 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1463 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1464 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1465 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1466 cycles(&opts->gen, 1); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1467 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1468 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1469 translate_z80_reg(inst, &dst_op, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1470 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1471 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1472 sar_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1473 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1474 sar_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1475 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1476 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1477 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1478 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1479 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1480 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1481 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1482 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1483 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1484 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1485 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1486 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1487 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1488 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1489 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1490 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1491 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1492 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1493 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1494 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1495 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1496 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1497 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1498 z80_save_reg(inst, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1499 } |
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1500 break; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1501 case Z80_SRL: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1502 num_cycles = inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE ? 16 : 8; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1503 cycles(&opts->gen, num_cycles); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1504 if (inst->addr_mode != Z80_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1505 translate_z80_ea(inst, &dst_op, opts, READ, MODIFY); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1506 translate_z80_reg(inst, &src_op, opts); //For IX/IY variants that also write to a register |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1507 cycles(&opts->gen, 1); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1508 } else { |
302
3b831fe32c15
More fixes for confusion between Z80_UNUSED and MODE_UNUSED
Mike Pavone <pavone@retrodev.com>
parents:
301
diff
changeset
|
1509 src_op.mode = MODE_UNUSED; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1510 translate_z80_reg(inst, &dst_op, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1511 } |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1512 if (dst_op.mode == MODE_REG_DIRECT) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1513 shr_ir(code, 1, dst_op.base, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1514 } else { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1515 shr_irdisp(code, 1, dst_op.base, dst_op.disp, SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1516 } |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1517 if (src_op.mode == MODE_REG_DIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1518 mov_rr(code, dst_op.base, src_op.base, SZ_B); |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1519 } else if(src_op.mode == MODE_REG_DISPLACE8) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1520 mov_rrdisp(code, dst_op.base, src_op.base, src_op.disp, SZ_B); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1521 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1522 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1523 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1524 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1525 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1526 cmp_ir(code, 0, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1527 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1528 cmp_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1529 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1530 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1531 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1532 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1533 if (inst->addr_mode != Z80_UNUSED) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1534 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1535 if (src_op.mode != MODE_UNUSED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1536 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1537 } |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1538 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1539 z80_save_reg(inst, opts); |
275
1a7d0a964ad2
Implement shift instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
274
diff
changeset
|
1540 } |
310
bf440db64086
Implement carry flag for shift instructions. Implement weird behavior for bit 0 of SLL. Fix missing break statement in SRL.
Mike Pavone <pavone@retrodev.com>
parents:
309
diff
changeset
|
1541 break; |
286 | 1542 case Z80_RLD: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1543 cycles(&opts->gen, 8); |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1544 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1545 call(code, opts->read_8); |
286 | 1546 //Before: (HL) = 0x12, A = 0x34 |
1547 //After: (HL) = 0x24, A = 0x31 | |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1548 zreg_to_native(opts, Z80_A, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1549 shl_ir(code, 4, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1550 and_ir(code, 0xF, opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1551 and_ir(code, 0xFFF, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1552 and_ir(code, 0xF0, opts->regs[Z80_A], SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1553 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1554 //opts->gen.scratch1 = 0x0124 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1555 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1556 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1557 or_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1558 //set flags |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1559 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1560 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1561 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1562 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1563 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1564 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1565 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1566 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1567 call(code, opts->write_8); |
286 | 1568 break; |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1569 case Z80_RRD: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1570 cycles(&opts->gen, 8); |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1571 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1572 call(code, opts->read_8); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1573 //Before: (HL) = 0x12, A = 0x34 |
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1574 //After: (HL) = 0x41, A = 0x32 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1575 zreg_to_native(opts, Z80_A, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1576 ror_ir(code, 4, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1577 shl_ir(code, 4, opts->gen.scratch2, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1578 and_ir(code, 0xF00F, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1579 and_ir(code, 0xF0, opts->regs[Z80_A], SZ_B); |
967
1eb616b8cbe9
Fix bug in Z80 rrd implementation. This fixes the annoying high pitched wine in Afterburner II.
Michael Pavone <pavone@retrodev.com>
parents:
966
diff
changeset
|
1580 and_ir(code, 0xF0, opts->gen.scratch2, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1581 //opts->gen.scratch1 = 0x2001 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1582 //opts->gen.scratch2 = 0x0040 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1583 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_W); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
1584 //opts->gen.scratch1 = 0x2041 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1585 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1586 cycles(&opts->gen, 4); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1587 shr_ir(code, 4, opts->gen.scratch1, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1588 or_rr(code, opts->gen.scratch1, opts->regs[Z80_A], SZ_B); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1589 //set flags |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1590 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1591 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1592 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1593 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1594 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1595 |
734
e21c274a008e
Fix RLD and RRD for the case in which HL does not map to a native register
Michael Pavone <pavone@retrodev.com>
parents:
731
diff
changeset
|
1596 zreg_to_native(opts, Z80_HL, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1597 ror_ir(code, 8, opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1598 call(code, opts->write_8); |
287
fb840e0a48cd
Implement RRD and implement flags on RLD
Mike Pavone <pavone@retrodev.com>
parents:
286
diff
changeset
|
1599 break; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1600 case Z80_BIT: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1601 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1602 cycles(&opts->gen, num_cycles); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1603 uint8_t bit; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1604 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1605 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
737
043393b79e28
Fixes for the 32-bit build accidentally introduced a bug into the 64-bit build, this commit fixes the regression
Michael Pavone <pavone@retrodev.com>
parents:
735
diff
changeset
|
1606 src_op.mode = MODE_REG_DIRECT; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1607 size = SZ_W; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1608 bit = inst->immed + 8; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1609 } else { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1610 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1611 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1612 translate_z80_ea(inst, &src_op, opts, READ, DONT_MODIFY); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1613 } |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1614 if (inst->addr_mode != Z80_REG) { |
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1615 //Reads normally take 3 cycles, but the read at the end of a bit instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1616 cycles(&opts->gen, 1); |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1617 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1618 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1619 bt_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1620 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1621 bt_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1622 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1623 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_Z)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1624 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_PV)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1625 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
1626 mov_irdisp(code, 1, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1627 if (inst->immed == 7) { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1628 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1629 cmp_ir(code, 0, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1630 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1631 cmp_irdisp(code, 0, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1632 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1633 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1634 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1635 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
307
b6393b89a7e4
Complete flag behavior for Z80 BIT instruction
Mike Pavone <pavone@retrodev.com>
parents:
306
diff
changeset
|
1636 } |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1637 break; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1638 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1639 case Z80_SET: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1640 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1641 cycles(&opts->gen, num_cycles); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1642 uint8_t bit; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1643 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1644 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
737
043393b79e28
Fixes for the 32-bit build accidentally introduced a bug into the 64-bit build, this commit fixes the regression
Michael Pavone <pavone@retrodev.com>
parents:
735
diff
changeset
|
1645 src_op.mode = MODE_REG_DIRECT; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1646 size = SZ_W; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1647 bit = inst->immed + 8; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1648 } else { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1649 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1650 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1651 translate_z80_ea(inst, &src_op, opts, READ, MODIFY); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1652 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1653 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1654 translate_z80_reg(inst, &dst_op, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1655 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1656 if (inst->addr_mode != Z80_REG) { |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1657 //Reads normally take 3 cycles, but the read in the middle of a set instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1658 cycles(&opts->gen, 1); |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1659 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1660 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1661 bts_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1662 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1663 bts_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1664 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1665 if (inst->reg != Z80_USE_IMMED) { |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1666 if (size == SZ_W) { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1667 #ifdef X86_64 |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1668 if (dst_op.base >= R8) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1669 ror_ir(code, 8, src_op.base, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1670 mov_rr(code, opts->regs[z80_low_reg(inst->ea_reg)], dst_op.base, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1671 ror_ir(code, 8, src_op.base, SZ_W); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1672 } else { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1673 #endif |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1674 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1675 zreg_to_native(opts, inst->ea_reg, dst_op.base); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1676 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1677 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1678 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1679 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1680 #ifdef X86_64 |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1681 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1682 #endif |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1683 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1684 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1685 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1686 mov_rr(code, src_op.base, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1687 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1688 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1689 } |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1690 } else if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1691 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1692 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1693 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1694 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1695 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1696 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1697 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1698 if ((inst->addr_mode & 0x1F) != Z80_REG) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1699 z80_save_result(opts, inst); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1700 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1701 z80_save_reg(inst, opts); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1702 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1703 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1704 break; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1705 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1706 case Z80_RES: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1707 num_cycles = (inst->addr_mode == Z80_IX_DISPLACE || inst->addr_mode == Z80_IY_DISPLACE) ? 8 : 16; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1708 cycles(&opts->gen, num_cycles); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1709 uint8_t bit; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1710 if ((inst->addr_mode & 0x1F) == Z80_REG && opts->regs[inst->ea_reg] >= AH && opts->regs[inst->ea_reg] <= BH) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1711 src_op.base = opts->regs[z80_word_reg(inst->ea_reg)]; |
737
043393b79e28
Fixes for the 32-bit build accidentally introduced a bug into the 64-bit build, this commit fixes the regression
Michael Pavone <pavone@retrodev.com>
parents:
735
diff
changeset
|
1712 src_op.mode = MODE_REG_DIRECT; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1713 size = SZ_W; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1714 bit = inst->immed + 8; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1715 } else { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1716 size = SZ_B; |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1717 bit = inst->immed; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1718 translate_z80_ea(inst, &src_op, opts, READ, MODIFY); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1719 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1720 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1721 translate_z80_reg(inst, &dst_op, opts); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1722 } |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1723 if (inst->addr_mode != Z80_REG) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1724 //Reads normally take 3 cycles, but the read in the middle of a set instruction takes 4 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1725 cycles(&opts->gen, 1); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1726 } |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1727 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1728 btr_ir(code, bit, src_op.base, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1729 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1730 btr_irdisp(code, bit, src_op.base, src_op.disp, size); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1731 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1732 if (inst->reg != Z80_USE_IMMED) { |
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1733 if (size == SZ_W) { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1734 #ifdef X86_64 |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1735 if (dst_op.base >= R8) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1736 ror_ir(code, 8, src_op.base, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1737 mov_rr(code, opts->regs[z80_low_reg(inst->ea_reg)], dst_op.base, SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1738 ror_ir(code, 8, src_op.base, SZ_W); |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1739 } else { |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1740 #endif |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1741 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1742 zreg_to_native(opts, inst->ea_reg, dst_op.base); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1743 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1744 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1745 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1746 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1747 #ifdef X86_64 |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
1748 } |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1749 #endif |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1750 } else { |
731
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1751 if (dst_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1752 if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1753 mov_rr(code, src_op.base, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1754 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1755 mov_rdispr(code, src_op.base, src_op.disp, dst_op.base, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1756 } |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1757 } else if (src_op.mode == MODE_REG_DIRECT) { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1758 mov_rrdisp(code, src_op.base, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1759 } else { |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1760 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1761 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
0835cd3dfc36
Z80 test cases that passed on 64-bit now pass on 32-bit
Michael Pavone <pavone@retrodev.com>
parents:
730
diff
changeset
|
1762 } |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1763 } |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1764 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1765 if (inst->addr_mode != Z80_REG) { |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1766 z80_save_result(opts, inst); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1767 if (inst->reg != Z80_USE_IMMED) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1768 z80_save_reg(inst, opts); |
299
42e1a986f2d0
Fix calcuation of IX/IY dipslacements. Fix a bunch of stuff related to the IX/IY bit/shift/rotate instructions.
Mike Pavone <pavone@retrodev.com>
parents:
295
diff
changeset
|
1769 } |
247
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1770 } |
682e505f5757
Implement rotation and bit set/reset instructions (untested).
Mike Pavone <pavone@retrodev.com>
parents:
246
diff
changeset
|
1771 break; |
308
e0e81551fd7e
Deal with the fact that there's no 8-bit version of the BT family of instructions on x86
Mike Pavone <pavone@retrodev.com>
parents:
307
diff
changeset
|
1772 } |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1773 case Z80_JP: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1774 num_cycles = 4; |
506
a3b48a57e847
Fix timing of certain ld and jp instructions in the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
505
diff
changeset
|
1775 if (inst->addr_mode != Z80_REG_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1776 num_cycles += 6; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1777 } else if(inst->ea_reg == Z80_IX || inst->ea_reg == Z80_IY) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1778 num_cycles += 4; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1779 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1780 cycles(&opts->gen, num_cycles); |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1781 if (inst->addr_mode != Z80_REG_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1782 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1783 if (!call_dst) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1784 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1785 //fake address to force large displacement |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
1786 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1787 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1788 jmp(code, call_dst); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1789 } else { |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
1790 if (inst->addr_mode == Z80_REG_INDIRECT) { |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
1791 zreg_to_native(opts, inst->ea_reg, opts->gen.scratch1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1792 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1793 mov_ir(code, inst->immed, opts->gen.scratch1, SZ_W); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1794 } |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
1795 call(code, opts->native_addr); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1796 jmp_r(code, opts->gen.scratch1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1797 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1798 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1799 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1800 case Z80_JPCC: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1801 cycles(&opts->gen, 7);//T States: 4,3 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1802 uint8_t cond = CC_Z; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1803 switch (inst->reg) |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1804 { |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1805 case Z80_CC_NZ: |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1806 cond = CC_NZ; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1807 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1808 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1809 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1810 case Z80_CC_NC: |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1811 cond = CC_NZ; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1812 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1813 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1814 break; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1815 case Z80_CC_PO: |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1816 cond = CC_NZ; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1817 case Z80_CC_PE: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1818 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1819 break; |
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1820 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
366
diff
changeset
|
1821 cond = CC_NZ; |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1822 case Z80_CC_M: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1823 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
238
827ebce557bf
Added the rest of the conditions to JPCC, implemented CALLCC (untested)
Mike Pavone <pavone@retrodev.com>
parents:
236
diff
changeset
|
1824 break; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1825 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1826 uint8_t *no_jump_off = code->cur+1; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1827 jcc(code, cond, code->cur+2); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1828 cycles(&opts->gen, 5);//T States: 5 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1829 uint16_t dest_addr = inst->immed; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1830 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1831 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1832 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1833 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1834 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1835 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1836 jmp(code, call_dst); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1837 *no_jump_off = code->cur - (no_jump_off+1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1838 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1839 } |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1840 case Z80_JR: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1841 cycles(&opts->gen, 12);//T States: 4,3,5 |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1842 uint16_t dest_addr = address + inst->immed + 2; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1843 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1844 if (!call_dst) { |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1845 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1846 //fake address to force large displacement |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1847 call_dst = code->cur + 256; |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1848 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
1849 jmp(code, call_dst); |
236
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1850 break; |
19fb3523a9e5
Implement more Z80 instructions (untested)
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
1851 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1852 case Z80_JRCC: { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1853 cycles(&opts->gen, 7);//T States: 4,3 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1854 uint8_t cond = CC_Z; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1855 switch (inst->reg) |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1856 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1857 case Z80_CC_NZ: |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1858 cond = CC_NZ; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1859 case Z80_CC_Z: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1860 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1861 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1862 case Z80_CC_NC: |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1863 cond = CC_NZ; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1864 case Z80_CC_C: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
1865 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1866 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
1867 } |
591
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Get Z80 core back into compileable state
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diff
changeset
|
1868 uint8_t *no_jump_off = code->cur+1; |
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diff
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|
1869 jcc(code, cond, code->cur+2); |
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diff
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|
1870 cycles(&opts->gen, 5);//T States: 5 |
235
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|
1871 uint16_t dest_addr = address + inst->immed + 2; |
653
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|
1872 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
235
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|
1873 if (!call_dst) { |
653
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diff
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|
1874 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
235
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|
1875 //fake address to force large displacement |
653
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652
diff
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|
1876 call_dst = code->cur + 256; |
235
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|
1877 } |
653
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diff
changeset
|
1878 jmp(code, call_dst); |
591
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diff
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|
1879 *no_jump_off = code->cur - (no_jump_off+1); |
235
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|
1880 break; |
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|
1881 } |
653
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Remove some of the hard coded assumptions about the memory map from the CPU cores
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652
diff
changeset
|
1882 case Z80_DJNZ: { |
591
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Get Z80 core back into compileable state
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590
diff
changeset
|
1883 cycles(&opts->gen, 8);//T States: 5,3 |
730
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
729
diff
changeset
|
1884 if (opts->regs[Z80_B] >= 0) { |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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729
diff
changeset
|
1885 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
Michael Pavone <pavone@retrodev.com>
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729
diff
changeset
|
1886 } else { |
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More bugfixes for the 32-bit build of the Z80 core
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changeset
|
1887 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
38e9bee03749
More bugfixes for the 32-bit build of the Z80 core
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changeset
|
1888 } |
591
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changeset
|
1889 uint8_t *no_jump_off = code->cur+1; |
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Get Z80 core back into compileable state
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diff
changeset
|
1890 jcc(code, CC_Z, code->cur+2); |
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590
diff
changeset
|
1891 cycles(&opts->gen, 5);//T States: 5 |
239
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Implement BIT and DJNZ (tested). Fix register mapping for IYL.
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238
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|
1892 uint16_t dest_addr = address + inst->immed + 2; |
653
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652
diff
changeset
|
1893 code_ptr call_dst = z80_get_native_address(context, dest_addr); |
239
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|
1894 if (!call_dst) { |
653
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changeset
|
1895 opts->gen.deferred = defer_address(opts->gen.deferred, dest_addr, code->cur + 1); |
239
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|
1896 //fake address to force large displacement |
653
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changeset
|
1897 call_dst = code->cur + 256; |
239
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1898 } |
653
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changeset
|
1899 jmp(code, call_dst); |
591
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1900 *no_jump_off = code->cur - (no_jump_off+1); |
239
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|
1901 break; |
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1902 } |
235
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1903 case Z80_CALL: { |
591
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1904 cycles(&opts->gen, 11);//T States: 4,3,4 |
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|
1905 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
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|
1906 mov_ir(code, address + 3, opts->gen.scratch1, SZ_W); |
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|
1907 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
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|
1908 call(code, opts->write_16_highfirst);//T States: 3, 3 |
653
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|
1909 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
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1910 if (!call_dst) { |
653
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1911 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
235
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1912 //fake address to force large displacement |
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1913 call_dst = code->cur + 256; |
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1914 } |
653
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1915 jmp(code, call_dst); |
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1916 break; |
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1917 } |
653
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1918 case Z80_CALLCC: { |
591
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1919 cycles(&opts->gen, 10);//T States: 4,3,3 (false case) |
238
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1920 uint8_t cond = CC_Z; |
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1921 switch (inst->reg) |
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1922 { |
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1923 case Z80_CC_NZ: |
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1924 cond = CC_NZ; |
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1925 case Z80_CC_Z: |
591
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1926 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
238
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1927 break; |
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1928 case Z80_CC_NC: |
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1929 cond = CC_NZ; |
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1930 case Z80_CC_C: |
591
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1931 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
238
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1932 break; |
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1933 case Z80_CC_PO: |
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|
1934 cond = CC_NZ; |
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1935 case Z80_CC_PE: |
591
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|
1936 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
238
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1937 break; |
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|
1938 case Z80_CC_P: |
367
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366
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|
1939 cond = CC_NZ; |
238
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1940 case Z80_CC_M: |
591
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|
1941 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
238
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|
1942 break; |
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|
1943 } |
591
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|
1944 uint8_t *no_call_off = code->cur+1; |
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|
1945 jcc(code, cond, code->cur+2); |
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|
1946 cycles(&opts->gen, 1);//Last of the above T states takes an extra cycle in the true case |
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|
1947 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
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|
1948 mov_ir(code, address + 3, opts->gen.scratch1, SZ_W); |
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diff
changeset
|
1949 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
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changeset
|
1950 call(code, opts->write_16_highfirst);//T States: 3, 3 |
653
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|
1951 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
238
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|
1952 if (!call_dst) { |
653
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diff
changeset
|
1953 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
238
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|
1954 //fake address to force large displacement |
653
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|
1955 call_dst = code->cur + 256; |
238
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|
1956 } |
653
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Remove some of the hard coded assumptions about the memory map from the CPU cores
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changeset
|
1957 jmp(code, call_dst); |
591
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|
1958 *no_call_off = code->cur - (no_call_off+1); |
238
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|
1959 break; |
682 | 1960 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1961 case Z80_RET: |
591
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|
1962 cycles(&opts->gen, 4);//T States: 4 |
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diff
changeset
|
1963 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
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diff
changeset
|
1964 call(code, opts->read_16);//T STates: 3, 3 |
591
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diff
changeset
|
1965 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
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diff
changeset
|
1966 call(code, opts->native_addr); |
591
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|
1967 jmp_r(code, opts->gen.scratch1); |
235
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|
1968 break; |
246
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changeset
|
1969 case Z80_RETCC: { |
591
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diff
changeset
|
1970 cycles(&opts->gen, 5);//T States: 5 |
246
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changeset
|
1971 uint8_t cond = CC_Z; |
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changeset
|
1972 switch (inst->reg) |
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changeset
|
1973 { |
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|
1974 case Z80_CC_NZ: |
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changeset
|
1975 cond = CC_NZ; |
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changeset
|
1976 case Z80_CC_Z: |
591
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1977 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_Z), SZ_B); |
246
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1978 break; |
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1979 case Z80_CC_NC: |
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1980 cond = CC_NZ; |
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1981 case Z80_CC_C: |
591
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1982 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_C), SZ_B); |
246
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1983 break; |
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1984 case Z80_CC_PO: |
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1985 cond = CC_NZ; |
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1986 case Z80_CC_PE: |
591
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|
1987 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_PV), SZ_B); |
246
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1988 break; |
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|
1989 case Z80_CC_P: |
367
f20562f2a570
Fix P condition in Z80 core
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366
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|
1990 cond = CC_NZ; |
246
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1991 case Z80_CC_M: |
591
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|
1992 cmp_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_S), SZ_B); |
246
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Implement RETCC in Z80 core.
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243
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|
1993 break; |
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243
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|
1994 } |
591
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diff
changeset
|
1995 uint8_t *no_call_off = code->cur+1; |
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Get Z80 core back into compileable state
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|
1996 jcc(code, cond, code->cur+2); |
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Get Z80 core back into compileable state
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diff
changeset
|
1997 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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592
diff
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|
1998 call(code, opts->read_16);//T STates: 3, 3 |
591
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1999 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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2000 call(code, opts->native_addr); |
591
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2001 jmp_r(code, opts->gen.scratch1); |
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Get Z80 core back into compileable state
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|
2002 *no_call_off = code->cur - (no_call_off+1); |
246
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Implement RETCC in Z80 core.
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|
2003 break; |
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2004 } |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
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282
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|
2005 case Z80_RETI: |
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
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2006 //For some systems, this may need a callback for signalling interrupt routine completion |
591
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590
diff
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|
2007 cycles(&opts->gen, 8);//T States: 4, 4 |
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Get Z80 core back into compileable state
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590
diff
changeset
|
2008 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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592
diff
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|
2009 call(code, opts->read_16);//T STates: 3, 3 |
591
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Get Z80 core back into compileable state
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590
diff
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|
2010 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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diff
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|
2011 call(code, opts->native_addr); |
591
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590
diff
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|
2012 jmp_r(code, opts->gen.scratch1); |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
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|
2013 break; |
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Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
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282
diff
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|
2014 case Z80_RETN: |
591
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590
diff
changeset
|
2015 cycles(&opts->gen, 8);//T States: 4, 4 |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
2016 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, iff2), opts->gen.scratch2, SZ_B); |
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Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
2017 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch1, SZ_W); |
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Get Z80 core back into compileable state
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diff
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|
2018 mov_rrdisp(code, opts->gen.scratch2, opts->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
593
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Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
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592
diff
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|
2019 call(code, opts->read_16);//T STates: 3, 3 |
591
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|
2020 add_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
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parents:
592
diff
changeset
|
2021 call(code, opts->native_addr); |
591
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590
diff
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|
2022 jmp_r(code, opts->gen.scratch1); |
283
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Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
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|
2023 break; |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
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239
diff
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|
2024 case Z80_RST: { |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
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239
diff
changeset
|
2025 //RST is basically CALL to an address in page 0 |
591
966b46c68942
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Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2026 cycles(&opts->gen, 5);//T States: 5 |
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Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2027 sub_ir(code, 2, opts->regs[Z80_SP], SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2028 mov_ir(code, address + 1, opts->gen.scratch1, SZ_W); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2029 mov_rr(code, opts->regs[Z80_SP], opts->gen.scratch2, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2030 call(code, opts->write_16_highfirst);//T States: 3, 3 |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2031 code_ptr call_dst = z80_get_native_address(context, inst->immed); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
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239
diff
changeset
|
2032 if (!call_dst) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
2033 opts->gen.deferred = defer_address(opts->gen.deferred, inst->immed, code->cur + 1); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2034 //fake address to force large displacement |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2035 call_dst = code->cur + 256; |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2036 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
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590
diff
changeset
|
2037 jmp(code, call_dst); |
241
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2038 break; |
2586d49ddd46
Implement EX, EXX and RST in Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
239
diff
changeset
|
2039 } |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2040 case Z80_IN: |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2041 cycles(&opts->gen, inst->reg == inst->addr_mode == Z80_IMMED_INDIRECT ? 7 : 8);//T States: 4 3/4 |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2042 if (inst->addr_mode == Z80_IMMED_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2043 mov_ir(code, inst->immed, opts->gen.scratch1, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2044 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2045 mov_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2046 } |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2047 call(code, opts->read_io); |
1042
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2048 if (inst->addr_mode != Z80_IMMED_INDIRECT) { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2049 or_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2050 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_H), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2051 mov_irdisp(code, 0, opts->gen.context_reg, zf_off(ZF_N), SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2052 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2053 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2054 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2055 } |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2056 if (inst->reg != Z80_UNUSED) { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2057 translate_z80_reg(inst, &dst_op, opts); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2058 if (dst_op.mode == MODE_REG_DIRECT) { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2059 mov_rr(code, opts->gen.scratch1, dst_op.base, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2060 } else { |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2061 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, SZ_B); |
a6c6b621d0dc
Implement Z80 DAA. Implement half-carry flag for the rest of the "easy" cases. Implement flags for IN instruction. Fix implementation of IN for IN F, (C) case
Michael Pavone <pavone@retrodev.com>
parents:
1040
diff
changeset
|
2062 } |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2063 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2064 z80_save_reg(inst, opts); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2065 break; |
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2066 /*case Z80_INI: |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2067 case Z80_INIR: |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2068 case Z80_IND: |
284
ed7098f717d7
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Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2069 case Z80_INDR:*/ |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2070 case Z80_OUT: |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2071 cycles(&opts->gen, inst->reg == Z80_A ? 7 : 8);//T States: 4 3/4 |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2072 if ((inst->addr_mode & 0x1F) == Z80_IMMED_INDIRECT) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2073 mov_ir(code, inst->immed, opts->gen.scratch2, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2074 } else { |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2075 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2076 mov_rr(code, opts->regs[Z80_C], opts->gen.scratch2, SZ_B); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2077 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2078 translate_z80_reg(inst, &src_op, opts); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2079 if (src_op.mode == MODE_REG_DIRECT) { |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2080 mov_rr(code, src_op.base, opts->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2081 } else if (src_op.mode == MODE_IMMED) { |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2082 mov_ir(code, src_op.disp, opts->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2083 } else { |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2084 mov_rdispr(code, src_op.base, src_op.disp, opts->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2085 } |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2086 call(code, opts->write_io); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2087 z80_save_reg(inst, opts); |
284
ed7098f717d7
Implement IN and OUT (untested)
Mike Pavone <pavone@retrodev.com>
parents:
283
diff
changeset
|
2088 break; |
1040
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2089 case Z80_OUTI: |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2090 cycles(&opts->gen, 9);//T States: 4, 5 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2091 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2092 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2093 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2094 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2095 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2096 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2097 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2098 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2099 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2100 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2101 //increment HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2102 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2103 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2104 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2105 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2106 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2107 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2108 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2109 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2110 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2111 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2112 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2113 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2114 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2115 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2116 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2117 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2118 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2119 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2120 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2121 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2122 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2123 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2124 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2125 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2126 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2127 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2128 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2129 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2130 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2131 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2132 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2133 case Z80_OTIR: { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2134 code_ptr start = code->cur; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2135 cycles(&opts->gen, 9);//T States: 4, 5 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2136 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2137 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2138 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2139 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2140 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2141 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2142 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2143 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2144 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2145 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2146 //increment HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2147 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2148 add_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2149 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2150 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2151 add_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2152 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2153 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2154 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2155 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2156 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2157 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2158 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2159 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2160 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2161 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2162 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2163 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2164 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2165 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2166 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2167 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2168 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2169 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2170 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2171 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2172 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2173 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2174 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2175 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2176 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2177 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2178 cmp_ir(code, 0, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2179 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2180 cmp_irdisp(code, 0, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2181 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2182 code_ptr done = code->cur+1; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2183 jcc(code, CC_Z, code->cur+2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2184 cycles(&opts->gen, 5); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2185 jmp(code, start); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2186 *done = code->cur - (done + 1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2187 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2188 } |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2189 case Z80_OUTD: |
1040
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2190 cycles(&opts->gen, 9);//T States: 4, 5 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2191 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2192 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2193 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2194 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2195 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2196 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2197 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2198 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2199 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2200 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2201 //decrement HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2202 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2203 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2204 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2205 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2206 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2207 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2208 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2209 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2210 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2211 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2212 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2213 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2214 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2215 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2216 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2217 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2218 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2219 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2220 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2221 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2222 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2223 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2224 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2225 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2226 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2227 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2228 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2229 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2230 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2231 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2232 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2233 case Z80_OTDR: { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2234 code_ptr start = code->cur; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2235 cycles(&opts->gen, 9);//T States: 4, 5 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2236 //read from (HL) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2237 zreg_to_native(opts, Z80_HL, opts->gen.scratch1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2238 call(code, opts->read_8);//T states 3 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2239 //undocumented N flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2240 //flag set on bit 7 of value written |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2241 bt_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2242 setcc_rdisp(code, CC_NC, opts->gen.context_reg, zf_off(ZF_N)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2243 //write to IO (C) |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2244 zreg_to_native(opts, Z80_C, opts->gen.scratch2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2245 call(code, opts->write_io);//T states 4 |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2246 //increment HL |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2247 if (opts->regs[Z80_HL] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2248 sub_ir(code, 1, opts->regs[Z80_HL], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2249 add_rr(code, opts->regs[Z80_L], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2250 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2251 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_HL), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2252 add_rdispr(code, opts->gen.context_reg, zr_off(Z80_L), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2253 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2254 //undocumented C and H flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2255 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_C)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2256 setcc_rdisp(code, CC_C, opts->gen.context_reg, zf_off(ZF_H)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2257 //decrement B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2258 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2259 sub_ir(code, 1, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2260 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2261 sub_irdisp(code, 1, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2262 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2263 //undocumented Z and S flag behavior, set based on decrement of B |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2264 setcc_rdisp(code, CC_Z, opts->gen.context_reg, zf_off(ZF_Z)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2265 setcc_rdisp(code, CC_S, opts->gen.context_reg, zf_off(ZF_S)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2266 //crazy undocumented P/V flag behavior |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2267 and_ir(code, 7, opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2268 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2269 //deal with silly x86-64 restrictions on *H registers |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2270 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2271 xor_rr(code, opts->regs[Z80_C], opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2272 ror_ir(code, 8, opts->regs[Z80_BC], SZ_W); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2273 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2274 xor_rdispr(code, opts->gen.context_reg, zr_off(Z80_B), opts->gen.scratch1, SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2275 } |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2276 setcc_rdisp(code, CC_P, opts->gen.context_reg, zf_off(ZF_PV)); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2277 if (opts->regs[Z80_B] >= 0) { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2278 cmp_ir(code, 0, opts->regs[Z80_B], SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2279 } else { |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2280 cmp_irdisp(code, 0, opts->gen.context_reg, zr_off(Z80_B), SZ_B); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2281 } |
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Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2282 code_ptr done = code->cur+1; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2283 jcc(code, CC_Z, code->cur+2); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2284 cycles(&opts->gen, 5); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2285 jmp(code, start); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2286 *done = code->cur - (done + 1); |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
parents:
967
diff
changeset
|
2287 break; |
fbfb821e92a8
Implement Z80 block OUT instructions. Fixes Power Monger
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
2288 } |
235
d9bf8e61c33c
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213
diff
changeset
|
2289 default: { |
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213
diff
changeset
|
2290 char disbuf[80]; |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2291 z80_disasm(inst, disbuf, address); |
259
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2292 FILE * f = fopen("zram.bin", "wb"); |
d9417261366f
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Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2293 fwrite(context->mem_pointers[0], 1, 8 * 1024, f); |
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2294 fclose(f); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2295 fatal_error("unimplemented Z80 instruction: %s at %X\nZ80 RAM has been saved to zram.bin for debugging", disbuf, address); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
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diff
changeset
|
2296 } |
235
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Get Z80 core working for simple programs
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213
diff
changeset
|
2297 } |
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213
diff
changeset
|
2298 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
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213
diff
changeset
|
2299 |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2300 uint8_t * z80_interp_handler(uint8_t opcode, z80_context * context) |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
2301 { |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2302 if (!context->interp_code[opcode]) { |
755
7306b3967c51
Cleanup some warnings under clang through a combination of code fixes and supressing specific warnings
Michael Pavone <pavone@retrodev.com>
parents:
737
diff
changeset
|
2303 if (opcode == 0xCB || (opcode >= 0xDD && (opcode & 0xF) == 0xD)) { |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2304 fatal_error("Encountered prefix byte %X at address %X. Z80 interpeter doesn't support those yet.", opcode, context->pc); |
627
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Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
2305 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2306 uint8_t codebuf[8]; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2307 memset(codebuf, 0, sizeof(codebuf)); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2308 codebuf[0] = opcode; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2309 z80inst inst; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2310 uint8_t * after = z80_decode(codebuf, &inst); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2311 if (after - codebuf > 1) { |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2312 fatal_error("Encountered multi-byte Z80 instruction at %X. Z80 interpeter doesn't support those yet.", context->pc); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2313 } |
652 | 2314 |
2315 z80_options * opts = context->options; | |
2316 code_info *code = &opts->gen.code; | |
2317 check_alloc_code(code, ZMAX_NATIVE_SIZE); | |
2318 context->interp_code[opcode] = code->cur; | |
2319 translate_z80inst(&inst, context, 0, 1); | |
2320 mov_rdispr(code, opts->gen.context_reg, offsetof(z80_context, pc), opts->gen.scratch1, SZ_W); | |
2321 add_ir(code, after - codebuf, opts->gen.scratch1, SZ_W); | |
2322 call(code, opts->native_addr); | |
2323 jmp_r(code, opts->gen.scratch1); | |
715
1c2020d3e275
Call z80_handle_deferred after generating an insruction handler so that instructions like rst work correctly
Michael Pavone <pavone@retrodev.com>
parents:
712
diff
changeset
|
2324 z80_handle_deferred(context); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2325 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2326 return context->interp_code[opcode]; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2327 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2328 |
652 | 2329 code_info z80_make_interp_stub(z80_context * context, uint16_t address) |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2330 { |
652 | 2331 z80_options *opts = context->options; |
2332 code_info * code = &opts->gen.code; | |
2333 check_alloc_code(code, 32); | |
2334 code_info stub = {code->cur, NULL}; | |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2335 //TODO: make this play well with the breakpoint code |
652 | 2336 mov_ir(code, address, opts->gen.scratch1, SZ_W); |
2337 call(code, opts->read_8); | |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2338 //normal opcode fetch is already factored into instruction timing |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2339 //back out the base 3 cycles from a read here |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2340 //not quite perfect, but it will have to do for now |
652 | 2341 cycles(&opts->gen, -3); |
2342 check_cycles_int(&opts->gen, address); | |
2343 call(code, opts->gen.save_context); | |
2344 mov_irdisp(code, address, opts->gen.context_reg, offsetof(z80_context, pc), SZ_W); | |
2345 push_r(code, opts->gen.context_reg); | |
712
382a2b5b70c0
Fix crash bug in Z80 interpreter
Michael Pavone <pavone@retrodev.com>
parents:
702
diff
changeset
|
2346 call_args(code, (code_ptr)z80_interp_handler, 2, opts->gen.scratch1, opts->gen.context_reg); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
2347 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); |
652 | 2348 pop_r(code, opts->gen.context_reg); |
2349 call(code, opts->gen.load_context); | |
2350 jmp_r(code, opts->gen.scratch1); | |
2351 stub.last = code->cur; | |
2352 return stub; | |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2353 } |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2354 |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2355 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2356 uint8_t * z80_get_native_address(z80_context * context, uint32_t address) |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2357 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
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213
diff
changeset
|
2358 native_map_slot *map; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2359 if (address < 0x4000) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2360 address &= 0x1FFF; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2361 map = context->static_code_map; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2362 } else { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2363 address -= 0x4000; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2364 map = context->banked_code_map; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2365 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2366 if (!map->base || !map->offsets || map->offsets[address] == INVALID_OFFSET || map->offsets[address] == EXTENSION_WORD) { |
313
a13329645ea3
Fix terminal instruction detection in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
312
diff
changeset
|
2367 //dprintf("z80_get_native_address: %X NULL\n", address); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2368 return NULL; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2369 } |
313
a13329645ea3
Fix terminal instruction detection in disassembler
Mike Pavone <pavone@retrodev.com>
parents:
312
diff
changeset
|
2370 //dprintf("z80_get_native_address: %X %p\n", address, map->base + map->offsets[address]); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
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213
diff
changeset
|
2371 return map->base + map->offsets[address]; |
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
2372 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2373 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2374 uint8_t z80_get_native_inst_size(z80_options * opts, uint32_t address) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
2375 { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2376 //TODO: Fix for addresses >= 0x4000 |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2377 if (address >= 0x4000) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2378 return 0; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2379 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2380 return opts->gen.ram_inst_sizes[0][address & 0x1FFF]; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2381 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2382 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2383 void z80_map_native_address(z80_context * context, uint32_t address, uint8_t * native_address, uint8_t size, uint8_t native_size) |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2384 { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2385 uint32_t orig_address = address; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
2386 native_map_slot *map; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2387 z80_options * opts = context->options; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
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213
diff
changeset
|
2388 if (address < 0x4000) { |
d9bf8e61c33c
Get Z80 core working for simple programs
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213
diff
changeset
|
2389 address &= 0x1FFF; |
d9bf8e61c33c
Get Z80 core working for simple programs
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parents:
213
diff
changeset
|
2390 map = context->static_code_map; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2391 opts->gen.ram_inst_sizes[0][address] = native_size; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2392 context->ram_code_flags[(address & 0x1C00) >> 10] |= 1 << ((address & 0x380) >> 7); |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2393 context->ram_code_flags[((address + size) & 0x1C00) >> 10] |= 1 << (((address + size) & 0x380) >> 7); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2394 } else { |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2395 //HERE |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2396 address -= 0x4000; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2397 map = context->banked_code_map; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2398 if (!map->offsets) { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2399 map->offsets = malloc(sizeof(int32_t) * 0xC000); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2400 memset(map->offsets, 0xFF, sizeof(int32_t) * 0xC000); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2401 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2402 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2403 if (!map->base) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2404 map->base = native_address; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2405 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2406 map->offsets[address] = native_address - map->base; |
253
3b34deba4ca0
Squashing some bugs introduced when I switched the register assignments for z80_write_byte around.
Mike Pavone <pavone@retrodev.com>
parents:
252
diff
changeset
|
2407 for(--size, orig_address++; size; --size, orig_address++) { |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2408 address = orig_address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2409 if (address < 0x4000) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2410 address &= 0x1FFF; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2411 map = context->static_code_map; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2412 } else { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2413 address -= 0x4000; |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2414 map = context->banked_code_map; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2415 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2416 if (!map->offsets) { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2417 map->offsets = malloc(sizeof(int32_t) * 0xC000); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2418 memset(map->offsets, 0xFF, sizeof(int32_t) * 0xC000); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2419 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2420 map->offsets[address] = EXTENSION_WORD; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2421 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2422 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2423 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2424 #define INVALID_INSTRUCTION_START 0xFEEDFEED |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2425 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2426 uint32_t z80_get_instruction_start(native_map_slot * static_code_map, uint32_t address) |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2427 { |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2428 //TODO: Fixme for address >= 0x4000 |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2429 if (!static_code_map->base || address >= 0x4000) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2430 return INVALID_INSTRUCTION_START; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2431 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2432 address &= 0x1FFF; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2433 if (static_code_map->offsets[address] == INVALID_OFFSET) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2434 return INVALID_INSTRUCTION_START; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2435 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2436 while (static_code_map->offsets[address] == EXTENSION_WORD) { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2437 --address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2438 address &= 0x1FFF; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2439 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2440 return address; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2441 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2442 |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2443 z80_context * z80_handle_code_write(uint32_t address, z80_context * context) |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2444 { |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2445 uint32_t inst_start = z80_get_instruction_start(context->static_code_map, address); |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2446 if (inst_start != INVALID_INSTRUCTION_START) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2447 code_ptr dst = z80_get_native_address(context, inst_start); |
899
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2448 code_info code = {dst, dst+32, 0}; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2449 z80_options * opts = context->options; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2450 dprintf("patching code at %p for Z80 instruction at %X due to write to %X\n", code.cur, inst_start, address); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2451 mov_ir(&code, inst_start, opts->gen.scratch1, SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2452 call(&code, opts->retrans_stub); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2453 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2454 return context; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2455 } |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2456 |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2457 uint8_t * z80_get_native_address_trans(z80_context * context, uint32_t address) |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2458 { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2459 uint8_t * addr = z80_get_native_address(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2460 if (!addr) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2461 translate_z80_stream(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2462 addr = z80_get_native_address(context, address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2463 if (!addr) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2464 printf("Failed to translate %X to native code\n", address); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2465 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2466 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2467 return addr; |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2468 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2469 |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2470 void z80_handle_deferred(z80_context * context) |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2471 { |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2472 z80_options * opts = context->options; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2473 process_deferred(&opts->gen.deferred, context, (native_addr_func)z80_get_native_address); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2474 if (opts->gen.deferred) { |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2475 translate_z80_stream(context, opts->gen.deferred->address); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2476 } |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2477 } |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2478 |
559
6b248602ab84
blastem builds and almost works on OS X now
Mike Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2479 extern void * z80_retranslate_inst(uint32_t address, z80_context * context, uint8_t * orig_start) asm("z80_retranslate_inst"); |
390
561fe3ea3fc8
Use a call instruction to figure out the original native address when retranslating so that it does not get lost when the byte transforms from a instruction word to extension word
Mike Pavone <pavone@retrodev.com>
parents:
389
diff
changeset
|
2480 void * z80_retranslate_inst(uint32_t address, z80_context * context, uint8_t * orig_start) |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2481 { |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2482 char disbuf[80]; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2483 z80_options * opts = context->options; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2484 uint8_t orig_size = z80_get_native_inst_size(opts, address); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2485 code_info *code = &opts->gen.code; |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2486 uint8_t *after, *inst = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2487 z80inst instbuf; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2488 dprintf("Retranslating code at Z80 address %X, native address %p\n", address, orig_start); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2489 after = z80_decode(inst, &instbuf); |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2490 #ifdef DO_DEBUG_PRINT |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2491 z80_disasm(&instbuf, disbuf, address); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2492 if (instbuf.op == Z80_NOP) { |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2493 printf("%X\t%s(%d)\n", address, disbuf, instbuf.immed); |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2494 } else { |
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2495 printf("%X\t%s\n", address, disbuf); |
267
1788e3f29c28
Don't mix *H regs with the REX prefix
Mike Pavone <pavone@retrodev.com>
parents:
266
diff
changeset
|
2496 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2497 #endif |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2498 if (orig_size != ZMAX_NATIVE_SIZE) { |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2499 check_alloc_code(code, ZMAX_NATIVE_SIZE); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2500 code_ptr start = code->cur; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2501 deferred_addr * orig_deferred = opts->gen.deferred; |
652 | 2502 translate_z80inst(&instbuf, context, address, 0); |
644
2d7e84ae818c
Temporarily comment out code to translate Z80 instructions in place as in rare cases it can stomp the next instruction if a branch goes from a short from to a long one
Michael Pavone <pavone@retrodev.com>
parents:
628
diff
changeset
|
2503 /* |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2504 if ((native_end - dst) <= orig_size) { |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2505 uint8_t * native_next = z80_get_native_address(context, address + after-inst); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2506 if (native_next && ((native_next == orig_start + orig_size) || (orig_size - (native_end - dst)) > 5)) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2507 remove_deferred_until(&opts->gen.deferred, orig_deferred); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2508 native_end = translate_z80inst(&instbuf, orig_start, context, address, 0); |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2509 if (native_next == orig_start + orig_size && (native_next-native_end) < 2) { |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2510 while (native_end < orig_start + orig_size) { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2511 *(native_end++) = 0x90; //NOP |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2512 } |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2513 } else { |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2514 jmp(native_end, native_next); |
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2515 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2516 z80_handle_deferred(context); |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2517 return orig_start; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2518 } |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2519 }*/ |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2520 z80_map_native_address(context, address, start, after-inst, ZMAX_NATIVE_SIZE); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2521 code_info tmp_code = {orig_start, orig_start + 16}; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2522 jmp(&tmp_code, start); |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2523 tmp_code = *code; |
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2524 code->cur = start + ZMAX_NATIVE_SIZE; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2525 if (!z80_is_terminal(&instbuf)) { |
597
8d6ae5b3b87b
Update code->cur before calling z80_get_address_trans in z80_retranslate_inst to avoid any newly translated instructions from being placed in the "buffer zone". Save the current value of the code_info struct for placing the final jmp instruction in the correct place
Michael Pavone <pavone@retrodev.com>
parents:
594
diff
changeset
|
2526 jmp(&tmp_code, z80_get_native_address_trans(context, address + after-inst)); |
264
8fd6652e56f8
Fix a crash bug in instruction retranslation
Mike Pavone <pavone@retrodev.com>
parents:
262
diff
changeset
|
2527 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2528 z80_handle_deferred(context); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2529 return start; |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2530 } else { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2531 code_info tmp_code = *code; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2532 code->cur = orig_start; |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2533 code->last = orig_start + ZMAX_NATIVE_SIZE; |
652 | 2534 translate_z80inst(&instbuf, context, address, 0); |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2535 code_info tmp2 = *code; |
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2536 *code = tmp_code; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2537 if (!z80_is_terminal(&instbuf)) { |
652 | 2538 |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2539 jmp(&tmp2, z80_get_native_address_trans(context, address + after-inst)); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2540 } |
266
376df762ddf5
Fix some more retranslation bugs in the Z80 core
Mike Pavone <pavone@retrodev.com>
parents:
264
diff
changeset
|
2541 z80_handle_deferred(context); |
252
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2542 return orig_start; |
63b9a500a00b
Implement retranslating code when written to. Possibly broken, need to fix some other bugs before a proper test.
Mike Pavone <pavone@retrodev.com>
parents:
250
diff
changeset
|
2543 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2544 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2545 |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2546 void translate_z80_stream(z80_context * context, uint32_t address) |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2547 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2548 char disbuf[80]; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2549 if (z80_get_native_address(context, address)) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2550 return; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2551 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2552 z80_options * opts = context->options; |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
2553 uint32_t start_address = address; |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2554 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2555 do |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2556 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2557 z80inst inst; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2558 dprintf("translating Z80 code at address %X\n", address); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2559 do { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2560 uint8_t * existing = z80_get_native_address(context, address); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2561 if (existing) { |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2562 jmp(&opts->gen.code, existing); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2563 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2564 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2565 uint8_t * encoded, *next; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2566 encoded = get_native_pointer(address, (void **)context->mem_pointers, &opts->gen); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2567 if (!encoded) { |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2568 code_info stub = z80_make_interp_stub(context, address); |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2569 z80_map_native_address(context, address, stub.cur, 1, stub.last - stub.cur); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2570 break; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2571 } |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2572 //make sure prologue is in a contiguous chunk of code |
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
Michael Pavone <pavone@retrodev.com>
parents:
598
diff
changeset
|
2573 check_code_prologue(&opts->gen.code); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2574 next = z80_decode(encoded, &inst); |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2575 #ifdef DO_DEBUG_PRINT |
314
54c0e5f22198
Show absolute addresses for JR, JRCC and DJNZ in Z80 disassembler
Mike Pavone <pavone@retrodev.com>
parents:
313
diff
changeset
|
2576 z80_disasm(&inst, disbuf, address); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2577 if (inst.op == Z80_NOP) { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2578 printf("%X\t%s(%d)\n", address, disbuf, inst.immed); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2579 } else { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2580 printf("%X\t%s\n", address, disbuf); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2581 } |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2582 #endif |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2583 code_ptr start = opts->gen.code.cur; |
652 | 2584 translate_z80inst(&inst, context, address, 0); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2585 z80_map_native_address(context, address, start, next-encoded, opts->gen.code.cur - start); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2586 address += next-encoded; |
255
572b935dd030
Properly handle wrapping around to 0 in translate_z80_stream
Mike Pavone <pavone@retrodev.com>
parents:
254
diff
changeset
|
2587 address &= 0xFFFF; |
283
61f5d88ea01a
Implement RETI and RETN (untested). Cleanup tests for "terminal" instructions.
Mike Pavone <pavone@retrodev.com>
parents:
282
diff
changeset
|
2588 } while (!z80_is_terminal(&inst)); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2589 process_deferred(&opts->gen.deferred, context, (native_addr_func)z80_get_native_address); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2590 if (opts->gen.deferred) { |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2591 address = opts->gen.deferred->address; |
268
6c2d7e003a55
Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset
Mike Pavone <pavone@retrodev.com>
parents:
267
diff
changeset
|
2592 dprintf("defferred address: %X\n", address); |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
2593 } |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2594 } while (opts->gen.deferred); |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2595 } |
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2596 |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2597 void init_z80_opts(z80_options * options, memmap_chunk const * chunks, uint32_t num_chunks, memmap_chunk const * io_chunks, uint32_t num_io_chunks, uint32_t clock_divider) |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2598 { |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2599 memset(options, 0, sizeof(*options)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2600 |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2601 options->gen.memmap = chunks; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
652
diff
changeset
|
2602 options->gen.memmap_chunks = num_chunks; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2603 options->gen.address_size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2604 options->gen.address_mask = 0xFFFF; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2605 options->gen.max_address = 0x10000; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2606 options->gen.bus_cycles = 3; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2607 options->gen.clock_divider = clock_divider; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2608 options->gen.mem_ptr_off = offsetof(z80_context, mem_pointers); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2609 options->gen.ram_flags_off = offsetof(z80_context, ram_code_flags); |
620
9d6fed6501ba
Fix handling of code writes for Z80 core. This seems to get things close to being back to where they were before the big refactor that broke the Z80 core. Some problems remain. Notably the sound driver in Sonic 2 is still quite broken.
Michael Pavone <pavone@retrodev.com>
parents:
601
diff
changeset
|
2610 options->gen.ram_flags_shift = 7; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2611 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2612 options->flags = 0; |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2613 #ifdef X86_64 |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2614 options->regs[Z80_B] = BH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2615 options->regs[Z80_C] = RBX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2616 options->regs[Z80_D] = CH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2617 options->regs[Z80_E] = RCX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2618 options->regs[Z80_H] = AH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2619 options->regs[Z80_L] = RAX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2620 options->regs[Z80_IXH] = DH; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2621 options->regs[Z80_IXL] = RDX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2622 options->regs[Z80_IYH] = -1; |
239
a5bea9711a46
Implement BIT and DJNZ (tested). Fix register mapping for IYL.
Mike Pavone <pavone@retrodev.com>
parents:
238
diff
changeset
|
2623 options->regs[Z80_IYL] = R8; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2624 options->regs[Z80_I] = -1; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2625 options->regs[Z80_R] = -1; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2626 options->regs[Z80_A] = R10; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2627 options->regs[Z80_BC] = RBX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2628 options->regs[Z80_DE] = RCX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2629 options->regs[Z80_HL] = RAX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2630 options->regs[Z80_SP] = R9; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2631 options->regs[Z80_AF] = -1; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2632 options->regs[Z80_IX] = RDX; |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2633 options->regs[Z80_IY] = R8; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2634 |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2635 options->gen.scratch1 = R13; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2636 options->gen.scratch2 = R14; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2637 #else |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2638 memset(options->regs, -1, sizeof(options->regs)); |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2639 options->regs[Z80_A] = RAX; |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2640 options->regs[Z80_SP] = RBX; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2641 |
666
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2642 options->gen.scratch1 = RCX; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2643 options->gen.scratch2 = RDX; |
b68039895627
In theory, the Z80 core should work on 32-bit builds now; however, I suspect there is some code that cannot deal with most of the Z80 registers not having a native register so more work will be needed
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2644 #endif |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
666
diff
changeset
|
2645 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2646 options->gen.context_reg = RSI; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2647 options->gen.cycles = RBP; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2648 options->gen.limit = RDI; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2649 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2650 options->gen.native_code_map = malloc(sizeof(native_map_slot)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2651 memset(options->gen.native_code_map, 0, sizeof(native_map_slot)); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2652 options->gen.deferred = NULL; |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2653 options->gen.ram_inst_sizes = malloc(sizeof(uint8_t) * 0x2000 + sizeof(uint8_t *)); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2654 options->gen.ram_inst_sizes[0] = (uint8_t *)(options->gen.ram_inst_sizes + 1); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2655 memset(options->gen.ram_inst_sizes[0], 0, sizeof(uint8_t) * 0x2000); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2656 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2657 code_info *code = &options->gen.code; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2658 init_code_info(code); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2659 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2660 options->save_context_scratch = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2661 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, scratch1), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2662 mov_rrdisp(code, options->gen.scratch2, options->gen.context_reg, offsetof(z80_context, scratch2), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2663 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2664 options->gen.save_context = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2665 for (int i = 0; i <= Z80_A; i++) |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2666 { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2667 int reg; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2668 uint8_t size; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2669 if (i < Z80_I) { |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2670 reg = i /2 + Z80_BC + (i > Z80_H ? 2 : 0); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2671 size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2672 } else { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2673 reg = i; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2674 size = SZ_B; |
652 | 2675 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2676 if (options->regs[reg] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2677 mov_rrdisp(code, options->regs[reg], options->gen.context_reg, offsetof(z80_context, regs) + i, size); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2678 } |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2679 if (size == SZ_W) { |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2680 i++; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2681 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2682 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2683 if (options->regs[Z80_SP] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2684 mov_rrdisp(code, options->regs[Z80_SP], options->gen.context_reg, offsetof(z80_context, sp), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2685 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2686 mov_rrdisp(code, options->gen.limit, options->gen.context_reg, offsetof(z80_context, target_cycle), SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2687 mov_rrdisp(code, options->gen.cycles, options->gen.context_reg, offsetof(z80_context, current_cycle), SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2688 retn(code); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2689 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2690 options->load_context_scratch = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2691 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch1), options->gen.scratch1, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2692 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch2), options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2693 options->gen.load_context = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2694 for (int i = 0; i <= Z80_A; i++) |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2695 { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2696 int reg; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2697 uint8_t size; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2698 if (i < Z80_I) { |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2699 reg = i /2 + Z80_BC + (i > Z80_H ? 2 : 0); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2700 size = SZ_W; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2701 } else { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2702 reg = i; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2703 size = SZ_B; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2704 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2705 if (options->regs[reg] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2706 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, regs) + i, options->regs[reg], size); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2707 } |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2708 if (size == SZ_W) { |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2709 i++; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2710 } |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2711 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2712 if (options->regs[Z80_SP] >= 0) { |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2713 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, sp), options->regs[Z80_SP], SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2714 } |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2715 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, target_cycle), options->gen.limit, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2716 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, current_cycle), options->gen.cycles, SZ_D); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2717 retn(code); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2718 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2719 options->native_addr = code->cur; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2720 call(code, options->gen.save_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2721 push_r(code, options->gen.context_reg); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2722 movzx_rr(code, options->gen.scratch1, options->gen.scratch1, SZ_W, SZ_D); |
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2723 call_args(code, (code_ptr)z80_get_native_address_trans, 2, options->gen.context_reg, options->gen.scratch1); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2724 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2725 pop_r(code, options->gen.context_reg); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2726 call(code, options->gen.load_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2727 retn(code); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2728 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2729 uint32_t tmp_stack_off; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2730 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2731 options->gen.handle_cycle_limit = code->cur; |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2732 //calculate call/stack adjust size |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2733 sub_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2734 call_noalign(code, options->gen.handle_cycle_limit); |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2735 uint32_t call_adjust_size = code->cur - options->gen.handle_cycle_limit; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2736 code->cur = options->gen.handle_cycle_limit; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2737 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2738 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2739 code_ptr no_sync = code->cur+1; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2740 jcc(code, CC_B, no_sync); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2741 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, pc), SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2742 call(code, options->save_context_scratch); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2743 tmp_stack_off = code->stack_off; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2744 pop_r(code, RAX); //return address in read/write func |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2745 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2746 pop_r(code, RBX); //return address in translated code |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2747 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2748 sub_ir(code, call_adjust_size, RAX, SZ_PTR); //adjust return address to point to the call + stack adjust that got us here |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2749 mov_rrdisp(code, RBX, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2750 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2751 restore_callee_save_regs(code); |
598
faad1927d836
Fix an off-by-one error in a branch destination in the generation of handle_cycle_limit for the Z80
Michael Pavone <pavone@retrodev.com>
parents:
597
diff
changeset
|
2752 *no_sync = code->cur - (no_sync + 1); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2753 //return to caller of z80_run |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2754 retn(code); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2755 code->stack_off = tmp_stack_off; |
652 | 2756 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2757 options->gen.handle_code_write = (code_ptr)z80_handle_code_write; |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2758 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2759 options->read_8 = gen_mem_fun(&options->gen, chunks, num_chunks, READ_8, &options->read_8_noinc); |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2760 options->write_8 = gen_mem_fun(&options->gen, chunks, num_chunks, WRITE_8, &options->write_8_noinc); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2761 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2762 code_ptr skip_int = code->cur; |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2763 //calculate adjust size |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2764 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2765 uint32_t adjust_size = code->cur - skip_int; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2766 code->cur = skip_int; |
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2767 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2768 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.cycles, SZ_D); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2769 code_ptr skip_sync = code->cur + 1; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2770 jcc(code, CC_B, skip_sync); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2771 //save PC |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2772 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, pc), SZ_D); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2773 options->do_sync = code->cur; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2774 call(code, options->gen.save_context); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2775 tmp_stack_off = code->stack_off; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2776 //pop return address off the stack and save for resume later |
898
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2777 //pop_rind(code, options->gen.context_reg); |
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2778 pop_r(code, RAX); |
900
30efd12b1be1
Replace some hard-coded instruction length assumptions with a calculation so they will work properly on both 32-bit and 64-bit hosts
Michael Pavone <pavone@retrodev.com>
parents:
899
diff
changeset
|
2779 add_ir(code, adjust_size, RAX, SZ_PTR); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2780 add_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
898
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2781 mov_rrind(code, RAX, options->gen.context_reg, SZ_PTR); |
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2782 |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2783 //restore callee saved registers |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2784 restore_callee_save_regs(code); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2785 //return to caller of z80_run |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2786 *skip_sync = code->cur - (skip_sync+1); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2787 retn(code); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2788 code->stack_off = tmp_stack_off; |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2789 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2790 options->gen.handle_cycle_limit_int = code->cur; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2791 cmp_rdispr(code, options->gen.context_reg, offsetof(z80_context, int_cycle), options->gen.cycles, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2792 jcc(code, CC_B, skip_int); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2793 //set limit to the cycle limit |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2794 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, sync_cycle), options->gen.limit, SZ_D); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2795 //disable interrupts |
591
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2796 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, iff1), SZ_B); |
966b46c68942
Get Z80 core back into compileable state
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2797 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, iff2), SZ_B); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2798 cycles(&options->gen, 7); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2799 //save return address (in scratch1) to Z80 stack |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2800 sub_ir(code, 2, options->regs[Z80_SP], SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2801 mov_rr(code, options->regs[Z80_SP], options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2802 //we need to do check_cycles and cycles outside of the write_8 call |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2803 //so that the stack has the correct depth if we need to return to C |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2804 //for a synchronization |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2805 check_cycles(&options->gen); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2806 cycles(&options->gen, 3); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2807 //save word to write before call to write_8_noinc |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2808 push_r(code, options->gen.scratch1); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2809 call(code, options->write_8_noinc); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2810 //restore word to write |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2811 pop_r(code, options->gen.scratch1); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2812 //write high byte to SP+1 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2813 mov_rr(code, options->regs[Z80_SP], options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2814 add_ir(code, 1, options->gen.scratch2, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2815 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2816 check_cycles(&options->gen); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2817 cycles(&options->gen, 3); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2818 call(code, options->write_8_noinc); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2819 //dispose of return address as we'll be jumping somewhere else |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2820 add_ir(code, 16, RSP, SZ_PTR); |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2821 //TODO: Support interrupt mode 0 and 2 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2822 mov_ir(code, 0x38, options->gen.scratch1, SZ_W); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2823 call(code, options->native_addr); |
663
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
2824 mov_rrind(code, options->gen.scratch1, options->gen.context_reg, SZ_PTR); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2825 tmp_stack_off = code->stack_off; |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2826 restore_callee_save_regs(code); |
663
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
2827 //return to caller of z80_run to sync |
7a5461001242
Sync Z80 when taking an interrupt so that int_cycle gets updated
Michael Pavone <pavone@retrodev.com>
parents:
662
diff
changeset
|
2828 retn(code); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2829 code->stack_off = tmp_stack_off; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2830 |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2831 //HACK |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2832 options->gen.address_size = SZ_D; |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2833 options->gen.address_mask = 0xFF; |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2834 options->read_io = gen_mem_fun(&options->gen, io_chunks, num_io_chunks, READ_8, NULL); |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2835 options->write_io = gen_mem_fun(&options->gen, io_chunks, num_io_chunks, WRITE_8, NULL); |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2836 options->gen.address_size = SZ_W; |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
2837 options->gen.address_mask = 0xFFFF; |
652 | 2838 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2839 options->read_16 = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2840 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2841 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2842 //TODO: figure out how to handle the extra wait state for word reads to bank area |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2843 //may also need special handling to avoid too much stack depth when access is blocked |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2844 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2845 call(code, options->read_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2846 mov_rr(code, options->gen.scratch1, options->gen.scratch2, SZ_B); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2847 #ifndef X86_64 |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2848 //scratch 2 is a caller save register in 32-bit builds and may be clobbered by something called from the read8 fun |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2849 mov_rrdisp(code, options->gen.scratch1, options->gen.context_reg, offsetof(z80_context, scratch2), SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2850 #endif |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2851 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2852 add_ir(code, 1, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2853 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2854 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2855 call(code, options->read_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2856 shl_ir(code, 8, options->gen.scratch1, SZ_W); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2857 #ifdef X86_64 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2858 mov_rr(code, options->gen.scratch2, options->gen.scratch1, SZ_B); |
735
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2859 #else |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2860 mov_rdispr(code, options->gen.context_reg, offsetof(z80_context, scratch2), options->gen.scratch1, SZ_B); |
539d12fa6a4d
Add a define in both the source and Makefile for enabling logging of z80 instruction address/cycle counts. Fix Z80 in/out instructions to eliminate assumptions about which registers are stored in native regs. Fix read_16 to not corrupt the low byte when the read has to call into a C function.
Michael Pavone <pavone@retrodev.com>
parents:
734
diff
changeset
|
2861 #endif |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2862 retn(code); |
652 | 2863 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2864 options->write_16_highfirst = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2865 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2866 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2867 push_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2868 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2869 add_ir(code, 1, options->gen.scratch2, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2870 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2871 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2872 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2873 pop_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2874 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2875 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2876 //TODO: Check if we can get away with TCO here |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2877 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2878 retn(code); |
652 | 2879 |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2880 options->write_16_lowfirst = code->cur; |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2881 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2882 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2883 push_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2884 push_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2885 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2886 pop_r(code, options->gen.scratch1); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2887 pop_r(code, options->gen.scratch2); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2888 add_ir(code, 1, options->gen.scratch2, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2889 shr_ir(code, 8, options->gen.scratch1, SZ_W); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2890 cycles(&options->gen, 3); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2891 check_cycles(&options->gen); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2892 //TODO: Check if we can get away with TCO here |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2893 call(code, options->write_8_noinc); |
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2894 retn(code); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2895 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2896 options->retrans_stub = code->cur; |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2897 tmp_stack_off = code->stack_off; |
899
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2898 //calculate size of patch |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2899 mov_ir(code, 0x7FFF, options->gen.scratch1, SZ_D); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2900 code->stack_off += sizeof(void *); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2901 if (code->stack_off & 0xF) { |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2902 sub_ir(code, 16 - (code->stack_off & 0xF), RSP, SZ_PTR); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2903 } |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2904 call_noalign(code, options->retrans_stub); |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2905 uint32_t patch_size = code->cur - options->retrans_stub; |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2906 code->cur = options->retrans_stub; |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2907 code->stack_off = tmp_stack_off; |
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2908 |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2909 //pop return address |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2910 pop_r(code, options->gen.scratch2); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2911 add_ir(code, 16-sizeof(void*), RSP, SZ_PTR); |
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2912 code->stack_off = tmp_stack_off; |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2913 call(code, options->gen.save_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2914 //adjust pointer before move and call instructions that got us here |
899
07bfbbbb4b2e
Fix for Z80 retranslation post alignment rework
Michael Pavone <pavone@retrodev.com>
parents:
898
diff
changeset
|
2915 sub_ir(code, patch_size, options->gen.scratch2, SZ_PTR); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2916 push_r(code, options->gen.context_reg); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2917 call_args(code, (code_ptr)z80_retranslate_inst, 3, options->gen.scratch1, options->gen.context_reg, options->gen.scratch2); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2918 pop_r(code, options->gen.context_reg); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2919 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2920 call(code, options->gen.load_context); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2921 jmp_r(code, options->gen.scratch1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2922 |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2923 options->run = (z80_run_fun)code->cur; |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2924 tmp_stack_off = code->stack_off; |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
664
diff
changeset
|
2925 save_callee_save_regs(code); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2926 #ifdef X86_64 |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2927 mov_rr(code, RDI, options->gen.context_reg, SZ_PTR); |
729
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2928 #else |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2929 mov_rdispr(code, RSP, 5 * sizeof(int32_t), options->gen.context_reg, SZ_PTR); |
9ef6db986982
Fix a bunch of assumptions about which Z80 registers are stored in native registers to make the x86-32 build less broken
Michael Pavone <pavone@retrodev.com>
parents:
716
diff
changeset
|
2930 #endif |
594
086de8692932
Add in missing generated Z80 helper functions. Fix a small bug in Z80_HALT. Fix generation of save and load context for Z80
Michael Pavone <pavone@retrodev.com>
parents:
593
diff
changeset
|
2931 call(code, options->load_context_scratch); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2932 cmp_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2933 code_ptr no_extra = code->cur+1; |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2934 jcc(code, CC_Z, no_extra); |
898
2f1157f00dc6
Z80 core is now slightly less broken
Michael Pavone <pavone@retrodev.com>
parents:
895
diff
changeset
|
2935 sub_ir(code, 16-sizeof(void *), RSP, SZ_PTR); |
593
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2936 push_rdisp(code, options->gen.context_reg, offsetof(z80_context, extra_pc)); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2937 mov_irdisp(code, 0, options->gen.context_reg, offsetof(z80_context, extra_pc), SZ_PTR); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2938 *no_extra = code->cur - (no_extra + 1); |
5ef3fe516da9
Z80 core is sort of working again
Michael Pavone <pavone@retrodev.com>
parents:
592
diff
changeset
|
2939 jmp_rind(code, options->gen.context_reg); |
895
13388ab6d78a
Get Z80 core sort of working again post alignment change
Michael Pavone <pavone@retrodev.com>
parents:
894
diff
changeset
|
2940 code->stack_off = tmp_stack_off; |
213
4d4559b04c59
Make reset trigger debug exit to make it easier to test the same cases in blastem and musashi. Fix asl #1 overflow flag.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2941 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2942 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
506
diff
changeset
|
2943 void init_z80_context(z80_context * context, z80_options * options) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2944 { |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2945 memset(context, 0, sizeof(*context)); |
360
c42fae88d346
Fix sizeof expression passed to malloc in z80_init to avoid a minor memory error
Mike Pavone <pavone@retrodev.com>
parents:
335
diff
changeset
|
2946 context->static_code_map = malloc(sizeof(*context->static_code_map)); |
259
d9417261366f
Fix a remaining z80_write reg swap bug. Properly initialize the native map slots. Reset appropriate regs when z80_reset is called.
Mike Pavone <pavone@retrodev.com>
parents:
257
diff
changeset
|
2947 context->static_code_map->base = NULL; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2948 context->static_code_map->offsets = malloc(sizeof(int32_t) * 0x2000); |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2949 memset(context->static_code_map->offsets, 0xFF, sizeof(int32_t) * 0x2000); |
627
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2950 context->banked_code_map = malloc(sizeof(native_map_slot)); |
c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
Michael Pavone <pavone@retrodev.com>
parents:
626
diff
changeset
|
2951 memset(context->banked_code_map, 0, sizeof(native_map_slot)); |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
2952 context->options = options; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2953 context->int_cycle = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2954 context->int_pulse_start = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2955 context->int_pulse_end = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2956 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2957 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2958 void z80_run(z80_context * context, uint32_t target_cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2959 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2960 if (context->reset || context->busack) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2961 context->current_cycle = target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2962 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2963 if (context->current_cycle < target_cycle) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2964 //busreq is sampled at the end of an m-cycle |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2965 //we can approximate that by running for a single m-cycle after a bus request |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2966 context->sync_cycle = context->busreq ? context->current_cycle + 3*context->options->gen.clock_divider : target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2967 if (!context->native_pc) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2968 context->native_pc = z80_get_native_address_trans(context, context->pc); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2969 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2970 while (context->current_cycle < context->sync_cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2971 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2972 if (context->int_pulse_end < context->current_cycle || context->int_pulse_end == CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2973 z80_next_int_pulse(context); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2974 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2975 if (context->iff1) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2976 context->int_cycle = context->int_pulse_start < context->int_enable_cycle ? context->int_enable_cycle : context->int_pulse_start; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2977 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2978 context->int_cycle = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2979 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2980 context->target_cycle = context->sync_cycle < context->int_cycle ? context->sync_cycle : context->int_cycle; |
670
f4f3e74b0ce6
Restore Z80 interrupt pulse duration and make a small improvement to debug print output
Michael Pavone <pavone@retrodev.com>
parents:
668
diff
changeset
|
2981 dprintf("Running Z80 from cycle %d to cycle %d. Int cycle: %d (%d - %d)\n", context->current_cycle, context->sync_cycle, context->int_cycle, context->int_pulse_start, context->int_pulse_end); |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2982 context->options->run(context); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2983 dprintf("Z80 ran to cycle %d\n", context->current_cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2984 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2985 if (context->busreq) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2986 context->busack = 1; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2987 context->current_cycle = target_cycle; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2988 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2989 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2990 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2991 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
2992 |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
2993 void z80_options_free(z80_options *opts) |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
2994 { |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
2995 free(opts->gen.native_code_map); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
2996 free(opts->gen.ram_inst_sizes); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
2997 free(opts); |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
2998 } |
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
854
diff
changeset
|
2999 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3000 void z80_assert_reset(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3001 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3002 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3003 context->reset = 1; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3004 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3005 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3006 void z80_clear_reset(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3007 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3008 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3009 if (context->reset) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3010 //TODO: Handle case where reset is not asserted long enough |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3011 context->im = 0; |
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3012 context->iff1 = context->iff2 = 0; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3013 context->native_pc = NULL; |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3014 context->extra_pc = NULL; |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3015 context->pc = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3016 context->reset = 0; |
676
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3017 if (context->busreq) { |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3018 //TODO: Figure out appropriate delay |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3019 context->busack = 1; |
41a399c11ef1
When going directly from reset to busreq, do not allow the Z80 to run
Michael Pavone <pavone@retrodev.com>
parents:
670
diff
changeset
|
3020 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3021 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3022 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3023 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3024 void z80_assert_busreq(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3025 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3026 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3027 context->busreq = 1; |
854
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3028 //this is an imperfect aproximation since most M-cycles take less tstates than the max |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3029 //and a short 3-tstate m-cycle can take an unbounded number due to wait states |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3030 if (context->current_cycle - cycle > MAX_MCYCLE_LENGTH * context->options->gen.clock_divider) { |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3031 context->busack = 1; |
adeb6465ad53
Improve timing of Z80 busack. Fixes a crash in Barkley: Shut Up and Jam. Also vastly improves the audio output of Stuck Somewhere in Time
Michael Pavone <pavone@retrodev.com>
parents:
844
diff
changeset
|
3032 } |
701
200ee73c7210
Remove/comment verbose logging added for tracking down sync bug
Michael Pavone <pavone@retrodev.com>
parents:
697
diff
changeset
|
3033 } |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3034 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3035 void z80_clear_busreq(z80_context * context, uint32_t cycle) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3036 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3037 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3038 context->busreq = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3039 context->busack = 0; |
844
74e161fe7d39
Small tweaks to timing of 68K/Z80 interactions based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
842
diff
changeset
|
3040 //there appears to be at least a 1 Z80 cycle delay between busreq |
74e161fe7d39
Small tweaks to timing of 68K/Z80 interactions based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
842
diff
changeset
|
3041 //being released and resumption of execution |
74e161fe7d39
Small tweaks to timing of 68K/Z80 interactions based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
842
diff
changeset
|
3042 context->current_cycle += context->options->gen.clock_divider; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3043 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3044 |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3045 uint8_t z80_get_busack(z80_context * context, uint32_t cycle) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3046 { |
668
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3047 z80_run(context, cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3048 return context->busack; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3049 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3050 |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3051 void z80_adjust_cycles(z80_context * context, uint32_t deduction) |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3052 { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3053 if (context->current_cycle < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3054 fprintf(stderr, "WARNING: Deduction of %u cycles when Z80 cycle counter is only %u\n", deduction, context->current_cycle); |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3055 context->current_cycle = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3056 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3057 context->current_cycle -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3058 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3059 if (context->int_enable_cycle != CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3060 if (context->int_enable_cycle < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3061 context->int_enable_cycle = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3062 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3063 context->int_enable_cycle -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3064 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3065 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3066 if (context->int_pulse_start != CYCLE_NEVER) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3067 if (context->int_pulse_end < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3068 context->int_pulse_start = context->int_pulse_end = CYCLE_NEVER; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3069 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3070 context->int_pulse_end -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3071 if (context->int_pulse_start < deduction) { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3072 context->int_pulse_start = 0; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3073 } else { |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3074 context->int_pulse_start -= deduction; |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3075 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3076 } |
5439ae7946ca
Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c
Michael Pavone <pavone@retrodev.com>
parents:
667
diff
changeset
|
3077 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3078 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3079 |
652 | 3080 uint32_t zbreakpoint_patch(z80_context * context, uint16_t address, code_ptr dst) |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3081 { |
966
f765c2fc7508
Fix crash bug in Z80 debugger introduced with stack alignment changes
Michael Pavone <pavone@retrodev.com>
parents:
900
diff
changeset
|
3082 code_info code = {dst, dst+32}; |
659
759c38bf97f8
Minor Z80 core cleanup
Michael Pavone <pavone@retrodev.com>
parents:
657
diff
changeset
|
3083 mov_ir(&code, address, context->options->gen.scratch1, SZ_W); |
652 | 3084 call(&code, context->bp_stub); |
3085 return code.cur-dst; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3086 } |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3087 |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3088 void zcreate_stub(z80_context * context) |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3089 { |
652 | 3090 z80_options * opts = context->options; |
3091 code_info *code = &opts->gen.code; | |
894
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
3092 uint32_t start_stack_off = code->stack_off; |
652 | 3093 check_code_prologue(code); |
3094 context->bp_stub = code->cur; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3095 |
682 | 3096 //Calculate length of prologue |
652 | 3097 check_cycles_int(&opts->gen, 0); |
3098 int check_int_size = code->cur-context->bp_stub; | |
3099 code->cur = context->bp_stub; | |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3100 |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3101 //Calculate length of patch |
652 | 3102 int patch_size = zbreakpoint_patch(context, 0, code->cur); |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3103 |
682 | 3104 //Save context and call breakpoint handler |
652 | 3105 call(code, opts->gen.save_context); |
3106 push_r(code, opts->gen.scratch1); | |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
3107 call_args_abi(code, context->bp_handler, 2, opts->gen.context_reg, opts->gen.scratch1); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
3108 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR); |
682 | 3109 //Restore context |
652 | 3110 call(code, opts->gen.load_context); |
3111 pop_r(code, opts->gen.scratch1); | |
682 | 3112 //do prologue stuff |
652 | 3113 cmp_rr(code, opts->gen.cycles, opts->gen.limit, SZ_D); |
3114 uint8_t * jmp_off = code->cur+1; | |
3115 jcc(code, CC_NC, code->cur + 7); | |
3116 pop_r(code, opts->gen.scratch1); | |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
3117 add_ir(code, check_int_size - patch_size, opts->gen.scratch1, SZ_PTR); |
652 | 3118 push_r(code, opts->gen.scratch1); |
3119 jmp(code, opts->gen.handle_cycle_limit_int); | |
3120 *jmp_off = code->cur - (jmp_off+1); | |
682 | 3121 //jump back to body of translated instruction |
652 | 3122 pop_r(code, opts->gen.scratch1); |
664
bca748422bf0
Use SZ_PTR instead of SZ_Q in Z80 core for 32-bit compat
Michael Pavone <pavone@retrodev.com>
parents:
663
diff
changeset
|
3123 add_ir(code, check_int_size - patch_size, opts->gen.scratch1, SZ_PTR); |
652 | 3124 jmp_r(code, opts->gen.scratch1); |
894
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
3125 code->stack_off = start_stack_off; |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3126 } |
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3127 |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3128 void zinsert_breakpoint(z80_context * context, uint16_t address, uint8_t * bp_handler) |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3129 { |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3130 context->bp_handler = bp_handler; |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3131 uint8_t bit = 1 << (address % 8); |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3132 if (!(bit & context->breakpoint_flags[address / 8])) { |
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3133 context->breakpoint_flags[address / 8] |= bit; |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3134 if (!context->bp_stub) { |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3135 zcreate_stub(context); |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3136 } |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3137 uint8_t * native = z80_get_native_address(context, address); |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3138 if (native) { |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3139 zbreakpoint_patch(context, address, native); |
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3140 } |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3141 } |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3142 } |
235
d9bf8e61c33c
Get Z80 core working for simple programs
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
3143 |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3144 void zremove_breakpoint(z80_context * context, uint16_t address) |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3145 { |
819
ab017fb09e77
Added support for an IO memory map in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
792
diff
changeset
|
3146 context->breakpoint_flags[address / 8] &= ~(1 << (address % 8)); |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3147 uint8_t * native = z80_get_native_address(context, address); |
626
7c46891a29b1
Properly handle Z80 breakpoints on self-modifying code and setting Z80 breakpoints before the Z80 program has been loaded
Michael Pavone <pavone@retrodev.com>
parents:
625
diff
changeset
|
3148 if (native) { |
652 | 3149 z80_options * opts = context->options; |
3150 code_info tmp_code = opts->gen.code; | |
3151 opts->gen.code.cur = native; | |
3152 opts->gen.code.last = native + 16; | |
3153 check_cycles_int(&opts->gen, address); | |
3154 opts->gen.code = tmp_code; | |
792
724bbec47f86
Use a new fatal_error function instead of calling fprintf and exit for fatal errors. This new function more gracefully handles the case in which BlastEm was not started from a terminal or disconnected from ther terminal (Windows).
Michael Pavone <pavone@retrodev.com>
parents:
755
diff
changeset
|
3155 } |
366
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3156 } |
836585d389b8
Partial implementation of Z80 debugger
Mike Pavone <pavone@retrodev.com>
parents:
363
diff
changeset
|
3157 |