Mercurial > repos > blastem
annotate vdp.c @ 2010:19957e7353a4
Fix a regression in sprite rendering that could cause garbage to be displayed on first line
author | Mike Pavone <pavone@retrodev.com> |
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date | Sun, 01 Nov 2020 12:32:25 -0800 |
parents | 4ace0fef6f8f |
children | dcdad92f84a4 |
rev | line source |
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467
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1 /* |
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2 Copyright 2013 Michael Pavone |
470
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Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
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3 This file is part of BlastEm. |
467
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "vdp.h" |
75 | 7 #include "blastem.h" |
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8 #include <stdlib.h> |
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9 #include <string.h> |
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10 #include "render.h" |
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11 #include "util.h" |
1946 | 12 #include "event_log.h" |
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13 #include "terminal.h" |
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14 |
622
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Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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15 #define NTSC_INACTIVE_START 224 |
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16 #define PAL_INACTIVE_START 240 |
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17 #define MODE4_INACTIVE_START 192 |
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18 #define BUF_BIT_PRIORITY 0x40 |
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19 #define MAP_BIT_PRIORITY 0x8000 |
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20 #define MAP_BIT_H_FLIP 0x800 |
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21 #define MAP_BIT_V_FLIP 0x1000 |
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22 |
436
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23 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1) |
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24 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2) |
39
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Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
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25 |
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26 #define MCLKS_SLOT_H40 16 |
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27 #define MCLKS_SLOT_H32 20 |
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28 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after |
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29 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one |
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30 #define VINT_SLOT_MODE4 4 |
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31 #define HSYNC_SLOT_H40 230 |
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32 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17) |
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33 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results |
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34 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results |
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35 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result |
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36 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results |
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37 #define LINE_CHANGE_H40 165 |
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38 #define LINE_CHANGE_H32 133 |
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39 #define LINE_CHANGE_MODE4 249 |
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40 #define VBLANK_START_H40 (LINE_CHANGE_H40+2) |
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41 #define VBLANK_START_H32 (LINE_CHANGE_H32+2) |
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42 #define FIFO_LATENCY 3 |
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43 |
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44 #define BORDER_TOP_V24 27 |
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45 #define BORDER_TOP_V28 11 |
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46 #define BORDER_TOP_V24_PAL 54 |
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47 #define BORDER_TOP_V28_PAL 38 |
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48 #define BORDER_TOP_V30_PAL 30 |
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49 |
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50 #define BORDER_BOT_V24 24 |
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51 #define BORDER_BOT_V28 8 |
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52 #define BORDER_BOT_V24_PAL 48 |
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53 #define BORDER_BOT_V28_PAL 32 |
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54 #define BORDER_BOT_V30_PAL 24 |
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55 |
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56 enum { |
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57 INACTIVE = 0, |
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58 PREPARING, //used for line 0x1FF |
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59 ACTIVE |
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60 }; |
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61 |
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62 static int32_t color_map[1 << 12]; |
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63 static uint16_t mode4_address_map[0x4000]; |
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64 static uint32_t planar_to_chunky[256]; |
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65 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255}; |
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66 |
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67 static uint8_t debug_base[][3] = { |
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68 {127, 127, 127}, //BG |
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69 {0, 0, 127}, //A |
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70 {127, 0, 0}, //Window |
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71 {0, 127, 0}, //B |
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72 {127, 0, 127} //Sprites |
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73 }; |
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74 |
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75 static uint32_t calc_crop(uint32_t crop, uint32_t border) |
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76 { |
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77 return crop >= border ? 0 : border - crop; |
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78 } |
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79 |
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80 static void update_video_params(vdp_context *context) |
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81 { |
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82 uint32_t top_crop = render_overscan_top(); |
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83 uint32_t bot_crop = render_overscan_bot(); |
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84 uint32_t border_top; |
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85 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
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86 if (context->regs[REG_MODE_2] & BIT_PAL) { |
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87 if (context->flags2 & FLAG2_REGION_PAL) { |
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88 context->inactive_start = PAL_INACTIVE_START; |
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89 border_top = BORDER_TOP_V30_PAL; |
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90 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V30_PAL); |
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91 } else { |
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92 //the behavior here is rather weird and needs more investigation |
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93 context->inactive_start = 0xF0; |
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94 border_top = 1; |
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95 context->border_bot = calc_crop(bot_crop, 3); |
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96 } |
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97 } else { |
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98 context->inactive_start = NTSC_INACTIVE_START; |
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99 if (context->flags2 & FLAG2_REGION_PAL) { |
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100 border_top = BORDER_TOP_V28_PAL; |
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101 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28_PAL); |
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102 } else { |
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103 border_top = BORDER_TOP_V28; |
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104 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28); |
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105 } |
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106 } |
1335
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Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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107 if (context->regs[REG_MODE_4] & BIT_H40) { |
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Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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108 context->max_sprites_frame = MAX_SPRITES_FRAME; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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109 context->max_sprites_line = MAX_SPRITES_LINE; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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110 } else { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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111 context->max_sprites_frame = MAX_SPRITES_FRAME_H32; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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parents:
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112 context->max_sprites_line = MAX_SPRITES_LINE_H32; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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113 } |
1325
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Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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114 if (context->state == INACTIVE) { |
58bfbed6cdb5
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115 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active |
58bfbed6cdb5
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116 if (context->vcounter < context->inactive_start) { |
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117 context->state = ACTIVE; |
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118 } else if (context->vcounter == 0x1FF) { |
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119 context->state = PREPARING; |
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120 } |
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121 } |
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122 } else { |
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123 context->inactive_start = MODE4_INACTIVE_START; |
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124 if (context->flags2 & FLAG2_REGION_PAL) { |
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125 border_top = BORDER_TOP_V24_PAL; |
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126 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24_PAL); |
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127 } else { |
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128 border_top = BORDER_TOP_V24; |
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129 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24); |
1167
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130 } |
1325
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131 if (!(context->regs[REG_MODE_1] & BIT_MODE_4)){ |
58bfbed6cdb5
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132 context->state = INACTIVE; |
58bfbed6cdb5
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133 } else if (context->state == INACTIVE) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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134 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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parents:
1322
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135 if (context->vcounter < context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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136 context->state = ACTIVE; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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137 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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138 else if (context->vcounter == 0x1FF) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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139 context->state = PREPARING; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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140 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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141 } |
1167
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142 } |
1881
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143 context->border_top = calc_crop(top_crop, border_top); |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
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144 context->top_offset = border_top - context->border_top; |
1167
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145 } |
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146 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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1077
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147 static uint8_t color_map_init_done; |
426
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148 |
1906
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Make VDP VSRAM capacity respect model selection
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149 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
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150 { |
1640
3602f3b20072
Small cleanup of vdp_context struct layout and removal of separately allocated buffers
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151 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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152 if (headless) { |
1881
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153 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(uint32_t)); |
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154 context->output_pitch = LINEBUF_SIZE * sizeof(uint32_t); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
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|
155 } else { |
1436
40c3be9f1af7
Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
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1432
diff
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|
156 context->cur_buffer = FRAMEBUFFER_ODD; |
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157 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
158 } |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
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1834
diff
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159 context->sprite_draws = MAX_SPRITES_LINE; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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470
diff
changeset
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160 context->fifo_write = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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470
diff
changeset
|
161 context->fifo_read = -1; |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
162 context->regs[REG_HINT] = context->hint_counter = 0xFF; |
1906
2d462aa78349
Make VDP VSRAM capacity respect model selection
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1899
diff
changeset
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163 context->vsram_size = has_max_vsram ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE; |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
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|
164 |
426
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
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165 if (!color_map_init_done) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
|
166 uint8_t b,g,r; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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167 for (uint16_t color = 0; color < (1 << 12); color++) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
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168 if (color & FBUF_SHADOW) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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changeset
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169 b = levels[(color >> 9) & 0x7]; |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
|
170 g = levels[(color >> 5) & 0x7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
|
171 r = levels[(color >> 1) & 0x7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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172 } else if(color & FBUF_HILIGHT) { |
add9e2f5c0e3
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changeset
|
173 b = levels[((color >> 9) & 0x7) + 7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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changeset
|
174 g = levels[((color >> 5) & 0x7) + 7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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changeset
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175 r = levels[((color >> 1) & 0x7) + 7]; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
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1117
diff
changeset
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176 } else if(color & FBUF_MODE4) { |
1127
cb4771f4543a
Fix Mode 4 color mapping
Michael Pavone <pavone@retrodev.com>
parents:
1125
diff
changeset
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177 b = levels[(color >> 4 & 0xC) | (color >> 6 & 0x2)]; |
1125
fba485949723
Brighten up Mode 4 colors
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parents:
1124
diff
changeset
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178 g = levels[(color >> 2 & 0x8) | (color >> 1 & 0x4) | (color >> 4 & 0x2)]; |
fba485949723
Brighten up Mode 4 colors
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parents:
1124
diff
changeset
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179 r = levels[(color << 1 & 0xC) | (color >> 1 & 0x2)]; |
426
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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diff
changeset
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180 } else { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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181 b = levels[(color >> 8) & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
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182 g = levels[(color >> 4) & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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diff
changeset
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183 r = levels[color & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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diff
changeset
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184 } |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
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185 color_map[color] = render_map_color(r, g, b); |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
424
diff
changeset
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186 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
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187 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++) |
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Somewhat broken implementation of Mode 4
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parents:
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188 { |
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Somewhat broken implementation of Mode 4
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parents:
1117
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changeset
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189 uint16_t mode5_addr = mode4_addr & 0x3DFD; |
e9369d6f0101
Somewhat broken implementation of Mode 4
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parents:
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190 mode5_addr |= mode4_addr << 8 & 0x200; |
e9369d6f0101
Somewhat broken implementation of Mode 4
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parents:
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191 mode5_addr |= mode4_addr >> 8 & 2; |
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192 mode4_address_map[mode4_addr] = mode5_addr; |
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193 } |
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194 for (uint32_t planar = 0; planar < 256; planar++) |
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195 { |
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196 uint32_t chunky = 0; |
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197 for (int bit = 7; bit >= 0; bit--) |
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198 { |
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199 chunky = chunky << 4; |
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200 chunky |= planar >> bit & 1; |
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201 } |
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202 planar_to_chunky[planar] = chunky; |
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203 } |
426
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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424
diff
changeset
|
204 color_map_init_done = 1; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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205 } |
437
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206 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++) |
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207 { |
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208 uint8_t src = color & DBG_SRC_MASK; |
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209 if (src > DBG_SRC_S) { |
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210 context->debugcolors[color] = 0; |
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211 } else { |
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212 uint8_t r,g,b; |
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213 b = debug_base[src][0]; |
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214 g = debug_base[src][1]; |
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215 r = debug_base[src][2]; |
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216 if (color & DBG_PRIORITY) |
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217 { |
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218 if (b) { |
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219 b += 48; |
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220 } |
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221 if (g) { |
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222 g += 48; |
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223 } |
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224 if (r) { |
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225 r += 48; |
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226 } |
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227 } |
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228 if (color & DBG_SHADOW) { |
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229 b /= 2; |
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230 g /= 2; |
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231 r /=2 ; |
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232 } |
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233 if (color & DBG_HILIGHT) { |
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234 if (b) { |
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235 b += 72; |
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236 } |
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237 if (g) { |
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238 g += 72; |
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239 } |
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240 if (r) { |
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241 r += 72; |
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242 } |
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243 } |
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244 context->debugcolors[color] = render_map_color(r, g, b); |
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245 } |
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246 } |
623
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Fix most of the breakage caused by the vcounter/hcounter changes
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247 if (region_pal) { |
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248 context->flags2 |= FLAG2_REGION_PAL; |
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Fix most of the breakage caused by the vcounter/hcounter changes
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249 } |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
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diff
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250 update_video_params(context); |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
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1878
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|
251 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * context->border_top); |
1640
3602f3b20072
Small cleanup of vdp_context struct layout and removal of separately allocated buffers
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1639
diff
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252 return context; |
20
f664eeb55cb4
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diff
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|
253 } |
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diff
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|
254 |
884
252dfd29831d
Selecting a second game from the menu now works
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822
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|
255 void vdp_free(vdp_context *context) |
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256 { |
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|
257 free(context); |
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|
258 } |
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|
259 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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1077
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changeset
|
260 static int is_refresh(vdp_context * context, uint32_t slot) |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
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454
diff
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|
261 { |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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621
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|
262 if (context->regs[REG_MODE_4] & BIT_H40) { |
b76d2a628ab9
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|
263 return slot == 250 || slot == 26 || slot == 59 || slot == 90 || slot == 122 || slot == 154; |
460
788ba843a731
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454
diff
changeset
|
264 } else { |
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454
diff
changeset
|
265 //TODO: Figure out which slots are refresh when display is off in 32-cell mode |
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diff
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|
266 //These numbers are guesses based on H40 numbers |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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parents:
621
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|
267 return slot == 243 || slot == 19 || slot == 51 || slot == 83 || slot == 115; |
460
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diff
changeset
|
268 //The numbers below are the refresh slots during active display |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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|
269 //return (slot == 29 || slot == 61 || slot == 93 || slot == 125); |
460
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diff
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|
270 } |
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454
diff
changeset
|
271 } |
788ba843a731
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454
diff
changeset
|
272 |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
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parents:
1150
diff
changeset
|
273 static void increment_address(vdp_context *context) |
681e8a13b261
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|
274 { |
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changeset
|
275 context->address += context->regs[REG_AUTOINC]; |
681e8a13b261
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|
276 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
681e8a13b261
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diff
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|
277 context->address++; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
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1150
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|
278 } |
681e8a13b261
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parents:
1150
diff
changeset
|
279 } |
681e8a13b261
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diff
changeset
|
280 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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parents:
1077
diff
changeset
|
281 static void render_sprite_cells(vdp_context * context) |
20
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parents:
diff
changeset
|
282 { |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
diff
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|
283 if (context->cur_slot > MAX_SPRITES_LINE) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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changeset
|
284 context->cur_slot--; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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changeset
|
285 return; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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|
286 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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changeset
|
287 if (context->cur_slot < 0) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
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changeset
|
288 return; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
diff
changeset
|
289 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
290 sprite_draw * d = context->sprite_draw_list + context->cur_slot; |
1871
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
291 uint16_t address = d->address; |
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
292 address += context->sprite_x_offset * d->height * 4; |
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
293 context->serial_address = address; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
diff
changeset
|
294 uint16_t dir; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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diff
changeset
|
295 int16_t x; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
diff
changeset
|
296 if (d->h_flip) { |
1871
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
297 x = d->x_pos + 7 + 8 * (d->width - context->sprite_x_offset - 1); |
1866
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Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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diff
changeset
|
298 dir = -1; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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diff
changeset
|
299 } else { |
1871
e75b788caedd
Fix debug register output regression in border region
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1869
diff
changeset
|
300 x = d->x_pos + context->sprite_x_offset * 8; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
301 dir = 1; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
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1834
diff
changeset
|
302 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
303 if (d->x_pos) { |
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304 context->flags |= FLAG_CAN_MASK; |
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305 if (!(context->flags & FLAG_MASKED)) { |
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306 x -= 128; |
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307 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x); |
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308 uint8_t collide = 0; |
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309 if (x >= 8 && x < 312) { |
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310 //sprite is fully visible |
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311 for (; address != ((context->serial_address+4) & 0xFFFF); address++) { |
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312 uint8_t pixel = context->vdpmem[address] >> 4; |
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313 if (!(context->linebuf[x] & 0xF)) { |
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314 context->linebuf[x] = pixel | d->pal_priority; |
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315 } else { |
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316 collide |= pixel; |
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317 } |
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318 x += dir; |
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319 pixel = context->vdpmem[address] & 0xF; |
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320 if (!(context->linebuf[x] & 0xF)) { |
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321 context->linebuf[x] = pixel | d->pal_priority; |
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322 } else { |
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323 collide |= pixel; |
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324 } |
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325 x += dir; |
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326 } |
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327 } else if (x > -8 && x < 327) { |
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328 //sprite is partially visible |
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329 for (; address != ((context->serial_address+4) & 0xFFFF); address++) { |
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330 if (x >= 0 && x < 320) { |
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331 uint8_t pixel = context->vdpmem[address] >> 4; |
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332 if (!(context->linebuf[x] & 0xF)) { |
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333 context->linebuf[x] = pixel | d->pal_priority; |
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334 } else { |
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335 collide |= pixel; |
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336 } |
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337 } |
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338 x += dir; |
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339 if (x >= 0 && x < 320) { |
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340 uint8_t pixel = context->vdpmem[address] & 0xF; |
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341 if (!(context->linebuf[x] & 0xF)) { |
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342 context->linebuf[x] = pixel | d->pal_priority; |
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343 } else { |
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344 collide |= pixel; |
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345 } |
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346 } |
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347 x += dir; |
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348 } |
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349 } |
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350 if (collide) { |
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351 context->flags2 |= FLAG2_SPRITE_COLLIDE; |
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352 } |
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353 } |
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354 } else if (context->flags & FLAG_CAN_MASK) { |
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355 context->flags |= FLAG_MASKED; |
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356 context->flags &= ~FLAG_CAN_MASK; |
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357 } |
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358 |
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359 context->sprite_x_offset++; |
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360 if (context->sprite_x_offset == d->width) { |
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361 d->x_pos = 0; |
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362 context->sprite_x_offset = 0; |
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363 context->cur_slot--; |
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364 } |
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365 } |
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366 |
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367 static void fetch_sprite_cells_mode4(vdp_context * context) |
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368 { |
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369 if (context->sprite_index >= context->sprite_draws) { |
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370 sprite_draw * d = context->sprite_draw_list + context->sprite_index; |
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371 uint32_t address = mode4_address_map[d->address & 0x3FFF]; |
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372 context->fetch_tmp[0] = context->vdpmem[address]; |
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373 context->fetch_tmp[1] = context->vdpmem[address + 1]; |
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374 } |
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375 } |
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376 |
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377 static void render_sprite_cells_mode4(vdp_context * context) |
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378 { |
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379 if (context->sprite_index >= context->sprite_draws) { |
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380 sprite_draw * d = context->sprite_draw_list + context->sprite_index; |
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381 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1; |
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382 pixels |= planar_to_chunky[context->fetch_tmp[1]]; |
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383 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF]; |
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384 pixels |= planar_to_chunky[context->vdpmem[address]] << 3; |
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385 pixels |= planar_to_chunky[context->vdpmem[address + 1]] << 2; |
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386 int x = d->x_pos & 0xFF; |
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387 for (int i = 28; i >= 0; i -= 4, x++) |
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388 { |
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389 if (context->linebuf[x] && (pixels >> i & 0xF)) { |
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390 if ( |
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391 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8) |
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392 || ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256) |
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393 ) { |
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394 context->flags2 |= FLAG2_SPRITE_COLLIDE; |
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395 } |
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396 } else { |
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397 context->linebuf[x] = pixels >> i & 0xF; |
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398 } |
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399 } |
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400 context->sprite_index--; |
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401 } |
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402 } |
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403 |
1320
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SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
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|
404 static uint32_t mode5_sat_address(vdp_context *context) |
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405 { |
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406 uint32_t addr = context->regs[REG_SAT] << 9; |
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407 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) { |
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408 addr &= 0xFFFF; |
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409 } |
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410 if (context->regs[REG_MODE_4] & BIT_H40) { |
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411 addr &= 0x1FC00; |
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|
412 } |
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SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
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|
413 return addr; |
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414 } |
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|
415 |
322
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
416 void vdp_print_sprite_table(vdp_context * context) |
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
417 { |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
418 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
419 uint16_t sat_address = mode5_sat_address(context); |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
420 uint16_t current_index = 0; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
421 uint8_t count = 0; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
422 do { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
423 uint16_t address = current_index * 8 + sat_address; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
424 uint16_t cache_address = current_index * 4; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
425 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
426 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
427 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 | context->sat_cache[cache_address+1]) & 0x1FF; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
428 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
429 uint16_t link = context->sat_cache[cache_address+3] & 0x7F; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
430 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
431 uint8_t pri = context->vdpmem[address + 4] >> 7; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
432 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
433 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
434 current_index = link; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
435 count++; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
436 } while (current_index != 0 && count < 80); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
437 } else { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
438 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
439 for (int i = 0; i < 64; i++) |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
440 { |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
441 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]]; |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
442 if (y == 0xD0) { |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
443 break; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
444 } |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
445 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]]; |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
446 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2]] * 32 |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
447 + (context->regs[REG_STILE_BASE] << 11 & 0x2000); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
448 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
449 tile_address &= ~32; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
450 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
451 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
452 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
453 } |
322
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
454 } |
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
455 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
456 #define VRAM_READ 0 //0000 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
457 #define VRAM_WRITE 1 //0001 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
458 //2 would trigger register write 0010 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
459 #define CRAM_WRITE 3 //0011 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
460 #define VSRAM_READ 4 //0100 |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
461 #define VSRAM_WRITE 5//0101 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
462 //6 would trigger regsiter write 0110 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
463 //7 is a mystery //0111 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
464 #define CRAM_READ 8 //1000 |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
465 //9 is also a mystery //1001 |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
466 //A would trigger register write 1010 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
467 //B is a mystery 1011 |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
468 #define VRAM_READ8 0xC //1100 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
469 //D is a mystery 1101 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
470 //E would trigger register write 1110 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
471 //F is a mystery 1111 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
472 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
473 //Possible theory on how bits work |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
474 //CD0 = Read/Write flag |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
475 //CD2,(CD1|CD3) = RAM type |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
476 // 00 = VRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
477 // 01 = CRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
478 // 10 = VSRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
479 // 11 = VRAM8 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
480 //Would result in |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
481 // 7 = VRAM8 write |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
482 // 9 = CRAM write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
483 // B = CRAM write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
484 // D = VRAM8 write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
485 // F = VRAM8 write alais |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
486 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
487 #define DMA_START 0x20 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
488 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
489 static const char * cd_name(uint8_t cd) |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
490 { |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
491 switch (cd & 0xF) |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
492 { |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
493 case VRAM_READ: |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
494 return "VRAM read"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
495 case VRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
496 return "VRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
497 case CRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
498 return "CRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
499 case VSRAM_READ: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
500 return "VSRAM read"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
501 case VSRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
502 return "VSRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
503 case VRAM_READ8: |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
504 return "VRAM read (undocumented 8-bit mode)"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
505 default: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
506 return "invalid"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
507 } |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
508 } |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
509 |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
510 void vdp_print_reg_explain(vdp_context * context) |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
511 { |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
512 char * hscroll[] = {"full", "7-line", "cell", "line"}; |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
513 printf("**Mode Group**\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
514 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n" |
1331
9bba5ff5beb8
Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents:
1325
diff
changeset
|
515 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n" |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
516 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
517 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", |
757
483f7e7926a6
More clang warning cleanup
Michael Pavone <pavone@retrodev.com>
parents:
748
diff
changeset
|
518 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0, |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
519 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
520 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", |
1331
9bba5ff5beb8
Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents:
1325
diff
changeset
|
521 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64, |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
522 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full", |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
523 hscroll[context->regs[REG_MODE_3] & 0x3], |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
524 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled"); |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
525 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
526 printf("\n**Table Group**\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
527 "02: %.2X | Scroll A Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
528 "03: %.2X | Window Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
529 "04: %.2X | Scroll B Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
530 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
531 "0D: %.2X | HScroll Data Table: $%.4X\n", |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
532 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
533 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
534 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
535 context->regs[REG_SAT], mode5_sat_address(context), |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
536 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
537 } else { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
538 printf("\n**Table Group**\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
539 "02: %.2X | Background Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
540 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
541 "06: %.2X | Sprite Tile Base: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
542 "08: %.2X | Background X Scroll: %d\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
543 "09: %.2X | Background Y Scroll: %d\n", |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
544 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
545 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
546 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
547 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL], |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
548 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
549 |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
550 } |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
551 char * sizes[] = {"32", "64", "invalid", "128"}; |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
552 printf("\n**Misc Group**\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
553 "07: %.2X | Backdrop Color: $%X\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
554 "0A: %.2X | H-Int Counter: %u\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
555 "0F: %.2X | Auto-increment: $%X\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
556 "10: %.2X | Scroll A/B Size: %sx%s\n", |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
557 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR], |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
558 context->regs[REG_HINT], context->regs[REG_HINT], |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
559 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC], |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
560 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]); |
621
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
561 char * src_types[] = {"68K", "68K", "Copy", "Fill"}; |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
562 printf("\n**DMA Group**\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
563 "13: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
564 "14: %.2X | DMA Length: $%.4X words\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
565 "15: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
566 "16: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
567 "17: %.2X | DMA Source Address: $%.6X, Type: %s\n", |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
568 context->regs[REG_DMALEN_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
569 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
570 context->regs[REG_DMASRC_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
571 context->regs[REG_DMASRC_M], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
572 context->regs[REG_DMASRC_H], |
629
9089951a1994
Small fix to display of DMA source address in vr debug command
Michael Pavone <pavone@retrodev.com>
parents:
624
diff
changeset
|
573 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L] << 1, |
621
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
574 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]); |
1628
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
575 uint8_t old_flags = context->flags; |
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
576 uint8_t old_flags2 = context->flags2; |
438
b3cee2fe690b
Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents:
437
diff
changeset
|
577 printf("\n**Internal Group**\n" |
b3cee2fe690b
Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents:
437
diff
changeset
|
578 "Address: %X\n" |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
579 "CD: %X - %s\n" |
647
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
580 "Pending: %s\n" |
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
581 "VCounter: %d\n" |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
582 "HCounter: %d\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
583 "VINT Pending: %s\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
584 "HINT Pending: %s\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
585 "Status: %X\n", |
1150
322d28e6f13c
Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1149
diff
changeset
|
586 context->address, context->cd, cd_name(context->cd), |
322d28e6f13c
Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1149
diff
changeset
|
587 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none", |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
588 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false", |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
589 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_control_port_read(context)); |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
590 printf("\nDebug Register: %X | Output disabled: %s, Force Layer: %d\n", context->test_port, |
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
591 (context->test_port & TEST_BIT_DISABLE) ? "true" : "false", context->test_port >> 7 & 3 |
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
592 ); |
1628
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
593 //restore flags as calling vdp_control_port_read can change them |
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
594 context->flags = old_flags; |
3c1661305219
Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents:
1454
diff
changeset
|
595 context->flags2 = old_flags2; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
596 } |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
597 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
598 static uint8_t is_active(vdp_context *context) |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
599 { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
600 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
601 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
602 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
603 static void scan_sprite_table(uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
604 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
605 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) { |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
606 line += 1; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
607 uint16_t ymask, ymin; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
608 uint8_t height_mult; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
609 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
610 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
611 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
612 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
613 } |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
614 ymask = 0x3FF; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
615 ymin = 256; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
616 height_mult = 16; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
617 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
618 ymask = 0x1FF; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
619 ymin = 128; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
620 height_mult = 8; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
621 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
622 context->sprite_index &= 0x7F; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
623 //TODO: Implement squirelly behavior documented by Kabuto |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
624 if (context->sprite_index >= context->max_sprites_frame) { |
38
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
625 context->sprite_index = 0; |
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
626 return; |
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
627 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
628 uint16_t address = context->sprite_index * 4; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
629 line += ymin; |
1346
f7ca42e020fd
Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1344
diff
changeset
|
630 line &= ymask; |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
631 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
632 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult; |
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
633 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
634 if (y <= line && line < (y + height)) { |
27
aa1c47fab3f1
Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents:
26
diff
changeset
|
635 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
636 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2]; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
637 context->sprite_info_list[context->slot_counter++].index = context->sprite_index; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
638 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
639 context->sprite_index = context->sat_cache[address+3] & 0x7F; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
640 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
641 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
642 //TODO: Implement squirelly behavior documented by Kabuto |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
643 if (context->sprite_index >= context->max_sprites_frame) { |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
644 context->sprite_index = 0; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
645 return; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
646 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
647 address = context->sprite_index * 4; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
648 y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
649 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult; |
323
8c01b4154480
Properly mask sprite X and Y coordinates
Mike Pavone <pavone@retrodev.com>
parents:
322
diff
changeset
|
650 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
651 if (y <= line && line < (y + height)) { |
27
aa1c47fab3f1
Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents:
26
diff
changeset
|
652 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
653 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2]; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
654 context->sprite_info_list[context->slot_counter++].index = context->sprite_index; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
655 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
656 context->sprite_index = context->sat_cache[address+3] & 0x7F; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
657 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
658 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
659 //TODO: Seems like the overflow flag should be set here if we run out of sprite info slots without hitting the end of the list |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
660 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
661 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
662 static void scan_sprite_table_mode4(vdp_context * context) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
663 { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
664 if (context->sprite_index < MAX_SPRITES_FRAME_H32) { |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
665 uint32_t line = context->vcounter; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
666 line &= 0xFF; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
667 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
668 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index]; |
1138
25268334a24c
Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents:
1137
diff
changeset
|
669 uint32_t y = context->vdpmem[sat_address+1]; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
670 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
671 |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
672 if (y == 0xd0) { |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
673 context->sprite_index = MAX_SPRITES_FRAME_H32; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
674 return; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
675 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
676 if (y <= line && line < (y + size)) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
677 if (!context->slot_counter) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
678 context->sprite_index = MAX_SPRITES_FRAME_H32; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
679 context->flags |= FLAG_DOT_OFLOW; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
680 return; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
681 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
682 context->sprite_info_list[--(context->slot_counter)].size = size; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
683 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
684 context->sprite_info_list[context->slot_counter].y = y; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
685 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
686 context->sprite_index++; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
687 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
688 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
689 if (context->sprite_index < MAX_SPRITES_FRAME_H32) { |
1138
25268334a24c
Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents:
1137
diff
changeset
|
690 y = context->vdpmem[sat_address]; |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
691 if (y == 0xd0) { |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
692 context->sprite_index = MAX_SPRITES_FRAME_H32; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
693 return; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
694 } else { |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
695 if (y <= line && line < (y + size)) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
696 if (!context->slot_counter) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
697 context->sprite_index = MAX_SPRITES_FRAME_H32; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
698 context->flags |= FLAG_DOT_OFLOW; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
699 return; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
700 } |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
701 context->sprite_info_list[--(context->slot_counter)].size = size; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
702 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
703 context->sprite_info_list[context->slot_counter].y = y; |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
704 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
705 context->sprite_index++; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
706 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
707 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
708 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
709 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
710 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
711 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
712 static void read_sprite_x(uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
713 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
714 if (context->cur_slot == context->max_sprites_line) { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
715 context->cur_slot = 0; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
716 } |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
717 if (context->cur_slot < context->slot_counter) { |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
718 if (context->sprite_draws) { |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
719 line += 1; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
720 //in tiles |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
721 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
722 //in pixels |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
723 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
724 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
725 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
726 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
727 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
728 } |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
729 height *= 2; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
730 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
731 uint16_t ymask, ymin; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
732 if (context->double_res) { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
733 ymask = 0x3FF; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
734 ymin = 256; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
735 } else { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
736 ymask = 0x1FF; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
737 ymin = 128; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
738 } |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
739 uint16_t att_addr = mode5_sat_address(context) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
740 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
741 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
742 uint8_t row; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
743 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4; |
1346
f7ca42e020fd
Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1344
diff
changeset
|
744 line = (line + ymin) & ymask; |
1338
3706b683cd48
Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1337
diff
changeset
|
745 int16_t y = ((context->sat_cache[cache_addr] << 8 | context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
746 if (tileinfo & MAP_BIT_V_FLIP) { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
747 row = (y + height - 1) - line; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
748 } else { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
749 row = line-y; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
750 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
751 row &= ymask >> 4; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
752 uint16_t address; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
753 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
754 address = ((tileinfo & 0x3FF) << 6) + row * 4; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
755 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
756 address = ((tileinfo & 0x7FF) << 5) + row * 4; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
757 } |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
758 context->sprite_draws--; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
759 context->sprite_draw_list[context->sprite_draws].x_pos = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
760 context->sprite_draw_list[context->sprite_draws].address = address; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
761 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
762 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
763 context->sprite_draw_list[context->sprite_draws].width = width; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
764 context->sprite_draw_list[context->sprite_draws].height = height; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
766 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
767 context->cur_slot++; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
768 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
769 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
770 static void read_sprite_x_mode4(vdp_context * context) |
427
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
771 { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
772 if (context->cur_slot >= context->slot_counter) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
773 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
774 address = mode4_address_map[address]; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
775 --context->sprite_draws; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
776 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
777 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
778 tile_address &= ~32; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
779 } |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
780 tile_address += (context->vcounter - context->sprite_info_list[context->cur_slot].y)* 4; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
781 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1]; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
782 context->sprite_draw_list[context->sprite_draws].address = tile_address; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
783 context->cur_slot--; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
784 } |
427
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
785 } |
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
786 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
787 #define CRAM_BITS 0xEEE |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
788 #define VSRAM_BITS 0x7FF |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
789 #define VSRAM_DIRTY_BITS 0xF800 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
790 |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
791 //rough estimate of slot number at which border display starts |
1270
687d3969416b
Adjust correspondance between slot number and actual video output to better match video signal measurements and analysis of Outrunners behavior on hardware. Partially fixes ticket:13
Michael Pavone <pavone@retrodev.com>
parents:
1269
diff
changeset
|
792 #define BG_START_SLOT 6 |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
793 |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
794 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value) |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
795 { |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
796 context->colors[index] = color_map[value & CRAM_BITS]; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
797 context->colors[index + SHADOW_OFFSET] = color_map[(value & CRAM_BITS) | FBUF_SHADOW]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
798 context->colors[index + HIGHLIGHT_OFFSET] = color_map[(value & CRAM_BITS) | FBUF_HILIGHT]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
799 context->colors[index + MODE4_OFFSET] = color_map[(value & CRAM_BITS) | FBUF_MODE4]; |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
800 } |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
801 |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
802 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value) |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
803 { |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
804 context->cram[addr] = value; |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
805 update_color_map(context, addr, value); |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
806 } |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
807 |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
808 static void write_cram(vdp_context * context, uint16_t address, uint16_t value) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
809 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
810 uint16_t addr; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
811 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
812 addr = (address/2) & (CRAM_SIZE-1); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
813 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
814 addr = address & 0x1F; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
815 value = (value << 1 & 0xE) | (value << 2 & 0xE0) | (value & 0xE00); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
816 } |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
817 write_cram_internal(context, addr, value); |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
818 |
1928
abc89555f2e0
Admit defeat on the "trying to write CRAM dots while output is null issue" for now and just add a null check
Mike Pavone <pavone@retrodev.com>
parents:
1925
diff
changeset
|
819 if (context->output && context->hslot >= BG_START_SLOT && ( |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
820 context->vcounter < context->inactive_start + context->border_bot |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
821 || context->vcounter > 0x200 - context->border_top |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
822 )) { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
823 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2; |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
824 if (context->hslot < bg_end_slot) { |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
825 uint32_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + MODE4_OFFSET]; |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
826 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color; |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
827 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
828 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
829 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
830 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
831 static void vdp_advance_dma(vdp_context * context) |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
832 { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
833 context->regs[REG_DMASRC_L] += 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
834 if (!context->regs[REG_DMASRC_L]) { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
835 context->regs[REG_DMASRC_M] += 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
836 } |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
837 context->address += context->regs[REG_AUTOINC]; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
838 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
839 context->regs[REG_DMALEN_H] = dma_len >> 8; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
840 context->regs[REG_DMALEN_L] = dma_len; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
841 if (!dma_len) { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
842 context->flags &= ~FLAG_DMA_RUN; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
843 context->cd &= 0xF; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
844 } |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
845 } |
1019
e34334e6c682
Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
Michael Pavone <pavone@retrodev.com>
parents:
1001
diff
changeset
|
846 |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
847 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value) |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
848 { |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
849 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
850 if (!(address & 4)) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
851 uint32_t sat_address = mode5_sat_address(context); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
852 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
853 uint16_t cache_address = address - sat_address; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
854 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
855 context->sat_cache[cache_address] = value >> 8; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
856 context->sat_cache[cache_address^1] = value; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
857 } |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
858 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
859 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
860 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
861 |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
862 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value) |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
863 { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
864 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
865 if (!(address & 4)) { |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
866 uint32_t sat_address = mode5_sat_address(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
867 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
868 uint16_t cache_address = address - sat_address; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
869 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
870 context->sat_cache[cache_address] = value; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
871 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
872 } |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
873 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
874 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
875 |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
876 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value) |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
877 { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
878 address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
879 address ^= 1; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
880 //TODO: Support an option to actually have 128KB of VRAM |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
881 context->vdpmem[address] = value; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
882 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
883 |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
884 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value) |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
885 { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
886 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
887 address &= 0xFFFF; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
888 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
889 address = mode4_address_map[address & 0x3FFF]; |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
890 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
891 context->vdpmem[address] = value; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
892 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
893 |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
894 #define DMA_FILL 0x80 |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
895 #define DMA_COPY 0xC0 |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
896 #define DMA_TYPE_MASK 0xC0 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
897 static void external_slot(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
898 { |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
899 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) { |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
900 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1); |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
901 fifo_entry * cur = context->fifo + context->fifo_read; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
902 cur->cycle = context->cycles; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
903 cur->address = context->address; |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
904 cur->partial = 1; |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
905 vdp_advance_dma(context); |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
906 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
907 fifo_entry * start = context->fifo + context->fifo_read; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
908 if (context->fifo_read >= 0 && start->cycle <= context->cycles) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
909 switch (start->cd & 0xF) |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
910 { |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
911 case VRAM_WRITE: |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
912 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) == (BIT_128K_VRAM|BIT_MODE_5)) { |
1946 | 913 event_vram_word(context->cycles, start->address, start->value); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
914 vdp_check_update_sat(context, start->address, start->value); |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
915 write_vram_word(context, start->address, start->value); |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
916 } else { |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
917 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value; |
1946 | 918 uint32_t address = start->address ^ 1; |
919 event_vram_byte(context->cycles, start->address, byte, context->regs[REG_AUTOINC]); | |
920 vdp_check_update_sat_byte(context, address, byte); | |
921 write_vram_byte(context, address, byte); | |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
922 if (!start->partial) { |
1946 | 923 start->address = address; |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
924 start->partial = 1; |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
925 //skip auto-increment and removal of entry from fifo |
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
926 return; |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
927 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
928 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
929 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
930 case CRAM_WRITE: { |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
931 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
1946 | 932 uint16_t val; |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
933 if (start->partial == 3) { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
934 if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
935 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) | start->value << 8; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
936 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
937 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
938 val = (context->cram[address] & 0xFF00) | start->value; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
939 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
940 } else { |
1946 | 941 val = start->partial ? context->fifo[context->fifo_write].value : start->value; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
942 } |
1956
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
943 uint8_t buffer[3] = {start->address & 127, val >> 8, val}; |
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
944 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer); |
1946 | 945 write_cram(context, start->address, val); |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
946 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
947 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
948 case VSRAM_WRITE: |
1906
2d462aa78349
Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents:
1899
diff
changeset
|
949 if (((start->address/2) & 63) < context->vsram_size) { |
1432
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
950 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
951 if (start->partial == 3) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
952 if (start->address & 1) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
953 context->vsram[(start->address/2) & 63] &= 0xFF; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
954 context->vsram[(start->address/2) & 63] |= start->value << 8; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
955 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
956 context->vsram[(start->address/2) & 63] &= 0xFF00; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
957 context->vsram[(start->address/2) & 63] |= start->value; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
958 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
959 } else { |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
960 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
961 } |
1956
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
962 uint8_t buffer[3] = {((start->address/2) & 63) + 128, context->vsram[(start->address/2) & 63] >> 8, context->vsram[(start->address/2) & 63]}; |
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
963 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer); |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
964 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
965 |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
966 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
967 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
968 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1); |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
969 if (context->fifo_read == context->fifo_write) { |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
970 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) { |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
971 context->flags |= FLAG_DMA_RUN; |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
972 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
973 context->fifo_read = -1; |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
974 } |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
975 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
976 if (context->flags & FLAG_READ_FETCHED) { |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
977 write_vram_byte(context, context->address ^ 1, context->prefetch); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
978 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
979 //Update DMA state |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
980 vdp_advance_dma(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
981 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
982 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
983 } else { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
984 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L] ^ 1]; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
985 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
986 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
987 } |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
988 } else if (!(context->cd & 1) && !(context->flags & FLAG_READ_FETCHED)) { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
989 switch(context->cd & 0xF) |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
990 { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
991 case VRAM_READ: |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
992 if (context->flags2 & FLAG2_READ_PENDING) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
993 context->prefetch |= context->vdpmem[context->address | 1]; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
994 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
995 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
996 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
997 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
998 } else { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
999 //TODO: 128K VRAM Mode |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1000 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1001 context->flags2 |= FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1002 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1003 break; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1004 case VRAM_READ8: { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1005 uint32_t address = context->address ^ 1; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1006 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1007 address = mode4_address_map[address & 0x3FFF]; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1008 } |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1009 context->prefetch = context->vdpmem[address]; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1010 context->prefetch |= context->fifo[context->fifo_write].value & 0xFF00; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1011 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1012 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
1013 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1014 break; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
1015 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1016 case CRAM_READ: |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1017 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1018 context->prefetch |= context->fifo[context->fifo_write].value & ~CRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1019 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1020 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
1021 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1022 break; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1023 case VSRAM_READ: { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1024 uint16_t address = (context->address /2) & 63; |
1906
2d462aa78349
Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents:
1899
diff
changeset
|
1025 if (address >= context->vsram_size) { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1026 address = 0; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1027 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1028 context->prefetch = context->vsram[address] & VSRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1029 context->prefetch |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1030 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1031 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
1032 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1033 break; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1034 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1035 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1036 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1037 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1038 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1039 static void run_dma_src(vdp_context * context, int32_t slot) |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1040 { |
75 | 1041 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode |
1042 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations | |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
1043 if (context->fifo_write == context->fifo_read) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1044 return; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1045 } |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1046 fifo_entry * cur = NULL; |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1047 if (!(context->regs[REG_DMASRC_H] & 0x80)) |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1048 { |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1049 //68K -> VDP |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
1050 if (slot == -1 || !is_refresh(context, slot-1)) { |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1051 cur = context->fifo + context->fifo_write; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
1052 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1053 cur->address = context->address; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1054 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1055 cur->cd = context->cd; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1056 cur->partial = 0; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1057 if (context->fifo_read < 0) { |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1058 context->fifo_read = context->fifo_write; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1059 } |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1060 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1061 vdp_advance_dma(context); |
75 | 1062 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1063 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1064 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1065 |
40 | 1066 #define WINDOW_RIGHT 0x80 |
1067 #define WINDOW_DOWN 0x80 | |
1068 | |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1069 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1070 { |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1071 uint16_t window_line_shift, v_offset_mask, vscroll_shift; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1072 if (context->double_res) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1073 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1074 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1075 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1076 } |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1077 window_line_shift = 4; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1078 v_offset_mask = 0xF; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1079 vscroll_shift = 4; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1080 } else { |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1081 window_line_shift = 3; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1082 v_offset_mask = 0x7; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1083 vscroll_shift = 3; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1084 } |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1085 //TODO: Further research on vscroll latch behavior and the "first column bug" |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1086 if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1087 if (!column) { |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1088 if (context->regs[REG_MODE_4] & BIT_H40) { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1089 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1090 //ends up fetching the last value on the VSRAM bus in the H40 case |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1091 //getting the last latched value should be close enough for now |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1092 if (!vsram_off) { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1093 context->vscroll_latch[0] = context->vscroll_latch[1]; |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1094 } |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1095 } else { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1096 //supposedly it's always forced to 0 in the H32 case |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1097 context->vscroll_latch[0] = context->vscroll_latch[1] = 0; |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1098 } |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1099 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1100 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off]; |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1101 } |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1102 } |
40 | 1103 if (!vsram_off) { |
1104 uint16_t left_col, right_col; | |
1105 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { | |
920
e64168bb2b25
Fix calculation of window start column when it's on the right side. This removes graphical glitches in Afterburner 2, Fireshark and Dungeons and Dragons: Warriors of the Eternal Sun and probably others
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
1106 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1107 right_col = 42; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1108 } else { |
40 | 1109 left_col = 0; |
1110 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; | |
1111 if (right_col) { | |
1112 right_col += 2; | |
1113 } | |
1114 } | |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1115 uint16_t top_line, bottom_line; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1116 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) { |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1117 top_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1118 bottom_line = context->double_res ? 481 : 241; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1119 } else { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1120 top_line = 0; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1121 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1122 } |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1123 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1124 uint16_t address = context->regs[REG_WINDOW] << 10; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1125 uint16_t line_offset, offset, mask; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
1126 if (context->regs[REG_MODE_4] & BIT_H40) { |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1127 address &= 0xF000; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1128 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1129 mask = 0x7F; |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
1130 |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1131 } else { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1132 address &= 0xF800; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1133 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1134 mask = 0x3F; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1135 } |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1136 if (context->double_res) { |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1137 mask <<= 1; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1138 mask |= 1; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1139 } |
42
6653e67a6811
Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents:
41
diff
changeset
|
1140 offset = address + line_offset + (((column - 2) * 2) & mask); |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1141 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1142 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]); |
42
6653e67a6811
Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents:
41
diff
changeset
|
1143 offset = address + line_offset + (((column - 1) * 2) & mask); |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1144 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1145 context->v_offset = (line) & v_offset_mask; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1146 context->flags |= FLAG_WINDOW; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1147 return; |
40 | 1148 } |
1149 context->flags &= ~FLAG_WINDOW; | |
1150 } | |
1290
aa1a8eb5bb2b
Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents:
1289
diff
changeset
|
1151 //TODO: Verify behavior for 0x20 case |
aa1a8eb5bb2b
Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents:
1289
diff
changeset
|
1152 uint16_t vscroll = 0xFF | (context->regs[REG_SCROLL] & 0x30) << 4; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1153 if (context->double_res) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1154 vscroll <<= 1; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1155 vscroll |= 1; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1156 } |
710
4cd8823f79e3
First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Michael Pavone <pavone@retrodev.com>
parents:
708
diff
changeset
|
1157 vscroll &= context->vscroll_latch[vsram_off] + line; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1158 context->v_offset = vscroll & v_offset_mask; |
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
1159 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1160 vscroll >>= vscroll_shift; |
1887
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1161 //TODO: Verify the behavior for a setting of 2 |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1162 static const uint16_t hscroll_masks[] = {0x1F, 0x3F, 0x1F, 0x7F}; |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1163 static const uint16_t v_shifts[] = {6, 7, 0, 8}; |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1164 uint16_t hscroll_mask = hscroll_masks[context->regs[REG_SCROLL] & 0x3]; |
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1165 uint16_t v_shift = v_shifts[context->regs[REG_SCROLL] & 0x3]; |
28 | 1166 uint16_t hscroll, offset; |
1167 for (int i = 0; i < 2; i++) { | |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1168 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask; |
1887
bb3edb4ec605
Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents:
1886
diff
changeset
|
1169 offset = address + (((vscroll << v_shift) + hscroll*2) & 0x1FFF); |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1170 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset); |
28 | 1171 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
1172 if (i) { | |
1173 context->col_2 = col_val; | |
1174 } else { | |
1175 context->col_1 = col_val; | |
1176 } | |
1177 } | |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1178 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1179 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1180 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1181 { |
25
4d0c20ad815a
Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents:
24
diff
changeset
|
1182 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1183 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1184 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1185 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1186 { |
25
4d0c20ad815a
Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents:
24
diff
changeset
|
1187 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1188 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1189 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1190 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1191 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1192 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1193 //add row |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1194 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1195 if (column < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1196 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1197 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1198 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1199 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1200 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1201 address += (vscroll >> 3) * 2 * 32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1202 //add column |
1136
52f25c41abdd
Fix horizontal scrolling in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1135
diff
changeset
|
1203 address += ((column - (context->hscroll_a >> 3)) & 31) * 2; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1204 //adjust for weird VRAM mapping in Mode 4 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1205 address = mode4_address_map[address]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1206 context->col_1 = (context->vdpmem[address] << 8) | context->vdpmem[address+1]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1207 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1208 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1209 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1210 { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1211 uint16_t address; |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1212 uint16_t vflip_base; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1213 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1214 address = ((col & 0x3FF) << 6); |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1215 vflip_base = 60; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1216 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1217 address = ((col & 0x7FF) << 5); |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1218 vflip_base = 28; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1219 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1220 if (col & MAP_BIT_V_FLIP) { |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1221 address += vflip_base - 4 * context->v_offset; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1222 } else { |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1223 address += 4 * context->v_offset; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1224 } |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1225 uint8_t pal_priority = (col >> 9) & 0x70; |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1226 uint32_t bits = *((uint32_t *)(&context->vdpmem[address])); |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1227 tmp_buf += offset; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1228 if (col & MAP_BIT_H_FLIP) { |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1229 uint32_t shift = 28; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1230 for (int i = 0; i < 4; i++) |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1231 { |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1232 uint8_t right = pal_priority | ((bits >> shift) & 0xF); |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1233 shift -= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1234 *(tmp_buf++) = pal_priority | ((bits >> shift) & 0xF); |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1235 shift -= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1236 *(tmp_buf++) = right; |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1237 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1238 } else { |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1239 for (int i = 0; i < 4; i++) |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1240 { |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1241 uint8_t right = pal_priority | (bits & 0xF); |
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1242 bits >>= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1243 *(tmp_buf++) = pal_priority | (bits & 0xF); |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1244 bits >>= 4; |
1875
3457d338ae25
Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents:
1874
diff
changeset
|
1245 *(tmp_buf++) = right; |
1653
858d52140375
Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents:
1652
diff
changeset
|
1246 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1247 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1248 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1249 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1250 static void render_map_1(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1251 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1252 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1253 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1254 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1255 static void render_map_2(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1256 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1257 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1258 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1259 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1260 static void render_map_3(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1261 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1262 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1263 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1264 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1265 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1266 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1267 //calculate pixel row to fetch |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1268 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1269 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1270 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1271 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1272 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1273 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1274 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1275 vscroll &= 7; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1276 if (context->col_1 & 0x400) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1277 vscroll = 7 - vscroll; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1278 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1279 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1280 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1281 context->fetch_tmp[0] = context->vdpmem[address]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1282 context->fetch_tmp[1] = context->vdpmem[address+1]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1283 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1284 |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1285 static uint8_t composite_normal(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1286 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1287 uint8_t pixel = bg_index; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1288 uint8_t src = DBG_SRC_BG; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1289 if (plane_b & 0xF) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1290 pixel = plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1291 src = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1292 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1293 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1294 pixel = plane_a; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1295 src = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1296 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1297 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1298 pixel = sprite; |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1299 src = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1300 } |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1301 *debug_dst = src; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1302 return pixel; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1303 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1304 typedef struct { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1305 uint8_t index, intensity; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1306 } sh_pixel; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1307 |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1308 static sh_pixel composite_highlight(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1309 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1310 uint8_t pixel = bg_index; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1311 uint8_t src = DBG_SRC_BG; |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1312 uint8_t intensity = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1313 if (plane_b & 0xF) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1314 pixel = plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1315 src = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1316 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1317 intensity = plane_b & BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1318 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1319 pixel = plane_a; |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1320 src = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1321 } |
d0a69348add8
Optimized render_map_output a bit
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parents:
1649
diff
changeset
|
1322 intensity |= plane_a & BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
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1649
diff
changeset
|
1323 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1324 if ((sprite & 0x3F) == 0x3E) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1325 intensity += BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1326 } else if ((sprite & 0x3F) == 0x3F) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1327 intensity = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1328 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1329 pixel = sprite; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1330 src = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1331 if ((pixel & 0xF) == 0xE) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1332 intensity = BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1333 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1334 intensity |= pixel & BUF_BIT_PRIORITY; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1335 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1336 } |
d0a69348add8
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Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1337 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1338 *debug_dst = src; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1339 return (sh_pixel){.index = pixel, .intensity = intensity}; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1340 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1341 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1342 static void render_normal(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off) |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1343 { |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1344 uint8_t *sprite_buf = context->linebuf + col * 8; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1345 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1346 memset(dst, 0, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1347 memset(debug_dst, DBG_SRC_BG, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1348 dst += 8; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1349 debug_dst += 8; |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1350 sprite_buf += 8; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1351 plane_a_off += 8; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1352 plane_b_off += 8; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1353 for (int i = 0; i < 8; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1354 { |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1355 uint8_t sprite, plane_a, plane_b; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1356 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1357 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1358 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1359 debug_dst++; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1360 } |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1361 } else { |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1362 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1363 { |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1364 uint8_t sprite, plane_a, plane_b; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1365 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
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Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1366 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1367 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1368 debug_dst++; |
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1369 } |
1652
d0a69348add8
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parents:
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diff
changeset
|
1370 } |
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Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1371 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1372 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1373 static void render_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off) |
1652
d0a69348add8
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Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1374 { |
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Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
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changeset
|
1375 int start = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1376 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1377 memset(dst, SHADOW_OFFSET + (context->regs[REG_BG_COLOR] & 0x3F), 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1378 memset(debug_dst, DBG_SRC_BG | DBG_SHADOW, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1379 dst += 8; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1380 debug_dst += 8; |
1652
d0a69348add8
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Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1381 start = 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1382 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1383 uint8_t *sprite_buf = context->linebuf + col * 8 + start; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1384 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1385 { |
d0a69348add8
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Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1386 uint8_t sprite, plane_a, plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1387 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1388 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1389 sprite = *sprite_buf; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1390 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, context->regs[REG_BG_COLOR]); |
1821
4f3443ecb6d6
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Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1391 uint8_t final_pixel; |
1652
d0a69348add8
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parents:
1649
diff
changeset
|
1392 if (pixel.intensity == BUF_BIT_PRIORITY << 1) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1393 final_pixel = (pixel.index & 0x3F) + HIGHLIGHT_OFFSET; |
1652
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Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1394 } else if (pixel.intensity) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1395 final_pixel = pixel.index & 0x3F; |
1652
d0a69348add8
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Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1396 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1397 final_pixel = (pixel.index & 0x3F) + SHADOW_OFFSET; |
1652
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diff
changeset
|
1398 } |
d0a69348add8
Optimized render_map_output a bit
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diff
changeset
|
1399 debug_dst++; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1400 *(dst++) = final_pixel; |
1652
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diff
changeset
|
1401 } |
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diff
changeset
|
1402 } |
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changeset
|
1403 |
1821
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Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
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diff
changeset
|
1404 static void render_testreg(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off, uint8_t output_disabled, uint8_t test_layer) |
1652
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diff
changeset
|
1405 { |
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changeset
|
1406 if (output_disabled) { |
d0a69348add8
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diff
changeset
|
1407 switch (test_layer) |
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diff
changeset
|
1408 { |
d0a69348add8
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diff
changeset
|
1409 case 0: |
d0a69348add8
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changeset
|
1410 for (int i = 0; i < 16; i++) |
d0a69348add8
Optimized render_map_output a bit
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diff
changeset
|
1411 { |
d0a69348add8
Optimized render_map_output a bit
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diff
changeset
|
1412 *(dst++) = 0x3F; //TODO: confirm this on hardware |
d0a69348add8
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diff
changeset
|
1413 *(debug_dst++) = DBG_SRC_BG; |
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diff
changeset
|
1414 } |
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diff
changeset
|
1415 break; |
d0a69348add8
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diff
changeset
|
1416 case 1: { |
d0a69348add8
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parents:
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diff
changeset
|
1417 uint8_t *sprite_buf = context->linebuf + col * 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1418 for (int i = 0; i < 16; i++) |
d0a69348add8
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Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
1419 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
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|
1420 *(dst++) = *(sprite_buf++) & 0x3F; |
1652
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changeset
|
1421 *(debug_dst++) = DBG_SRC_S; |
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diff
changeset
|
1422 } |
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1649
diff
changeset
|
1423 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1424 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1425 case 2: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1426 for (int i = 0; i < 16; i++) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1427 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1428 *(dst++) = context->tmp_buf_a[(plane_a_off++) & SCROLL_BUFFER_MASK] & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1429 *(debug_dst++) = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1430 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1431 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1432 case 3: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1433 for (int i = 0; i < 16; i++) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1434 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1435 *(dst++) = context->tmp_buf_b[(plane_b_off++) & SCROLL_BUFFER_MASK] & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1436 *(debug_dst++) = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1437 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1438 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1439 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1440 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1441 int start = 0; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1442 uint8_t *sprite_buf = context->linebuf + col * 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1443 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1444 //TODO: Confirm how test register interacts with column 0 blanking |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1445 uint8_t pixel = 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1446 uint8_t src = DBG_SRC_BG; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1447 for (int i = 0; i < 8; ++i) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1448 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1449 switch (test_layer) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1450 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1451 case 1: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1452 pixel &= sprite_buf[i]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1453 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1454 src = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1455 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1456 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1457 case 2: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1458 pixel &= context->tmp_buf_a[(plane_a_off + i) & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1459 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1460 src = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1461 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1462 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1463 case 3: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1464 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1465 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1466 src = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1467 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1468 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1469 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1470 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1471 *(dst++) = pixel; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1472 *(debug_dst++) = src; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1473 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1474 plane_a_off += 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1475 plane_b_off += 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1476 sprite_buf += 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1477 start = 8; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1478 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1479 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1480 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1481 uint8_t sprite, plane_a, plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1482 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1483 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1484 sprite = *sprite_buf; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1485 uint8_t pixel = composite_normal(context, debug_dst, sprite, plane_a, plane_b, 0x3F) & 0x3F; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1486 switch (test_layer) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1487 { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1488 case 1: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1489 pixel &= sprite; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1490 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1491 *debug_dst = DBG_SRC_S; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1492 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1493 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1494 case 2: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1495 pixel &= plane_a; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1496 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1497 *debug_dst = DBG_SRC_A; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1498 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1499 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1500 case 3: |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1501 pixel &= plane_b; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1502 if (pixel) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1503 *debug_dst = DBG_SRC_B; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1504 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1505 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1506 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1507 debug_dst++; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1508 *(dst++) = pixel; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1509 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1510 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1511 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1512 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1513 static void render_testreg_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, int plane_a_off, int plane_b_off, uint8_t output_disabled, uint8_t test_layer) |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1514 { |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1515 int start = 0; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1516 uint8_t *sprite_buf = context->linebuf + col * 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1517 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1518 //TODO: Confirm how test register interacts with column 0 blanking |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1519 uint8_t pixel = 0x3F; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1520 uint8_t src = DBG_SRC_BG | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1521 for (int i = 0; i < 8; ++i) |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1522 { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1523 switch (test_layer) |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1524 { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1525 case 1: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1526 pixel &= sprite_buf[i]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1527 if (pixel) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1528 src = DBG_SRC_S | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1529 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1530 break; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1531 case 2: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1532 pixel &= context->tmp_buf_a[(plane_a_off + i) & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1533 if (pixel) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1534 src = DBG_SRC_A | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1535 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1536 break; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1537 case 3: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1538 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1539 if (pixel) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1540 src = DBG_SRC_B | DBG_SHADOW; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1541 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1542 break; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1543 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1544 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1545 *(dst++) = SHADOW_OFFSET + pixel; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1546 *(debug_dst++) = src; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1547 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1548 plane_a_off += 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1549 plane_b_off += 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1550 sprite_buf += 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1551 start = 8; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1552 } |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1553 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1554 { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1555 uint8_t sprite, plane_a, plane_b; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1556 plane_a = context->tmp_buf_a[plane_a_off & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1557 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK]; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1558 sprite = *sprite_buf; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1559 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, 0x3F); |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1560 if (output_disabled) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1561 pixel.index = 0x3F; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1562 } else { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1563 pixel.index &= 0x3F; |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1564 } |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1565 switch (test_layer) |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1566 { |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1567 case 1: |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1568 pixel.index &= sprite; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1569 if (pixel.index) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1570 *debug_dst = DBG_SRC_S; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1571 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1572 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1573 case 2: |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1574 pixel.index &= plane_a; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1575 if (pixel.index) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1576 *debug_dst = DBG_SRC_A; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1577 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1578 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1579 case 3: |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1580 pixel.index &= plane_b; |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1581 if (pixel.index) { |
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1582 *debug_dst = DBG_SRC_B; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1583 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1584 break; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1585 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1586 if (pixel.intensity == BUF_BIT_PRIORITY << 1) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1587 pixel.index += HIGHLIGHT_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1588 } else if (!pixel.intensity) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1589 pixel.index += SHADOW_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1590 } |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1591 debug_dst++; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1592 *(dst++) = pixel.index; |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1593 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1594 } |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1595 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1596 static void render_map_output(uint32_t line, int32_t col, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1597 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1598 uint8_t *dst; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1599 uint8_t *debug_dst; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1600 uint8_t output_disabled = (context->test_port & TEST_BIT_DISABLE) != 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1601 uint8_t test_layer = context->test_port >> 7 & 3; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
1602 if (context->state == PREPARING && !test_layer) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1603 if (col) { |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1604 col -= 2; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1605 dst = context->compositebuf + BORDER_LEFT + col * 8; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1606 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1607 dst = context->compositebuf; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1608 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1609 memset(dst, 0, BORDER_LEFT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1610 context->done_composite = dst + BORDER_LEFT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1611 return; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1612 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1613 memset(dst, 0, 16); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1614 context->done_composite = dst + 16; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1615 return; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1616 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1617 line &= 0xFF; |
1180
e2b81a0f8fd8
Undo poorly thought out minor optimization that screwed up rendering
Michael Pavone <pavone@retrodev.com>
parents:
1179
diff
changeset
|
1618 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context); |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1619 uint8_t *sprite_buf; |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1620 uint8_t sprite, plane_a, plane_b; |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1621 int plane_a_off, plane_b_off; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1622 if (col) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1623 { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1624 col-=2; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1625 dst = context->compositebuf + BORDER_LEFT + col * 8; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1626 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1627 |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1628 |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1629 uint8_t a_src, src; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1630 if (context->flags & FLAG_WINDOW) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1631 plane_a_off = context->buf_a_off; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1632 a_src = DBG_SRC_W; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1633 } else { |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1634 plane_a_off = context->buf_a_off - context->hscroll_a_fine; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1635 a_src = DBG_SRC_A; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1636 } |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1637 plane_b_off = context->buf_b_off - context->hscroll_b_fine; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1638 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7)); |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1639 |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1640 if (context->regs[REG_MODE_4] & BIT_HILIGHT) { |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1641 if (output_disabled || test_layer) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1642 render_testreg_highlight(context, col, dst, debug_dst, plane_a_off, plane_b_off, output_disabled, test_layer); |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1643 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1644 render_highlight(context, col, dst, debug_dst, plane_a_off, plane_b_off); |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1645 } |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1646 } else { |
1652
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1647 if (output_disabled || test_layer) { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1648 render_testreg(context, col, dst, debug_dst, plane_a_off, plane_b_off, output_disabled, test_layer); |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1649 } else { |
d0a69348add8
Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents:
1649
diff
changeset
|
1650 render_normal(context, col, dst, debug_dst, plane_a_off, plane_b_off); |
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
1651 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1652 } |
1655
3128d4e0bc68
Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents:
1653
diff
changeset
|
1653 dst += 16; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1654 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1655 dst = context->compositebuf; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1656 debug_dst = context->layer_debug_buf; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1657 uint8_t pixel = 0; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1658 if (output_disabled) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1659 pixel = 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1660 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1661 if (test_layer) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1662 switch(test_layer) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1663 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1664 case 1: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1665 memset(dst, 0, BORDER_LEFT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1666 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT); |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1667 dst += BORDER_LEFT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1668 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1669 case 2: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1670 //plane A |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1671 //TODO: Deal with Window layer |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1672 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1673 i = 0; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1674 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine + (16 - BORDER_LEFT); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1675 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK); |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1676 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1677 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1678 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK]; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1679 *debug_dst = DBG_SRC_A; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1680 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1681 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1682 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1683 case 3: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1684 //plane B |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1685 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1686 i = 0; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
1687 uint8_t buf_off = context->buf_b_off - context->hscroll_b_fine + (16 - BORDER_LEFT); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1688 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK); |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1689 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1690 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1691 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK]; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1692 *debug_dst = DBG_SRC_B; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1693 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1694 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1695 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1696 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1697 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1698 memset(dst, pixel, BORDER_LEFT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1699 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT); |
1878
881083d76212
Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents:
1877
diff
changeset
|
1700 dst += BORDER_LEFT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1701 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1702 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1703 context->done_composite = dst; |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1704 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1705 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1706 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1707 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1708 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1709 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1710 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1711 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1712 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1713 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1714 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1715 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1716 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1717 vscroll &= 7; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1718 if (context->col_1 & 0x400) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1719 //vflip |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1720 vscroll = 7 - vscroll; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1721 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1722 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1723 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1724 pixels |= planar_to_chunky[context->fetch_tmp[1]]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1725 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1726 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1727 pixels |= planar_to_chunky[context->vdpmem[address]] << 3; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1728 pixels |= planar_to_chunky[context->vdpmem[address+1]] << 2; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1729 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1730 int i, i_inc, i_limit; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1731 if (context->col_1 & 0x200) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1732 //hflip |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1733 i = 0; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1734 i_inc = 4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1735 i_limit = 32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1736 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1737 i = 28; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1738 i_inc = -4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1739 i_limit = -4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1740 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1741 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) | (context->col_1 >> 6 & 0x40); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1742 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1743 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1744 *dst = (pixels >> i & 0xF) | pal_priority; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1745 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1746 context->buf_a_off = (context->buf_a_off + 8) & 15; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1747 |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1748 uint8_t *dst = context->compositebuf + col * 8 + BORDER_LEFT; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1749 uint8_t *debug_dst = context->layer_debug_buf + col * 8 + BORDER_LEFT; |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1750 if (context->state == PREPARING) { |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1751 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8); |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1752 memset(debug_dst, DBG_SRC_BG, 8); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1753 context->done_composite = dst + 8; |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1754 return; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1755 } |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1756 |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1757 if (col || !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1758 uint8_t *sprite_src = context->linebuf + col * 8; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1759 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1760 sprite_src += 8; |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1761 } |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1762 for (int i = 0; i < 8; i++, sprite_src++) |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1763 { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1764 uint8_t *bg_src = context->tmp_buf_a + ((8 + i + col * 8 - (context->hscroll_a & 0x7)) & 15); |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1765 if ((*bg_src & 0x4F) > 0x40 || !*sprite_src) { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1766 //background plane has priority and is opaque or sprite layer is transparent |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1767 uint8_t pixel = *bg_src & 0x1F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1768 *(dst++) = pixel + MODE4_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1769 *(debug_dst++) = pixel ? DBG_SRC_A : DBG_SRC_BG; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1770 } else { |
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1771 //sprite layer is opaque and not covered by high priority BG pixels |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1772 *(dst++) = (*sprite_src | 0x10) + MODE4_OFFSET; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1773 *(debug_dst++) = DBG_SRC_S; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1774 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1775 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1776 context->done_composite = dst; |
1643
6909c5d0bbb5
Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents:
1642
diff
changeset
|
1777 } else { |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1778 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8); |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1779 memset(debug_dst, DBG_SRC_BG, 8); |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
1780 context->done_composite = dst + 8; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1781 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1782 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1783 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1784 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19}; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1785 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1786 static void vdp_advance_line(vdp_context *context) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1787 { |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1788 #ifdef TIMING_DEBUG |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1789 static uint32_t last_line = 0xFFFFFFFF; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1790 if (last_line != 0xFFFFFFFF) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1791 uint32_t diff = context->cycles - last_line; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1792 if (diff != MCLKS_LINE) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1793 printf("Line %d took %d cycles\n", context->vcounter, diff); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1794 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1795 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1796 last_line = context->cycles; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1797 #endif |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1798 uint16_t jump_start, jump_end; |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1799 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1800 if (is_mode_5) { |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1801 if (context->flags2 & FLAG2_REGION_PAL) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1802 if (context->regs[REG_MODE_2] & BIT_PAL) { |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1803 jump_start = 0x10B; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1804 jump_end = 0x1D2; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1805 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1806 jump_start = 0x103; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1807 jump_end = 0x1CA; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1808 } |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1809 } else if (context->regs[REG_MODE_2] & BIT_PAL) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1810 jump_start = 0x100; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1811 jump_end = 0x1FA; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1812 } else { |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1813 jump_start = 0xEB; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1814 jump_end = 0x1E5; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1815 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1816 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1817 jump_start = 0xDB; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1818 jump_end = 0x1D5; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1819 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1820 |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1821 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM | 1 << VDP_DEBUG_COMPOSITE)) { |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1822 uint32_t line = context->vcounter; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1823 if (line >= jump_end) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1824 line -= jump_end - jump_start; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1825 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1826 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1827 |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1828 if (total_lines - line <= context->border_top) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1829 line -= total_lines - context->border_top; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1830 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1831 line += context->border_top; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1832 } |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1833 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1834 uint32_t *fb = context->debug_fbs[VDP_DEBUG_CRAM] + context->debug_fb_pitch[VDP_DEBUG_CRAM] * line / sizeof(uint32_t); |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1835 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1836 for (int i = 0; i < 64; i++) |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1837 { |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1838 for (int x = 0; x < 8; x++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1839 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1840 *(fb++) = context->colors[i]; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1841 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1842 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1843 } else { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1844 for (int i = MODE4_OFFSET; i < MODE4_OFFSET+32; i++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1845 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1846 for (int x = 0; x < 16; x++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1847 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1848 *(fb++) = context->colors[i]; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
1849 } |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1850 } |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1851 } |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1852 } |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1853 if ( |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1854 context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE) |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1855 && line < (context->inactive_start + context->border_bot + context->border_top) |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1856 ) { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1857 uint32_t *fb = context->debug_fbs[VDP_DEBUG_COMPOSITE] + context->debug_fb_pitch[VDP_DEBUG_COMPOSITE] * line / sizeof(uint32_t); |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1858 for (int i = 0; i < LINEBUF_SIZE; i++) |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1859 { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1860 *(fb++) = context->debugcolors[context->layer_debug_buf[i]]; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1861 } |
1299
da1ffc4026c4
Fix latching of V32 mode bit
Michael Pavone <pavone@retrodev.com>
parents:
1290
diff
changeset
|
1862 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1863 } |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
1864 |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1865 context->vcounter++; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1866 if (context->vcounter == jump_start) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1867 context->vcounter = jump_end; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1868 } else { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1869 context->vcounter &= 0x1FF; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
1870 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1871 if (context->state == PREPARING) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1872 context->state = ACTIVE; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1873 } |
1377
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1874 if (context->vcounter == 0x1FF) { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1875 context->flags2 &= ~FLAG2_PAUSE; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1876 } |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1877 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1878 if (context->state != ACTIVE) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1879 context->hint_counter = context->regs[REG_HINT]; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1880 } else if (context->hint_counter) { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1881 context->hint_counter--; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1882 } else { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1883 context->flags2 |= FLAG2_HINT_PENDING; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1884 context->pending_hint_start = context->cycles; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1885 context->hint_counter = context->regs[REG_HINT]; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1886 } |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1887 } |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1888 |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1889 static void vdp_update_per_frame_debug(vdp_context *context) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1890 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1891 if (context->enabled_debuggers & (1 << VDP_DEBUG_PLANE)) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1892 uint32_t pitch; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1893 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_PLANE], &pitch); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1894 uint16_t hscroll_mask; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1895 uint16_t v_mul; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1896 uint16_t vscroll_mask = 0x1F | (context->regs[REG_SCROLL] & 0x30) << 1; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1897 switch(context->regs[REG_SCROLL] & 0x3) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1898 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1899 case 0: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1900 hscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1901 v_mul = 64; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1902 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1903 case 0x1: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1904 hscroll_mask = 0x3F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1905 v_mul = 128; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1906 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1907 case 0x2: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1908 //TODO: Verify this behavior |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1909 hscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1910 v_mul = 0; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1911 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1912 case 0x3: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1913 hscroll_mask = 0x7F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1914 v_mul = 256; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1915 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1916 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1917 uint16_t table_address; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1918 switch(context->debug_modes[VDP_DEBUG_PLANE] % 3) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1919 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1920 case 0: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1921 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1922 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1923 case 1: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1924 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1925 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1926 case 2: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1927 table_address = context->regs[REG_WINDOW] << 10; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1928 if (context->regs[REG_MODE_4] & BIT_H40) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1929 table_address &= 0xF000; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1930 v_mul = 128; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1931 hscroll_mask = 0x3F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1932 } else { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1933 table_address &= 0xF800; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1934 v_mul = 64; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1935 hscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1936 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1937 vscroll_mask = 0x1F; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1938 break; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1939 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1940 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR & 0x3F]]; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1941 for (uint16_t row = 0; row < 128; row++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1942 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1943 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1944 for (uint16_t col = 0; col < 128; col++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
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|
1945 { |
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1946 uint16_t address = row_address + (col & hscroll_mask) * 2; |
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1947 //pccv hnnn nnnn nnnn |
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1948 // |
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1949 uint16_t entry = context->vdpmem[address] << 8 | context->vdpmem[address + 1]; |
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1950 uint8_t pal = entry >> 9 & 0x30; |
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|
1951 |
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|
1952 uint32_t *dst = fb + (row * pitch * 8 / sizeof(uint32_t)) + col * 8; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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1953 address = (entry & 0x7FF) * 32; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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1954 int y_diff = 4; |
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|
1955 if (entry & 0x1000) { |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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1956 y_diff = -4; |
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|
1957 address += 7 * 4; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1958 } |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1959 int x_diff = 1; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1960 if (entry & 0x800) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1961 x_diff = -1; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1962 address += 3; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1963 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1964 for (int y = 0; y < 8; y++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1965 { |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1966 uint16_t trow_address = address; |
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WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1967 uint32_t *row_dst = dst; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1968 for (int x = 0; x < 4; x++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1969 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1970 uint8_t byte = context->vdpmem[trow_address]; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1971 trow_address += x_diff; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1972 uint8_t left, right; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1973 if (x_diff > 0) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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|
1974 left = byte >> 4; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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|
1975 right = byte & 0xF; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1976 } else { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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changeset
|
1977 left = byte & 0xF; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
1978 right = byte >> 4; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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changeset
|
1979 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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changeset
|
1980 *(row_dst++) = left ? context->colors[left|pal] : bg_color; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
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changeset
|
1981 *(row_dst++) = right ? context->colors[right|pal] : bg_color; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
1982 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
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changeset
|
1983 address += y_diff; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
1984 dst += pitch / sizeof(uint32_t); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1985 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1986 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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changeset
|
1987 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1988 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_PLANE], 1024); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
1989 } |
1634
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1990 |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1991 if (context->enabled_debuggers & (1 << VDP_DEBUG_VRAM)) { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1992 uint32_t pitch; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1993 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_VRAM], &pitch); |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1994 |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1995 uint8_t pal = (context->debug_modes[VDP_DEBUG_VRAM] % 4) << 4; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1996 for (int y = 0; y < 512; y++) |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1997 { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1998 uint32_t *line = fb + y * pitch / sizeof(uint32_t); |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
1999 int row = y >> 4; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2000 int yoff = y >> 1 & 7; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2001 for (int col = 0; col < 64; col++) |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2002 { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2003 uint16_t address = (row * 64 + col) * 32 + yoff * 4; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2004 for (int x = 0; x < 4; x++) |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2005 { |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2006 uint8_t byte = context->vdpmem[address++]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2007 uint8_t left = byte >> 4 | pal; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2008 uint8_t right = byte & 0xF | pal; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2009 *(line++) = context->colors[left]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2010 *(line++) = context->colors[left]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2011 *(line++) = context->colors[right]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2012 *(line++) = context->colors[right]; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2013 } |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2014 } |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2015 } |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2016 |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2017 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_VRAM], 1024); |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
2018 } |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2019 |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2020 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2021 uint32_t starting_line = 512 - 32*4; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2022 uint32_t *line = context->debug_fbs[VDP_DEBUG_CRAM] |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2023 + context->debug_fb_pitch[VDP_DEBUG_CRAM] * starting_line / sizeof(uint32_t); |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2024 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2025 for (int pal = 0; pal < 4; pal ++) |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2026 { |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2027 uint32_t *cur; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2028 for (int y = 0; y < 31; y++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2029 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2030 cur = line; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2031 for (int offset = 0; offset < 16; offset++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2032 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2033 for (int x = 0; x < 31; x++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2034 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2035 *(cur++) = context->colors[pal * 16 + offset]; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2036 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2037 *(cur++) = 0xFF000000; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2038 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2039 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t); |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2040 } |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2041 cur = line; |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2042 for (int x = 0; x < 512; x++) |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2043 { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2044 *(cur++) = 0xFF000000; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2045 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2046 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2047 } |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2048 } else { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2049 for (int pal = 0; pal < 2; pal ++) |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2050 { |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2051 uint32_t *cur; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2052 for (int y = 0; y < 31; y++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2053 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2054 cur = line; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2055 for (int offset = MODE4_OFFSET; offset < MODE4_OFFSET + 16; offset++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2056 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2057 for (int x = 0; x < 31; x++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2058 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2059 *(cur++) = context->colors[pal * 16 + offset]; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2060 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2061 *(cur++) = 0xFF000000; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2062 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2063 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t); |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2064 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2065 cur = line; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2066 for (int x = 0; x < 512; x++) |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2067 { |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2068 *(cur++) = 0xFF000000; |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2069 } |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2070 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t); |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2071 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2072 } |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2073 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_CRAM], 512); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2074 context->debug_fbs[VDP_DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_CRAM], &context->debug_fb_pitch[VDP_DEBUG_CRAM]); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
2075 } |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2076 if (context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE)) { |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2077 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], LINEBUF_SIZE); |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2078 context->debug_fbs[VDP_DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], &context->debug_fb_pitch[VDP_DEBUG_COMPOSITE]); |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
2079 } |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
2080 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
2081 |
1629
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2082 void vdp_force_update_framebuffer(vdp_context *context) |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2083 { |
1897
59a83c21d9d2
Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents:
1894
diff
changeset
|
2084 if (!context->fb) { |
59a83c21d9d2
Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents:
1894
diff
changeset
|
2085 return; |
59a83c21d9d2
Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents:
1894
diff
changeset
|
2086 } |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2087 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top; |
1629
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2088 |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2089 uint16_t to_fill = lines_max - context->output_lines; |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2090 memset( |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2091 ((char *)context->fb) + context->output_pitch * context->output_lines, |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2092 0, |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2093 to_fill * context->output_pitch |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2094 ); |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2095 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2096 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch); |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
2097 vdp_update_per_frame_debug(context); |
1629
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2098 } |
079e5b9d59ce
Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents:
1628
diff
changeset
|
2099 |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2100 static void advance_output_line(vdp_context *context) |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2101 { |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2102 //This function is kind of gross because of the need to deal with vertical border busting via mode changes |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2103 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top; |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2104 uint32_t output_line = context->vcounter; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2105 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2106 //vcounter increment occurs much later in Mode 4 |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2107 output_line++; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2108 } |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2109 |
1899
789746b1a1b3
Fix crash in OD2 Titancade scene when border is completely cropped by overscan settings
Mike Pavone <pavone@retrodev.com>
parents:
1897
diff
changeset
|
2110 if (context->output_lines >= lines_max || (!context->pushed_frame && output_line == context->inactive_start + context->border_top)) { |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2111 //we've either filled up a full frame or we're at the bottom of screen in the current defined mode + border crop |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2112 if (!headless) { |
1436
40c3be9f1af7
Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents:
1432
diff
changeset
|
2113 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2114 uint8_t is_even = context->flags2 & FLAG2_EVEN_FIELD; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2115 if (context->vcounter <= context->inactive_start && (context->regs[REG_MODE_4] & BIT_INTERLACE)) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2116 is_even = !is_even; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2117 } |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2118 context->cur_buffer = is_even ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2119 context->pushed_frame = 1; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2120 context->fb = NULL; |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2121 } |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2122 vdp_update_per_frame_debug(context); |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2123 context->h40_lines = 0; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2124 context->frame++; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2125 context->output_lines = 0; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2126 } |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2127 |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2128 if (output_line < context->inactive_start + context->border_bot) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2129 if (context->output_lines) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2130 output_line = context->output_lines++;//context->border_top + context->vcounter; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2131 } else if (!output_line && !context->border_top) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2132 //top border is completely cropped so we won't hit the case below |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2133 output_line = 0; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2134 context->output_lines = 1; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2135 context->pushed_frame = 0; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2136 } else { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2137 context->output_lines = output_line + 1; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2138 } |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2139 } else if (output_line >= 0x200 - context->border_top) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2140 if (output_line == 0x200 - context->border_top) { |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2141 //We're at the top of the display, force context->output_lines to be zero to avoid |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2142 //potential screen rolling if the mode is changed at an inopportune time |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2143 context->output_lines = 0; |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2144 context->pushed_frame = 0; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
2145 } |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2146 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top); |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2147 } else { |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2148 context->output = NULL; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2149 return; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2150 } |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2151 if (!context->fb) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2152 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch); |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2153 } |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2154 output_line += context->top_offset; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2155 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * output_line); |
1271
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
2156 #ifdef DEBUG_FB_FILL |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2157 for (int i = 0; i < LINEBUF_SIZE; i++) |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2158 { |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2159 context->output[i] = 0xFFFF00FF; |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2160 } |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2161 #endif |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2162 if (context->output && (context->regs[REG_MODE_4] & BIT_H40)) { |
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2163 context->h40_lines++; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
2164 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2165 } |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2166 |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2167 void vdp_release_framebuffer(vdp_context *context) |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2168 { |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2169 if (context->fb) { |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2170 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2171 context->output = context->fb = NULL; |
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2172 } |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2173 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2174 |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2175 void vdp_reacquire_framebuffer(vdp_context *context) |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2176 { |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2177 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top; |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2178 if (context->output_lines <= lines_max && context->output_lines > 0) { |
1891
179a2ac29f27
Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents:
1888
diff
changeset
|
2179 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch); |
1881
55198fc9cc1f
Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents:
1878
diff
changeset
|
2180 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * (context->output_lines - 1 + context->top_offset)); |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2181 } else { |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2182 context->output = NULL; |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2183 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2184 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
2185 |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2186 static void render_border_garbage(vdp_context *context, uint32_t address, uint8_t *buf, uint8_t buf_off, uint16_t col) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2187 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2188 uint8_t base = col >> 9 & 0x30; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2189 for (int i = 0; i < 4; i++, address++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2190 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2191 uint8_t byte = context->vdpmem[address & 0xFFFF]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2192 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte >> 4; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2193 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte & 0xF; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2194 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2195 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2196 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2197 static void draw_right_border(vdp_context *context) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2198 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2199 uint8_t *dst = context->compositebuf + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2200 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2201 if ((context->test_port & TEST_BIT_DISABLE) != 0) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2202 pixel = 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2203 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2204 uint8_t test_layer = context->test_port >> 7 & 3; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2205 if (test_layer) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2206 switch(test_layer) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2207 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2208 case 1: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2209 memset(dst, 0, BORDER_RIGHT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2210 dst += BORDER_RIGHT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2211 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2212 case 2: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2213 //plane A |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2214 //TODO: Deal with Window layer |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2215 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2216 i = 0; |
1888
bd60e74fd173
Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents:
1887
diff
changeset
|
2217 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2218 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2219 for (; i < BORDER_RIGHT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2220 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2221 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2222 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2223 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2224 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2225 case 3: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2226 //plane B |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2227 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2228 i = 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2229 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2230 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2231 for (; i < BORDER_RIGHT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2232 { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2233 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2234 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2235 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2236 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2237 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2238 } else { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2239 memset(dst, 0, BORDER_RIGHT); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2240 dst += BORDER_RIGHT; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2241 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2242 context->done_composite = dst; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2243 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2244 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2245 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2246 |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2247 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; } |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
2248 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2249 #define OUTPUT_PIXEL(slot) if ((slot) >= BG_START_SLOT) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2250 uint8_t *src = context->compositebuf + ((slot) - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2251 uint32_t *dst = context->output + ((slot) - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2252 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2253 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2254 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2255 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2256 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2257 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2258 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2259 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2260 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2261 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2262 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2263 |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2264 #define OUTPUT_PIXEL_H40(slot) if (slot <= (BG_START_SLOT + LINEBUF_SIZE/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2265 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2266 uint32_t *dst = context->output + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2267 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2268 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2269 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2270 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2271 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2272 if (slot != (BG_START_SLOT + LINEBUF_SIZE/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2273 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2274 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2275 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2276 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2277 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2278 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2279 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2280 |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2281 #define OUTPUT_PIXEL_H32(slot) if (slot <= (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2282 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2283 uint32_t *dst = context->output + (slot - BG_START_SLOT) *2;\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2284 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2285 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2286 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2287 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2288 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2289 if (slot != (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2290 if ((*src & 0x3F) | test_layer) {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2291 *(dst++) = context->colors[*(src++)];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2292 } else {\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2293 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2294 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2295 }\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2296 } |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2297 |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2298 //BG_START_SLOT => dst = 0, src = border |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2299 //BG_START_SLOT + 13/2=6, dst = 6, src = border + comp + 13 |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2300 #define OUTPUT_PIXEL_MODE4(slot) if ((slot) >= BG_START_SLOT) {\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2301 uint8_t *src = context->compositebuf + ((slot) - BG_START_SLOT) *2;\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2302 uint32_t *dst = context->output + ((slot) - BG_START_SLOT) *2;\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2303 if ((slot) - BG_START_SLOT < BORDER_LEFT/2) {\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2304 *(dst++) = context->colors[bgindex];\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2305 *(dst++) = context->colors[bgindex];\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2306 } else if ((slot) - BG_START_SLOT < (BORDER_LEFT+256)/2){\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2307 if ((slot) - BG_START_SLOT == BORDER_LEFT/2) {\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2308 *(dst++) = context->colors[bgindex];\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2309 src++;\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2310 } else {\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2311 *(dst++) = context->colors[*(src++)];\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2312 }\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2313 *(dst++) = context->colors[*(src++)];\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2314 } else if ((slot) - BG_START_SLOT <= (HORIZ_BORDER+256)/2) {\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2315 *(dst++) = context->colors[bgindex];\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2316 if ((slot) - BG_START_SLOT < (HORIZ_BORDER+256)/2) {\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2317 *(dst++) = context->colors[bgindex];\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2318 }\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2319 }\ |
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2320 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2321 |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2322 #define COLUMN_RENDER_BLOCK(column, startcyc) \ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2323 case startcyc:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2324 OUTPUT_PIXEL(startcyc)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2325 read_map_scroll_a(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2326 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2327 case ((startcyc+1)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2328 OUTPUT_PIXEL((startcyc+1)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2329 external_slot(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2330 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2331 case ((startcyc+2)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2332 OUTPUT_PIXEL((startcyc+2)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2333 render_map_1(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2334 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2335 case ((startcyc+3)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2336 OUTPUT_PIXEL((startcyc+3)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2337 render_map_2(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2338 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2339 case ((startcyc+4)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2340 OUTPUT_PIXEL((startcyc+4)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2341 read_map_scroll_b(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2342 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2343 case ((startcyc+5)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2344 OUTPUT_PIXEL((startcyc+5)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2345 read_sprite_x(context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2346 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2347 case ((startcyc+6)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2348 OUTPUT_PIXEL((startcyc+6)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2349 render_map_3(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2350 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2351 case ((startcyc+7)&0xFF):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2352 OUTPUT_PIXEL((startcyc+7)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2353 render_map_output(context->vcounter, column, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2354 CHECK_LIMIT |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2355 |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2356 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2357 case startcyc:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2358 OUTPUT_PIXEL(startcyc)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2359 read_map_scroll_a(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2360 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2361 case (startcyc+1):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2362 /* refresh, so don't run dma src */\ |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2363 OUTPUT_PIXEL((startcyc+1)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2364 context->hslot++;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2365 context->cycles += slot_cycles;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2366 CHECK_ONLY\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2367 case (startcyc+2):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2368 OUTPUT_PIXEL((startcyc+2)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2369 render_map_1(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2370 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2371 case (startcyc+3):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2372 OUTPUT_PIXEL((startcyc+3)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2373 render_map_2(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2374 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2375 case (startcyc+4):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2376 OUTPUT_PIXEL((startcyc+4)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2377 read_map_scroll_b(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2378 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2379 case (startcyc+5):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2380 OUTPUT_PIXEL((startcyc+5)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2381 read_sprite_x(context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2382 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2383 case (startcyc+6):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2384 OUTPUT_PIXEL((startcyc+6)&0xFF)\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2385 render_map_3(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2386 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2387 case (startcyc+7):\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2388 OUTPUT_PIXEL((startcyc+7)&0xFF)\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2389 render_map_output(context->vcounter, column, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2390 CHECK_LIMIT |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2391 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2392 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2393 case startcyc:\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2394 OUTPUT_PIXEL_MODE4(startcyc)\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2395 read_map_mode4(column, context->vcounter, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2396 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2397 case ((startcyc+1)&0xFF):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2398 OUTPUT_PIXEL_MODE4((startcyc+1)&0xFF)\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2399 if (column & 3) {\ |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2400 scan_sprite_table_mode4(context);\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2401 } else {\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2402 external_slot(context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2403 }\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2404 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2405 case ((startcyc+2)&0xFF):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2406 OUTPUT_PIXEL_MODE4((startcyc+2)&0xFF)\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2407 fetch_map_mode4(column, context->vcounter, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2408 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2409 case ((startcyc+3)&0xFF):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2410 OUTPUT_PIXEL_MODE4((startcyc+3)&0xFF)\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2411 render_map_mode4(context->vcounter, column, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2412 CHECK_LIMIT |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2413 |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2414 #define CHECK_LIMIT_HSYNC(slot) \ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2415 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2416 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2417 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2418 } else {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2419 context->cycles += slot_cycles;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2420 }\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2421 if (slot == 182) {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2422 context->hslot = 229;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2423 } else {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2424 context->hslot++;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2425 }\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2426 CHECK_ONLY |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
822
diff
changeset
|
2427 |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2428 #define SPRITE_RENDER_H40(slot) \ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2429 case slot:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2430 OUTPUT_PIXEL_H40(slot)\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2431 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2432 advance_output_line(context);\ |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2433 if (!context->output) {\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2434 context->output = dummy_buffer;\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2435 }\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2436 }\ |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2437 if (slot == 168 || slot == 247 || slot == 248) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2438 render_border_garbage(\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2439 context,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2440 context->sprite_draw_list[context->cur_slot].address,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2441 context->tmp_buf_b,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2442 context->buf_b_off + (slot == 247 ? 0 : 8),\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2443 slot == 247 ? context->col_1 : context->col_2\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2444 );\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2445 if (slot == 248) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2446 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2447 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2448 }\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2449 } else if (slot == 243) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2450 render_border_garbage(\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2451 context,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2452 context->sprite_draw_list[context->cur_slot].address,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2453 context->tmp_buf_a,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2454 context->buf_a_off,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2455 context->col_1\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2456 );\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2457 } else if (slot == 169) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2458 draw_right_border(context);\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2459 }\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2460 render_sprite_cells( context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2461 scan_sprite_table(context->vcounter, context);\ |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2462 CHECK_LIMIT_HSYNC(slot) |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
822
diff
changeset
|
2463 |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2464 //Note that the line advancement check will fail if BG_START_SLOT is > 6 |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2465 //as we're bumping up against the hcounter jump |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2466 #define SPRITE_RENDER_H32(slot) \ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2467 case slot:\ |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2468 OUTPUT_PIXEL_H32(slot)\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2469 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2470 advance_output_line(context);\ |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2471 if (!context->output) {\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2472 context->output = dummy_buffer;\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2473 }\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2474 }\ |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2475 if (slot == 136 || slot == 247 || slot == 248) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2476 render_border_garbage(\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2477 context,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2478 context->sprite_draw_list[context->cur_slot].address,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2479 context->tmp_buf_b,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2480 context->buf_b_off + (slot == 247 ? 0 : 8),\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2481 slot == 247 ? context->col_1 : context->col_2\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2482 );\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2483 if (slot == 248) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2484 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2485 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2486 }\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2487 } else if (slot == 137) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2488 draw_right_border(context);\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2489 }\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2490 render_sprite_cells( context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2491 scan_sprite_table(context->vcounter, context);\ |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
2492 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2493 if (slot == 147) {\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2494 context->hslot = 233;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2495 } else {\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2496 context->hslot++;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2497 }\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2498 context->cycles += slot_cycles;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2499 CHECK_ONLY |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2500 |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2501 #define MODE4_CHECK_SLOT_LINE(slot) \ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2502 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2503 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2504 advance_output_line(context);\ |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2505 if (!context->output) {\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2506 context->output = dummy_buffer;\ |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2507 }\ |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2508 }\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2509 if ((slot) == 147) {\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2510 context->hslot = 233;\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2511 } else {\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2512 context->hslot++;\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2513 }\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2514 context->cycles += slot_cycles;\ |
1163
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2515 if ((slot+1) == LINE_CHANGE_MODE4) {\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2516 vdp_advance_line(context);\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2517 if (context->vcounter == 192) {\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2518 return;\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2519 }\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2520 }\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2521 CHECK_ONLY |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2522 |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2523 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment)) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2524 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2525 #define SPRITE_RENDER_H32_MODE4(slot) \ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2526 case slot:\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2527 OUTPUT_PIXEL_MODE4(slot)\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2528 read_sprite_x_mode4(context);\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2529 MODE4_CHECK_SLOT_LINE(slot)\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2530 case CALC_SLOT(slot, 1):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2531 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 1))\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2532 read_sprite_x_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2533 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2534 case CALC_SLOT(slot, 2):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2535 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 2))\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2536 fetch_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2537 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2538 case CALC_SLOT(slot, 3):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2539 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 3))\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2540 render_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2541 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2542 case CALC_SLOT(slot, 4):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2543 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 4))\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2544 fetch_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2545 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2546 case CALC_SLOT(slot, 5):\ |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
2547 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 5))\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2548 render_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2549 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5)) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2550 |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2551 static uint32_t dummy_buffer[LINEBUF_SIZE]; |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2552 static void vdp_h40_line(vdp_context * context) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2553 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2554 uint16_t address; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2555 uint32_t mask; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2556 uint32_t const slot_cycles = MCLKS_SLOT_H40; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2557 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2558 uint8_t test_layer = context->test_port >> 7 & 3; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2559 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2560 //165 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2561 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2562 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2563 //See note in vdp_h32 for why this was originally moved out of read_map_scroll |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2564 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2565 //pretty consistently |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2566 context->vscroll_latch[0] = context->vsram[0]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2567 context->vscroll_latch[1] = context->vsram[1]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2568 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2569 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2570 //166 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2571 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2572 //167 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2573 context->sprite_index = 0x80; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2574 context->slot_counter = 0; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2575 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2576 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2577 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2578 context->tmp_buf_b, context->buf_b_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2579 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2580 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2581 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2582 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2583 //168 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2584 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2585 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2586 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2587 context->tmp_buf_b, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2588 context->buf_b_off + 8, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2589 context->col_2 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2590 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2591 //Do palette lookup for end of previous line |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2592 uint8_t *src = context->compositebuf + (LINE_CHANGE_H40 - BG_START_SLOT) *2; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2593 uint32_t *dst = context->output + (LINE_CHANGE_H40 - BG_START_SLOT) *2; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2594 if (test_layer) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2595 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2596 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2597 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2598 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2599 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2600 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2601 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2602 if (*src & 0x3F) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2603 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2604 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2605 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2606 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2607 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2608 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2609 advance_output_line(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2610 //168-242 (inclusive) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2611 for (int i = 0; i < 28; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2612 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2613 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2614 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2615 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2616 //243 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2617 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2618 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2619 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2620 context->tmp_buf_a, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2621 context->buf_a_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2622 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2623 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2624 //244 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2625 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2626 mask = 0; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2627 if (context->regs[REG_MODE_3] & 0x2) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2628 mask |= 0xF8; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2629 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2630 if (context->regs[REG_MODE_3] & 0x1) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2631 mask |= 0x7; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2632 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2633 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2634 address += (context->vcounter & mask) * 4; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2635 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2636 context->hscroll_a_fine = context->hscroll_a & 0xF; |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2637 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2638 context->hscroll_b_fine = context->hscroll_b & 0xF; |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2639 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2640 //243-246 inclusive |
1877
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2641 for (int i = 0; i < 3; i++) |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2642 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2643 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2644 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2645 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2646 //247 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2647 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2648 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2649 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2650 context->tmp_buf_b, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2651 context->buf_b_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2652 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2653 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2654 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2655 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2656 //248 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2657 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2658 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2659 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2660 context->tmp_buf_b, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2661 context->buf_b_off + 8, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2662 context->col_2 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2663 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2664 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2665 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2666 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2667 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2668 //250 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2669 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2670 scan_sprite_table(context->vcounter, context); |
1877
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2671 //251 |
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2672 scan_sprite_table(context->vcounter, context);//Just a guess |
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2673 //252 |
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2674 scan_sprite_table(context->vcounter, context);//Just a guess |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2675 //254 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2676 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2677 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2678 //255 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2679 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2680 context->flags |= FLAG_DOT_OFLOW; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2681 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2682 scan_sprite_table(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2683 //0 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2684 scan_sprite_table(context->vcounter, context);//Just a guess |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2685 //seems like the sprite table scan fills a shift register |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2686 //values are FIFO, but unused slots precede used slots |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2687 //so we set cur_slot to slot_counter and let it wrap around to |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2688 //the beginning of the list |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2689 context->cur_slot = context->slot_counter; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2690 context->sprite_x_offset = 0; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2691 context->sprite_draws = MAX_SPRITES_LINE; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2692 //background planes and layer compositing |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2693 for (int col = 0; col < 42; col+=2) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2694 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2695 read_map_scroll_a(col, context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2696 render_map_1(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2697 render_map_2(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2698 read_map_scroll_b(col, context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2699 render_map_3(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2700 render_map_output(context->vcounter, col, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2701 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2702 //sprite rendering phase 2 |
1877
9486236f28ac
Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents:
1875
diff
changeset
|
2703 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2704 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2705 read_sprite_x(context->vcounter, context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2706 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2707 //163 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2708 context->cur_slot = MAX_SPRITES_LINE-1; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2709 memset(context->linebuf, 0, LINEBUF_SIZE); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2710 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2711 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2712 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2713 context->tmp_buf_a, context->buf_a_off, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2714 context->col_1 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2715 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2716 context->flags &= ~FLAG_MASKED; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2717 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2718 //164 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2719 render_border_garbage( |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2720 context, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2721 context->sprite_draw_list[context->cur_slot].address, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2722 context->tmp_buf_a, context->buf_a_off + 8, |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2723 context->col_2 |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2724 ); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2725 render_sprite_cells(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2726 context->cycles += MCLKS_LINE; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2727 vdp_advance_line(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2728 src = context->compositebuf; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2729 dst = context->output; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2730 if (test_layer) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2731 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2732 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2733 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2734 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2735 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2736 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++) |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2737 { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2738 if (*src & 0x3F) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2739 *(dst++) = context->colors[*(src++)]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2740 } else { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2741 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex]; |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2742 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2743 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2744 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2745 } |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
2746 static void vdp_h40(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2747 { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2748 uint16_t address; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2749 uint32_t mask; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2750 uint32_t const slot_cycles = MCLKS_SLOT_H40; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2751 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2752 uint8_t test_layer = context->test_port >> 7 & 3; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2753 if (!context->output) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2754 //This shouldn't happen normally, but it can theoretically |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2755 //happen when doing border busting |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2756 context->output = dummy_buffer; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2757 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2758 switch(context->hslot) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2759 { |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2760 for (;;) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2761 { |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2762 case 165: |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2763 //only consider doing a line at a time if the FIFO is empty, there are no pending reads and there is no DMA running |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
2764 if (context->fifo_read == -1 && !(context->flags & FLAG_DMA_RUN) && ((context->cd & 1) || (context->flags & FLAG_READ_FETCHED))) { |
1874
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2765 while (target_cycles - context->cycles >= MCLKS_LINE && context->state != PREPARING && context->vcounter != context->inactive_start) { |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2766 vdp_h40_line(context); |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2767 } |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2768 CHECK_ONLY |
cae2b55d683f
Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents:
1873
diff
changeset
|
2769 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2770 OUTPUT_PIXEL(165) |
1432
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2771 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2772 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2773 //See note in vdp_h32 for why this was originally moved out of read_map_scroll |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2774 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232 |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2775 //pretty consistently |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2776 context->vscroll_latch[0] = context->vsram[0]; |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2777 context->vscroll_latch[1] = context->vsram[1]; |
5e7e6d9b79ff
Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents:
1431
diff
changeset
|
2778 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2779 if (context->state == PREPARING) { |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2780 external_slot(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2781 } else { |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2782 render_sprite_cells(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2783 } |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2784 CHECK_LIMIT |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2785 case 166: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2786 OUTPUT_PIXEL(166) |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2787 if (context->state == PREPARING) { |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2788 external_slot(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2789 } else { |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2790 render_sprite_cells(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2791 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2792 if (context->vcounter == context->inactive_start) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2793 context->hslot++; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2794 context->cycles += slot_cycles; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2795 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2796 } |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2797 CHECK_LIMIT |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2798 //sprite attribute table scan starts |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2799 case 167: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2800 OUTPUT_PIXEL(167) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2801 context->sprite_index = 0x80; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2802 context->slot_counter = 0; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2803 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2804 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2805 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2806 context->tmp_buf_b, context->buf_b_off, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2807 context->col_1 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2808 ); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2809 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2810 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2811 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2812 SPRITE_RENDER_H40(168) |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2813 SPRITE_RENDER_H40(169) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2814 SPRITE_RENDER_H40(170) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2815 SPRITE_RENDER_H40(171) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2816 SPRITE_RENDER_H40(172) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2817 SPRITE_RENDER_H40(173) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2818 SPRITE_RENDER_H40(174) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2819 SPRITE_RENDER_H40(175) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2820 SPRITE_RENDER_H40(176) |
1365
6dd2c3edd0b5
Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2
Michael Pavone <pavone@retrodev.com>
parents:
1362
diff
changeset
|
2821 SPRITE_RENDER_H40(177)//End of border? |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2822 SPRITE_RENDER_H40(178) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2823 SPRITE_RENDER_H40(179) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2824 SPRITE_RENDER_H40(180) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2825 SPRITE_RENDER_H40(181) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2826 SPRITE_RENDER_H40(182) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2827 SPRITE_RENDER_H40(229) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2828 //!HSYNC asserted |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2829 SPRITE_RENDER_H40(230) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2830 SPRITE_RENDER_H40(231) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2831 case 232: |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2832 external_slot(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2833 CHECK_LIMIT_HSYNC(232) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2834 SPRITE_RENDER_H40(233) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2835 SPRITE_RENDER_H40(234) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2836 SPRITE_RENDER_H40(235) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2837 SPRITE_RENDER_H40(236) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2838 SPRITE_RENDER_H40(237) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2839 SPRITE_RENDER_H40(238) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2840 SPRITE_RENDER_H40(239) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2841 SPRITE_RENDER_H40(240) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2842 SPRITE_RENDER_H40(241) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2843 SPRITE_RENDER_H40(242) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2844 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2845 case 244: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2846 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2847 mask = 0; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2848 if (context->regs[REG_MODE_3] & 0x2) { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2849 mask |= 0xF8; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2850 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2851 if (context->regs[REG_MODE_3] & 0x1) { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2852 mask |= 0x7; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2853 } |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2854 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2855 address += (context->vcounter & mask) * 4; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2856 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2857 context->hscroll_a_fine = context->hscroll_a & 0xF; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2858 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
2859 context->hscroll_b_fine = context->hscroll_b & 0xF; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2860 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
2861 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2862 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2863 context->cycles += h40_hsync_cycles[14]; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2864 CHECK_ONLY //provides "garbage" for border when plane A selected |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2865 //!HSYNC high |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2866 SPRITE_RENDER_H40(245) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2867 SPRITE_RENDER_H40(246) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2868 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2869 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2870 case 249: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2871 read_map_scroll_a(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2872 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2873 SPRITE_RENDER_H40(250) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2874 case 251: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2875 render_map_1(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2876 scan_sprite_table(context->vcounter, context);//Just a guess |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2877 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2878 case 252: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2879 render_map_2(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2880 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2881 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2882 case 253: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2883 read_map_scroll_b(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2884 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2885 SPRITE_RENDER_H40(254) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2886 case 255: |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2887 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2888 context->flags |= FLAG_DOT_OFLOW; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2889 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2890 render_map_3(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2891 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2892 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2893 case 0: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2894 render_map_output(context->vcounter, 0, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2895 scan_sprite_table(context->vcounter, context);//Just a guess |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2896 //seems like the sprite table scan fills a shift register |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2897 //values are FIFO, but unused slots precede used slots |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2898 //so we set cur_slot to slot_counter and let it wrap around to |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2899 //the beginning of the list |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2900 context->cur_slot = context->slot_counter; |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
2901 context->sprite_x_offset = 0; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2902 context->sprite_draws = MAX_SPRITES_LINE; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2903 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2904 COLUMN_RENDER_BLOCK(2, 1) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2905 COLUMN_RENDER_BLOCK(4, 9) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2906 COLUMN_RENDER_BLOCK(6, 17) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2907 COLUMN_RENDER_BLOCK_REFRESH(8, 25) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2908 COLUMN_RENDER_BLOCK(10, 33) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2909 COLUMN_RENDER_BLOCK(12, 41) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2910 COLUMN_RENDER_BLOCK(14, 49) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2911 COLUMN_RENDER_BLOCK_REFRESH(16, 57) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2912 COLUMN_RENDER_BLOCK(18, 65) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2913 COLUMN_RENDER_BLOCK(20, 73) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2914 COLUMN_RENDER_BLOCK(22, 81) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2915 COLUMN_RENDER_BLOCK_REFRESH(24, 89) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2916 COLUMN_RENDER_BLOCK(26, 97) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2917 COLUMN_RENDER_BLOCK(28, 105) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2918 COLUMN_RENDER_BLOCK(30, 113) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2919 COLUMN_RENDER_BLOCK_REFRESH(32, 121) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2920 COLUMN_RENDER_BLOCK(34, 129) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2921 COLUMN_RENDER_BLOCK(36, 137) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2922 COLUMN_RENDER_BLOCK(38, 145) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2923 COLUMN_RENDER_BLOCK_REFRESH(40, 153) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2924 case 161: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2925 OUTPUT_PIXEL(161) |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2926 external_slot(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2927 CHECK_LIMIT |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2928 case 162: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2929 OUTPUT_PIXEL(162) |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2930 external_slot(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2931 CHECK_LIMIT |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2932 //sprite render to line buffer starts |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2933 case 163: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2934 OUTPUT_PIXEL(163) |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2935 context->cur_slot = MAX_SPRITES_LINE-1; |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2936 memset(context->linebuf, 0, LINEBUF_SIZE); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2937 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2938 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2939 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2940 context->tmp_buf_a, context->buf_a_off, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2941 context->col_1 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2942 ); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
2943 context->flags &= ~FLAG_MASKED; |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2944 render_sprite_cells(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2945 CHECK_LIMIT |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2946 case 164: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2947 OUTPUT_PIXEL(164) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2948 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2949 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2950 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2951 context->tmp_buf_a, context->buf_a_off + 8, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2952 context->col_2 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2953 ); |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2954 render_sprite_cells(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2955 if (context->flags & FLAG_DMA_RUN) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2956 run_dma_src(context, -1); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2957 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2958 context->hslot++; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2959 context->cycles += slot_cycles; |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2960 vdp_advance_line(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2961 CHECK_ONLY |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2962 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2963 default: |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2964 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2965 context->cycles += slot_cycles; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2966 return; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2967 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2968 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2969 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
2970 static void vdp_h32(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2971 { |
37 | 2972 uint16_t address; |
2973 uint32_t mask; | |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2974 uint32_t const slot_cycles = MCLKS_SLOT_H32; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2975 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2976 uint8_t test_layer = context->test_port >> 7 & 3; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2977 if (!context->output) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2978 //This shouldn't happen normally, but it can theoretically |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2979 //happen when doing border busting |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2980 context->output = dummy_buffer; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
2981 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2982 switch(context->hslot) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2983 { |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2984 for (;;) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2985 { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2986 case 133: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2987 OUTPUT_PIXEL(133) |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2988 if (context->state == PREPARING) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2989 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2990 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2991 render_sprite_cells(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2992 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2993 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2994 case 134: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
2995 OUTPUT_PIXEL(134) |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2996 if (context->state == PREPARING) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2997 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2998 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2999 render_sprite_cells(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3000 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3001 if (context->vcounter == context->inactive_start) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3002 context->hslot++; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3003 context->cycles += slot_cycles; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3004 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3005 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3006 CHECK_LIMIT |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3007 //sprite attribute table scan starts |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3008 case 135: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3009 OUTPUT_PIXEL(135) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3010 context->sprite_index = 0x80; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3011 context->slot_counter = 0; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3012 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3013 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3014 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3015 context->tmp_buf_b, context->buf_b_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3016 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3017 ); |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3018 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3019 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3020 CHECK_LIMIT |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3021 SPRITE_RENDER_H32(136) |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3022 SPRITE_RENDER_H32(137) |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3023 SPRITE_RENDER_H32(138) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3024 SPRITE_RENDER_H32(139) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3025 SPRITE_RENDER_H32(140) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3026 SPRITE_RENDER_H32(141) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3027 SPRITE_RENDER_H32(142) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3028 SPRITE_RENDER_H32(143) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3029 SPRITE_RENDER_H32(144) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3030 case 145: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3031 OUTPUT_PIXEL(145) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3032 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3033 CHECK_LIMIT |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3034 SPRITE_RENDER_H32(146) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3035 SPRITE_RENDER_H32(147) |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3036 SPRITE_RENDER_H32(233) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3037 SPRITE_RENDER_H32(234) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3038 SPRITE_RENDER_H32(235) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3039 //HSYNC start |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3040 SPRITE_RENDER_H32(236) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3041 SPRITE_RENDER_H32(237) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3042 SPRITE_RENDER_H32(238) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3043 SPRITE_RENDER_H32(239) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3044 SPRITE_RENDER_H32(240) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3045 SPRITE_RENDER_H32(241) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3046 SPRITE_RENDER_H32(242) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3047 case 243: |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3048 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3049 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3050 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3051 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3052 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3053 //to confirm that one way or another |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3054 context->vscroll_latch[0] = context->vsram[0]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3055 context->vscroll_latch[1] = context->vsram[1]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
3056 } |
37 | 3057 external_slot(context); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3058 //provides "garbage" for border when plane A selected |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3059 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3060 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3061 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3062 context->tmp_buf_a, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3063 context->buf_a_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3064 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3065 ); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3066 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3067 case 244: |
37 | 3068 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
3069 mask = 0; | |
3070 if (context->regs[REG_MODE_3] & 0x2) { | |
3071 mask |= 0xF8; | |
3072 } | |
3073 if (context->regs[REG_MODE_3] & 0x1) { | |
3074 mask |= 0x7; | |
3075 } | |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3076 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3077 address += (context->vcounter & mask) * 4; |
37 | 3078 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
1885
4178ce857e87
Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents:
1884
diff
changeset
|
3079 context->hscroll_a_fine = context->hscroll_a & 0xF; |
37 | 3080 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
1888
bd60e74fd173
Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents:
1887
diff
changeset
|
3081 context->hscroll_b_fine = context->hscroll_b & 0xF; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3082 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3083 CHECK_LIMIT //provides "garbage" for border when plane A selected |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3084 SPRITE_RENDER_H32(245) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3085 SPRITE_RENDER_H32(246) |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3086 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3087 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected |
37 | 3088 //!HSYNC high |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3089 case 249: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3090 read_map_scroll_a(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3091 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3092 SPRITE_RENDER_H32(250) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3093 case 251: |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3094 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3095 context->flags |= FLAG_DOT_OFLOW; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3096 } |
37 | 3097 render_map_1(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3098 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3099 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3100 case 252: |
37 | 3101 render_map_2(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3102 scan_sprite_table(context->vcounter, context);//Just a guess |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3103 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3104 case 253: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3105 read_map_scroll_b(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3106 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3107 case 254: |
37 | 3108 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3109 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3110 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3111 case 255: |
37 | 3112 render_map_3(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3113 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3114 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3115 case 0: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3116 render_map_output(context->vcounter, 0, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3117 scan_sprite_table(context->vcounter, context);//Just a guess |
37 | 3118 //reverse context slot counter so it counts the number of sprite slots |
3119 //filled rather than the number of available slots | |
3120 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; | |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3121 context->cur_slot = context->slot_counter; |
1873
041a381b9f0d
Fix regression in sprite rendering in H32 mode
Michael Pavone <pavone@retrodev.com>
parents:
1871
diff
changeset
|
3122 context->sprite_x_offset = 0; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3123 context->sprite_draws = MAX_SPRITES_LINE_H32; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3124 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3125 COLUMN_RENDER_BLOCK(2, 1) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3126 COLUMN_RENDER_BLOCK(4, 9) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3127 COLUMN_RENDER_BLOCK(6, 17) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3128 COLUMN_RENDER_BLOCK_REFRESH(8, 25) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3129 COLUMN_RENDER_BLOCK(10, 33) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3130 COLUMN_RENDER_BLOCK(12, 41) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3131 COLUMN_RENDER_BLOCK(14, 49) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3132 COLUMN_RENDER_BLOCK_REFRESH(16, 57) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3133 COLUMN_RENDER_BLOCK(18, 65) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3134 COLUMN_RENDER_BLOCK(20, 73) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3135 COLUMN_RENDER_BLOCK(22, 81) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3136 COLUMN_RENDER_BLOCK_REFRESH(24, 89) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3137 COLUMN_RENDER_BLOCK(26, 97) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3138 COLUMN_RENDER_BLOCK(28, 105) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3139 COLUMN_RENDER_BLOCK(30, 113) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3140 COLUMN_RENDER_BLOCK_REFRESH(32, 121) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3141 case 129: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3142 OUTPUT_PIXEL(129) |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3143 external_slot(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3144 CHECK_LIMIT |
1269
ff8e29eeb1ec
Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1267
diff
changeset
|
3145 case 130: { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3146 OUTPUT_PIXEL(130) |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3147 external_slot(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3148 CHECK_LIMIT |
1269
ff8e29eeb1ec
Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1267
diff
changeset
|
3149 } |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3150 //sprite render to line buffer starts |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3151 case 131: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3152 OUTPUT_PIXEL(131) |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3153 context->cur_slot = MAX_SPRITES_LINE_H32-1; |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3154 memset(context->linebuf, 0, LINEBUF_SIZE); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3155 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3156 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3157 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3158 context->tmp_buf_a, context->buf_a_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3159 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3160 ); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3161 context->flags &= ~FLAG_MASKED; |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3162 render_sprite_cells(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3163 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3164 case 132: |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3165 OUTPUT_PIXEL(132) |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3166 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3167 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3168 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3169 context->tmp_buf_a, context->buf_a_off + 8, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3170 context->col_2 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
3171 ); |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3172 render_sprite_cells(context); |
1173
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3173 if (context->flags & FLAG_DMA_RUN) { |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3174 run_dma_src(context, -1); |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3175 } |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3176 context->hslot++; |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3177 context->cycles += slot_cycles; |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
3178 vdp_advance_line(context); |
1173
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
3179 CHECK_ONLY |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3180 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3181 default: |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3182 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
3183 context->cycles += MCLKS_SLOT_H32; |
503
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
3184 } |
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
3185 } |
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
3186 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3187 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3188 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3189 uint16_t address; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3190 uint32_t mask; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3191 uint32_t const slot_cycles = MCLKS_SLOT_H32; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3192 uint8_t bgindex = 0x10 | (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3193 uint8_t test_layer = context->test_port >> 7 & 3; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3194 if (!context->output) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3195 //This shouldn't happen normally, but it can theoretically |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3196 //happen when doing border busting |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3197 context->output = dummy_buffer; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3198 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3199 switch(context->hslot) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3200 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3201 for (;;) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3202 { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3203 //sprite rendering starts |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3204 SPRITE_RENDER_H32_MODE4(137) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3205 SPRITE_RENDER_H32_MODE4(143) |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3206 case 234: |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3207 external_slot(context); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3208 CHECK_LIMIT |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3209 case 235: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3210 external_slot(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3211 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3212 //!HSYNC low |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3213 case 236: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3214 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3215 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3216 case 237: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3217 external_slot(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3218 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3219 case 238: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3220 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3221 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3222 SPRITE_RENDER_H32_MODE4(239) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3223 SPRITE_RENDER_H32_MODE4(245) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3224 case 251: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3225 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3226 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3227 case 252: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3228 external_slot(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3229 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3230 context->hscroll_a = 0; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3231 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3232 context->hscroll_a = context->regs[REG_X_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3233 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3234 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3235 case 253: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3236 context->sprite_index = 0; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3237 context->slot_counter = MAX_DRAWS_H32_MODE4; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3238 scan_sprite_table_mode4(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3239 CHECK_LIMIT |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3240 case 254: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3241 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3242 CHECK_LIMIT |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3243 case 255: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3244 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3245 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3246 case 0: { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3247 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3248 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3249 } |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3250 case 1: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
3251 scan_sprite_table_mode4(context); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3252 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3253 case 2: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3254 scan_sprite_table_mode4(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3255 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3256 case 3: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3257 scan_sprite_table_mode4(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3258 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3259 case 4: { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3260 scan_sprite_table_mode4(context); |
1121
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
3261 context->buf_a_off = 8; |
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
3262 memset(context->tmp_buf_a, 0, 8); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3263 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3264 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3265 COLUMN_RENDER_BLOCK_MODE4(0, 5) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3266 COLUMN_RENDER_BLOCK_MODE4(1, 9) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3267 COLUMN_RENDER_BLOCK_MODE4(2, 13) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3268 COLUMN_RENDER_BLOCK_MODE4(3, 17) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3269 COLUMN_RENDER_BLOCK_MODE4(4, 21) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3270 COLUMN_RENDER_BLOCK_MODE4(5, 25) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3271 COLUMN_RENDER_BLOCK_MODE4(6, 29) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3272 COLUMN_RENDER_BLOCK_MODE4(7, 33) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3273 COLUMN_RENDER_BLOCK_MODE4(8, 37) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3274 COLUMN_RENDER_BLOCK_MODE4(9, 41) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3275 COLUMN_RENDER_BLOCK_MODE4(10, 45) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3276 COLUMN_RENDER_BLOCK_MODE4(11, 49) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3277 COLUMN_RENDER_BLOCK_MODE4(12, 53) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3278 COLUMN_RENDER_BLOCK_MODE4(13, 57) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3279 COLUMN_RENDER_BLOCK_MODE4(14, 61) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3280 COLUMN_RENDER_BLOCK_MODE4(15, 65) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3281 COLUMN_RENDER_BLOCK_MODE4(16, 69) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3282 COLUMN_RENDER_BLOCK_MODE4(17, 73) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3283 COLUMN_RENDER_BLOCK_MODE4(18, 77) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3284 COLUMN_RENDER_BLOCK_MODE4(19, 81) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3285 COLUMN_RENDER_BLOCK_MODE4(20, 85) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3286 COLUMN_RENDER_BLOCK_MODE4(21, 89) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3287 COLUMN_RENDER_BLOCK_MODE4(22, 93) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3288 COLUMN_RENDER_BLOCK_MODE4(23, 97) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3289 COLUMN_RENDER_BLOCK_MODE4(24, 101) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3290 COLUMN_RENDER_BLOCK_MODE4(25, 105) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3291 COLUMN_RENDER_BLOCK_MODE4(26, 109) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3292 COLUMN_RENDER_BLOCK_MODE4(27, 113) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3293 COLUMN_RENDER_BLOCK_MODE4(28, 117) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3294 COLUMN_RENDER_BLOCK_MODE4(29, 121) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3295 COLUMN_RENDER_BLOCK_MODE4(30, 125) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3296 COLUMN_RENDER_BLOCK_MODE4(31, 129) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3297 case 133: |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
3298 OUTPUT_PIXEL_MODE4(133) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3299 external_slot(context); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3300 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3301 case 134: |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
3302 OUTPUT_PIXEL_MODE4(134) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3303 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3304 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3305 case 135: |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
3306 OUTPUT_PIXEL_MODE4(135) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3307 external_slot(context); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3308 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3309 case 136: { |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
3310 OUTPUT_PIXEL_MODE4(136) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3311 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3312 //set things up for sprite rendering in the next slot |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3313 memset(context->linebuf, 0, LINEBUF_SIZE); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3314 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3315 context->sprite_draws = MAX_DRAWS_H32_MODE4; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3316 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3317 }} |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3318 default: |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3319 context->hslot++; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3320 context->cycles += MCLKS_SLOT_H32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3321 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3322 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3323 |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3324 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer) |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3325 { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3326 uint8_t max_slot = is_h40 ? 169 : 136; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3327 if (context->hslot > max_slot) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3328 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3329 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3330 uint8_t *dst = context->compositebuf + (context->hslot >> 3) * SCROLL_BUFFER_DRAW; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3331 int32_t len; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3332 uint32_t src_off; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3333 if (context->hslot) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3334 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3335 src_off = 0; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3336 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3337 } else { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3338 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3339 len = BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3340 } |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3341 uint8_t *src = NULL; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3342 if (test_layer == 2) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3343 //plane A |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3344 src_off += context->buf_a_off - (context->hscroll_a & 0xF); |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3345 src = context->tmp_buf_a; |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
3346 } else if (test_layer == 3){ |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3347 //plane B |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3348 src_off += context->buf_b_off - (context->hscroll_b & 0xF); |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3349 src = context->tmp_buf_b; |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
3350 } else { |
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
3351 //sprite layer |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3352 memset(dst, 0, len); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3353 dst += len; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3354 len = 0; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3355 } |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3356 if (src) { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3357 for (; len >=0; len--, dst++, src_off++) |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3358 { |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3359 *dst = src[src_off & SCROLL_BUFFER_MASK] & 0x3F; |
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3360 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3361 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3362 context->done_composite = dst; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3363 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3364 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3365 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3366 |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3367 static void check_switch_inactive(vdp_context *context, uint8_t is_h40) |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3368 { |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3369 //technically the second hcounter check should be different for H40, but this is probably close enough for now |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3370 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) || context->hslot < 133)) { |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3371 context->state = INACTIVE; |
2010
19957e7353a4
Fix a regression in sprite rendering that could cause garbage to be displayed on first line
Mike Pavone <pavone@retrodev.com>
parents:
2009
diff
changeset
|
3372 context->cur_slot = MAX_SPRITES_LINE-1; |
19957e7353a4
Fix a regression in sprite rendering that could cause garbage to be displayed on first line
Mike Pavone <pavone@retrodev.com>
parents:
2009
diff
changeset
|
3373 context->sprite_x_offset = 0; |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3374 } |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3375 } |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3376 |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3377 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3378 { |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3379 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3380 uint8_t index_reset_value, max_draws, max_sprites; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3381 uint16_t vint_line, active_line; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3382 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3383 if (mode_5) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3384 if (is_h40) { |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3385 latch_slot = 165; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3386 buf_clear_slot = 163; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3387 index_reset_slot = 167; |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3388 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3389 max_draws = MAX_SPRITES_LINE-1; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3390 max_sprites = MAX_SPRITES_LINE; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3391 index_reset_value = 0x80; |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3392 vint_slot = VINT_SLOT_H40; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3393 line_change = LINE_CHANGE_H40; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3394 jump_start = 182; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3395 jump_dest = 229; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3396 } else { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3397 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
3398 max_draws = MAX_SPRITES_LINE_H32-1; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3399 max_sprites = MAX_SPRITES_LINE_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3400 buf_clear_slot = 128; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3401 index_reset_slot = 132; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3402 index_reset_value = 0x80; |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3403 vint_slot = VINT_SLOT_H32; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3404 line_change = LINE_CHANGE_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3405 jump_start = 147; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3406 jump_dest = 233; |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3407 latch_slot = 243; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3408 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3409 vint_line = context->inactive_start; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3410 active_line = 0x1FF; |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3411 if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3412 latch_slot = 220; |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3413 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3414 } else { |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3415 latch_slot = 220; |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3416 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3417 max_draws = MAX_DRAWS_H32_MODE4; |
1278
34d3cb05014d
Fix VDP buffer overrun that was causing sprite flickering in some games
Michael Pavone <pavone@retrodev.com>
parents:
1273
diff
changeset
|
3418 max_sprites = 8; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3419 buf_clear_slot = 136; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3420 index_reset_slot = 253; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3421 index_reset_value = 0; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3422 vint_line = context->inactive_start + 1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3423 vint_slot = VINT_SLOT_MODE4; |
1177
67e0462c30ce
Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents:
1175
diff
changeset
|
3424 line_change = LINE_CHANGE_MODE4; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3425 jump_start = 147; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3426 jump_dest = 233; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3427 if (context->regs[REG_MODE_1] & BIT_MODE_4) { |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
3428 active_line = 0x1FF; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3429 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3430 //never active unless either mode 4 or mode 5 is turned on |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3431 active_line = 0x200; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3432 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3433 } |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3434 uint32_t *dst; |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3435 uint8_t *debug_dst; |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3436 if (context->output && context->hslot >= BG_START_SLOT && context->hslot < bg_end_slot) { |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3437 dst = context->output + 2 * (context->hslot - BG_START_SLOT); |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3438 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT); |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3439 } else { |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3440 dst = NULL; |
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3441 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3442 |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3443 uint8_t test_layer = context->test_port >> 7 & 3; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3444 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3445 while(context->cycles < target_cycles) |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3446 { |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3447 check_switch_inactive(context, is_h40); |
1834
304d47a5c67f
Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents:
1821
diff
changeset
|
3448 if (context->hslot == BG_START_SLOT && context->output) { |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3449 dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3450 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT); |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3451 } else if (context->hslot == bg_end_slot) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
3452 advance_output_line(context); |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3453 dst = NULL; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3454 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3455 //this will need some tweaking to properly interact with 128K mode, |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3456 //but this should be good enough for now |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3457 context->serial_address += 1024; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3458 if (test_layer) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3459 switch (context->hslot & 7) |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3460 { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3461 case 3: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3462 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3463 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3464 case 4: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3465 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3466 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3467 case 7: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3468 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3469 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3470 case 0: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3471 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2); |
1871
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3472 break; |
e75b788caedd
Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents:
1869
diff
changeset
|
3473 case 1: |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3474 inactive_test_output(context, is_h40, test_layer); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3475 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3476 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
3477 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3478 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3479 if (context->hslot == buf_clear_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3480 if (mode_5) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3481 context->cur_slot = max_draws; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3482 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3483 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3484 context->sprite_draws = MAX_DRAWS_H32_MODE4; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3485 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3486 memset(context->linebuf, 0, LINEBUF_SIZE); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3487 } else if (context->hslot == index_reset_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3488 context->sprite_index = index_reset_value; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3489 context->slot_counter = mode_5 ? 0 : max_sprites; |
1454
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3490 } else if (context->hslot == latch_slot) { |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3491 //it seems unlikely to me that vscroll actually gets latched when the display is off |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3492 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3493 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3494 //(which disables the display and ends up with garbage if vscroll is latched during that period) |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3495 //without it. Some more tests are definitely needed |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3496 context->vscroll_latch[0] = context->vsram[0]; |
a664bade4b29
Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents:
1437
diff
changeset
|
3497 context->vscroll_latch[1] = context->vsram[1]; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3498 } else if (context->vcounter == vint_line && context->hslot == vint_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3499 context->flags2 |= FLAG2_VINT_PENDING; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3500 context->pending_vint_start = context->cycles; |
1436
40c3be9f1af7
Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents:
1432
diff
changeset
|
3501 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) { |
40c3be9f1af7
Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents:
1432
diff
changeset
|
3502 context->flags2 ^= FLAG2_EVEN_FIELD; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3503 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3504 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3505 if (dst) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3506 uint8_t bg_index; |
1894
55d034719345
Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents:
1891
diff
changeset
|
3507 uint32_t bg_color; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3508 if (mode_5) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3509 bg_index = context->regs[REG_BG_COLOR] & 0x3F; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3510 bg_color = context->colors[bg_index]; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3511 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3512 bg_index = 0x10 + (context->regs[REG_BG_COLOR] & 0xF); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3513 bg_color = context->colors[MODE4_OFFSET + bg_index]; |
1913
2c742812bcbb
Fix regression at the very start of The Revenge of Shinobi
Michael Pavone <pavone@retrodev.com>
parents:
1906
diff
changeset
|
3514 } else { |
2c742812bcbb
Fix regression at the very start of The Revenge of Shinobi
Michael Pavone <pavone@retrodev.com>
parents:
1906
diff
changeset
|
3515 bg_color = render_map_color(0, 0, 0); |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3516 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3517 if (context->done_composite) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3518 uint8_t pixel = context->compositebuf[dst-context->output]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3519 if (!(pixel & 0x3F | test_layer)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3520 pixel = pixel & 0xC0 | bg_index; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3521 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3522 *(dst++) = context->colors[pixel]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3523 if ((dst - context->output) == (context->done_composite - context->compositebuf)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3524 context->done_composite = NULL; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3525 memset(context->compositebuf, 0, sizeof(context->compositebuf)); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3526 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3527 } else { |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3528 *(dst++) = bg_color; |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3529 *(debug_dst++) = DBG_SRC_BG; |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3530 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3531 if (context->done_composite) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3532 uint8_t pixel = context->compositebuf[dst-context->output]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3533 if (!(pixel & 0x3F | test_layer)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3534 pixel = pixel & 0xC0 | bg_index; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3535 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3536 *(dst++) = context->colors[pixel]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3537 if ((dst - context->output) == (context->done_composite - context->compositebuf)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3538 context->done_composite = NULL; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3539 memset(context->compositebuf, 0, sizeof(context->compositebuf)); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3540 } |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3541 } else { |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3542 *(dst++) = bg_color; |
1644
cf4e387a8db6
Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1643
diff
changeset
|
3543 *(debug_dst++) = DBG_SRC_BG; |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
3544 } |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3545 |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3546 if (context->hslot == (bg_end_slot-1)) { |
1821
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3547 if (context->done_composite) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3548 uint8_t pixel = context->compositebuf[dst-context->output]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3549 if (!(pixel & 0x3F | test_layer)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3550 pixel = pixel & 0xC0 | bg_index; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3551 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3552 *(dst++) = context->colors[pixel]; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3553 if ((dst - context->output) == (context->done_composite - context->compositebuf)) { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3554 context->done_composite = NULL; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3555 memset(context->compositebuf, 0, sizeof(context->compositebuf)); |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3556 } |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3557 } else { |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3558 *(dst++) = bg_color; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3559 *(debug_dst++) = DBG_SRC_BG; |
4f3443ecb6d6
Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1785
diff
changeset
|
3560 } |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
3561 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3562 } |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3563 |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3564 if (!is_refresh(context, context->hslot)) { |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3565 external_slot(context); |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3566 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) { |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3567 run_dma_src(context, context->hslot); |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3568 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3569 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
3570 |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3571 if (is_h40) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3572 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3573 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40]; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3574 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3575 context->cycles += MCLKS_SLOT_H40; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3576 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3577 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3578 context->cycles += MCLKS_SLOT_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3579 } |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3580 if (context->hslot == jump_start) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3581 context->hslot = jump_dest; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3582 } else { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3583 context->hslot++; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3584 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3585 if (context->hslot == line_change) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3586 vdp_advance_line(context); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3587 if (context->vcounter == active_line) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3588 context->state = PREPARING; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3589 return; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3590 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3591 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3592 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3593 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3594 |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3595 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3596 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3597 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3598 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3599 while(context->cycles < target_cycles) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3600 { |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
3601 check_switch_inactive(context, is_h40); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3602 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3603 if (is_active(context)) { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3604 if (mode_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3605 if (is_h40) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3606 vdp_h40(context, target_cycles); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3607 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3608 vdp_h32(context, target_cycles); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3609 } |
330
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
3610 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3611 vdp_h32_mode4(context, target_cycles); |
330
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
3612 } |
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
3613 } else { |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3614 vdp_inactive(context, target_cycles, is_h40, mode_5); |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3615 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3616 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3617 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3618 |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3619 void vdp_run_context(vdp_context *context, uint32_t target_cycles) |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3620 { |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3621 //TODO: Deal with H40 hsync shenanigans |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3622 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19; |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3623 if (target_cycles < slot_cyc) { |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3624 //avoid overflow |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3625 return; |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3626 } |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3627 vdp_run_context_full(context, target_cycles - slot_cyc); |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3628 } |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3629 |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3630 uint32_t vdp_run_to_vblank(vdp_context * context) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3631 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3632 uint32_t old_frame = context->frame; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3633 while (context->frame == old_frame) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3634 vdp_run_context_full(context, context->cycles + MCLKS_LINE); |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3635 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3636 return context->cycles; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3637 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
3638 |
75 | 3639 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles) |
3640 { | |
3641 for(;;) { | |
3642 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]; | |
3643 if (!dmalen) { | |
3644 dmalen = 0x10000; | |
3645 } | |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3646 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20); |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
3647 if ( |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3648 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
3649 || (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) { |
75 | 3650 //DMA copies take twice as long to complete since they require a read and a write |
3651 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word | |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
3652 //unless 128KB mode is enabled |
75 | 3653 min_dma_complete *= 2; |
3654 } | |
3655 min_dma_complete += context->cycles; | |
3656 if (target_cycles < min_dma_complete) { | |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3657 vdp_run_context_full(context, target_cycles); |
75 | 3658 return; |
3659 } else { | |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3660 vdp_run_context_full(context, min_dma_complete); |
75 | 3661 if (!(context->flags & FLAG_DMA_RUN)) { |
3662 return; | |
3663 } | |
3664 } | |
3665 } | |
3666 } | |
3667 | |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3668 static uint16_t get_ext_vcounter(vdp_context *context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3669 { |
1437
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3670 uint16_t line= context->vcounter; |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3671 if (context->regs[REG_MODE_4] & BIT_INTERLACE) { |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3672 if (context->double_res) { |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3673 line <<= 1; |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3674 } else { |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3675 line &= 0x1FE; |
da72344af3ff
Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents:
1436
diff
changeset
|
3676 } |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3677 if (line & 0x100) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3678 line |= 1; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3679 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3680 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3681 return line << 8; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3682 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3683 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3684 void vdp_latch_hv(vdp_context *context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3685 { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3686 context->hv_latch = context->hslot | get_ext_vcounter(context); |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3687 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3688 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3689 uint16_t vdp_hv_counter_read(vdp_context * context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3690 { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3691 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3692 return context->hv_latch; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3693 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3694 uint16_t hv; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3695 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3696 hv = context->hslot; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3697 } else { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3698 hv = context->hv_latch & 0xFF; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3699 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3700 hv |= get_ext_vcounter(context); |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3701 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3702 return hv; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3703 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3704 |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3705 static void clear_pending(vdp_context *context) |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3706 { |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3707 context->flags &= ~FLAG_PENDING; |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3708 context->address = context->address_latch; |
1929
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3709 //It seems like the DMA enable bit doesn't so much enable DMA so much |
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3710 //as it enables changing CD5 from control port writes |
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3711 if (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) { |
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3712 context->cd = context->cd_latch; |
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3713 } else { |
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3714 context->cd = (context->cd & 0x20) | (context->cd_latch & 0x1F); |
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3715 } |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3716 } |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3717 |
75 | 3718 int vdp_control_port_write(vdp_context * context, uint16_t value) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3719 { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3720 //printf("control port write: %X at %d\n", value, context->cycles); |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3721 if (context->flags & FLAG_DMA_RUN) { |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3722 return -1; |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3723 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3724 if (context->flags & FLAG_PENDING) { |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3725 context->address_latch = (context->address_latch & 0x3FFF) | (value << 14 & 0x1C000); |
1929
c7e3e3ebb64a
Fix regression in Konami games from address/cd latch changes
Mike Pavone <pavone@retrodev.com>
parents:
1928
diff
changeset
|
3726 context->cd_latch = (context->cd_latch & 0x3) | ((value >> 2) & ~0x3 & 0xFF); |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3727 clear_pending(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3728 //Should these be taken care of here or after the first write? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3729 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3730 context->flags2 &= ~FLAG2_READ_PENDING; |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3731 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3732 if (context->cd & 0x20) { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3733 // |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3734 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) { |
75 | 3735 //DMA copy or 68K -> VDP, transfer starts immediately |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3736 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot); |
1191
8dc50e50ced6
Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents:
1189
diff
changeset
|
3737 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
8dc50e50ced6
Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents:
1189
diff
changeset
|
3738 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); |
1289
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3739 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3740 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3741 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3742 //sticking with 3 slots for now until I can do some more captures |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3743 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5)); |
1285
76e47254596b
Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents:
1278
diff
changeset
|
3744 context->flags |= FLAG_DMA_RUN; |
75 | 3745 return 1; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3746 } else { |
1285
76e47254596b
Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents:
1278
diff
changeset
|
3747 context->flags |= FLAG_DMA_RUN; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3748 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
75 | 3749 } |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3750 } else { |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3751 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd); |
75 | 3752 } |
63
a6dd5b7a971b
Add FPS counter to console output
Mike Pavone <pavone@retrodev.com>
parents:
58
diff
changeset
|
3753 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3754 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3755 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3756 context->address_latch = (context->address_latch & 0x1C000) | (value & 0x3FFF); |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3757 context->cd_latch = (context->cd_latch & 0x3C) | (value >> 14); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3758 if ((value & 0xC000) == 0x8000) { |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3759 //Register write |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3760 uint8_t reg = (value >> 8) & 0x1F; |
1997
e08c489d5602
Fix regressions from most recent address/cd latch change. Need to do more research still, but probably good enough for now
Mike Pavone <pavone@retrodev.com>
parents:
1994
diff
changeset
|
3761 // The fact that this is needed seems to pour some cold water on my theory |
e08c489d5602
Fix regressions from most recent address/cd latch change. Need to do more research still, but probably good enough for now
Mike Pavone <pavone@retrodev.com>
parents:
1994
diff
changeset
|
3762 // about how the address latch actually works. Needs more search to definitively confirm |
e08c489d5602
Fix regressions from most recent address/cd latch change. Need to do more research still, but probably good enough for now
Mike Pavone <pavone@retrodev.com>
parents:
1994
diff
changeset
|
3763 context->address = (context->address & 0x1C000) | (value & 0x3FFF); |
e08c489d5602
Fix regressions from most recent address/cd latch change. Need to do more research still, but probably good enough for now
Mike Pavone <pavone@retrodev.com>
parents:
1994
diff
changeset
|
3764 context->cd = (context->cd & 0x3C) | (value >> 14); |
1123
d5412f76accc
Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1122
diff
changeset
|
3765 if (reg < (mode_5 ? VDP_REGS : 0xB)) { |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3766 //printf("register %d set to %X\n", reg, value & 0xFF); |
480
0737953132ad
Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents:
479
diff
changeset
|
3767 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) { |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3768 vdp_latch_hv(context); |
480
0737953132ad
Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents:
479
diff
changeset
|
3769 } |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3770 if (reg == REG_BG_COLOR) { |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3771 value &= 0x3F; |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3772 } |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3773 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3774 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame); |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3775 }*/ |
1946 | 3776 uint8_t buffer[2] = {reg, value}; |
3777 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer); | |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3778 context->regs[reg] = value; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3779 if (reg == REG_MODE_4) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3780 context->double_res = (value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES); |
415
8c60c8c09a0f
Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode.
Mike Pavone <pavone@retrodev.com>
parents:
414
diff
changeset
|
3781 if (!context->double_res) { |
1106
cacbd3f18f03
Fix field flag handling bug introduced with VDP/render interface cleanup
Michael Pavone <pavone@retrodev.com>
parents:
1103
diff
changeset
|
3782 context->flags2 &= ~FLAG2_EVEN_FIELD; |
415
8c60c8c09a0f
Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode.
Mike Pavone <pavone@retrodev.com>
parents:
414
diff
changeset
|
3783 } |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3784 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3785 if (reg == REG_MODE_1 || reg == REG_MODE_2 || reg == REG_MODE_4) { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3786 update_video_params(context); |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3787 } |
2009
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3788 } else if (reg == REG_KMOD_CTRL) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3789 if (!(value & 0xFF)) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3790 context->system->enter_debugger = 1; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3791 } |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3792 } else if (reg == REG_KMOD_MSG) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3793 char c = value; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3794 if (c) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3795 context->kmod_buffer_length++; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3796 if ((context->kmod_buffer_length + 1) > context->kmod_buffer_storage) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3797 context->kmod_buffer_storage = context->kmod_buffer_length ? 128 : context->kmod_buffer_length * 2; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3798 context->kmod_msg_buffer = realloc(context->kmod_msg_buffer, context->kmod_buffer_storage); |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3799 } |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3800 context->kmod_msg_buffer[context->kmod_buffer_length - 1] = c; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3801 } else if (context->kmod_buffer_length) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3802 context->kmod_msg_buffer[context->kmod_buffer_length] = 0; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3803 init_terminal(); |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3804 printf("KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer); |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3805 context->kmod_buffer_length = 0; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3806 } |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3807 } else if (reg == REG_KMOD_TIMER) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3808 if (!(value & 0x80)) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3809 init_terminal(); |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3810 printf("KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7); |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3811 } |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3812 if (value & 0xC0) { |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3813 context->timer_start_cycle = context->cycles; |
4ace0fef6f8f
Add support for the parts of the KMod debug ports used by SGDK
Mike Pavone <pavone@retrodev.com>
parents:
1998
diff
changeset
|
3814 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3815 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3816 } else if (mode_5) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3817 context->flags |= FLAG_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3818 //Should these be taken care of here or after the second write? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3819 //context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3820 //context->flags2 &= ~FLAG2_READ_PENDING; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3821 } else { |
1982
6b9871d3d70d
Fix regression in Mode 4 support caused by address/cd latch changes
Michael Pavone <pavone@retrodev.com>
parents:
1971
diff
changeset
|
3822 clear_pending(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3823 context->flags &= ~FLAG_READ_FETCHED; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3824 context->flags2 &= ~FLAG2_READ_PENDING; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3825 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3826 } |
75 | 3827 return 0; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3828 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3829 |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3830 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value) |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3831 { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3832 if (context->flags2 & FLAG2_BYTE_PENDING) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3833 uint16_t full_val = value << 8 | context->pending_byte; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3834 context->flags2 &= ~FLAG2_BYTE_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3835 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3836 vdp_control_port_write(context, full_val); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3837 if (context->cd == VRAM_READ) { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3838 context->cd = VRAM_READ8; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3839 } |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3840 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3841 context->pending_byte = value; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3842 context->flags2 |= FLAG2_BYTE_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3843 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3844 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3845 |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3846 int vdp_data_port_write(vdp_context * context, uint16_t value) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3847 { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3848 //printf("data port write: %X at %d\n", value, context->cycles); |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3849 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) { |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3850 return -1; |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3851 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3852 if (context->flags & FLAG_PENDING) { |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3853 clear_pending(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3854 //Should these be cleared here? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3855 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3856 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3857 } |
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
changeset
|
3858 /*if (context->fifo_cur == context->fifo_end) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3859 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
changeset
|
3860 }*/ |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3861 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3862 context->flags &= ~FLAG_DMA_RUN; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3863 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3864 while (context->fifo_write == context->fifo_read) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3865 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3866 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3867 fifo_entry * cur = context->fifo + context->fifo_write; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3868 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3869 cur->address = context->address; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3870 cur->value = value; |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3871 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3872 cur->cd = context->cd; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3873 } else { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3874 cur->cd = (context->cd & 2) | 1; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3875 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3876 cur->partial = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3877 if (context->fifo_read < 0) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3878 context->fifo_read = context->fifo_write; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3879 } |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3880 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3881 increment_address(context); |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3882 return 0; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3883 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3884 |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3885 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value) |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3886 { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3887 if (context->flags & FLAG_PENDING) { |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3888 clear_pending(context); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3889 //Should these be cleared here? |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3890 context->flags &= ~FLAG_READ_FETCHED; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3891 context->flags2 &= ~FLAG2_READ_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3892 } |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3893 context->flags2 &= ~FLAG2_BYTE_PENDING; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3894 /*if (context->fifo_cur == context->fifo_end) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3895 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3896 }*/ |
1637
95880d947257
Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents:
1634
diff
changeset
|
3897 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3898 context->flags &= ~FLAG_DMA_RUN; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3899 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3900 while (context->fifo_write == context->fifo_read) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3901 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3902 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3903 fifo_entry * cur = context->fifo + context->fifo_write; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3904 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3905 cur->address = context->address; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3906 cur->value = value; |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3907 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3908 cur->cd = context->cd; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3909 } else { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3910 cur->cd = (context->cd & 2) | 1; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3911 } |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
3912 cur->partial = 3; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3913 if (context->fifo_read < 0) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3914 context->fifo_read = context->fifo_write; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3915 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3916 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3917 increment_address(context); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3918 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3919 |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3920 void vdp_test_port_write(vdp_context * context, uint16_t value) |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3921 { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
3922 context->test_port = value; |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3923 } |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3924 |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3925 uint16_t vdp_control_port_read(vdp_context * context) |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3926 { |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3927 if (context->flags & FLAG_PENDING) { |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3928 clear_pending(context); |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3929 } |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3930 context->flags2 &= ~FLAG2_BYTE_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3931 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3932 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3933 if (context->fifo_read < 0) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3934 value |= 0x200; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3935 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3936 if (context->fifo_read == context->fifo_write) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3937 value |= 0x100; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3938 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3939 if (context->flags2 & FLAG2_VINT_PENDING) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3940 value |= 0x80; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3941 } |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3942 if (context->flags & FLAG_DOT_OFLOW) { |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3943 value |= 0x40; |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
3944 context->flags &= ~FLAG_DOT_OFLOW; |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3945 } |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3946 if (context->flags2 & FLAG2_SPRITE_COLLIDE) { |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3947 value |= 0x20; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3948 context->flags2 &= ~FLAG2_SPRITE_COLLIDE; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3949 } |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
3950 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3951 value |= 0x10; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3952 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3953 uint32_t slot = context->hslot; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3954 if (!is_active(context)) { |
318
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3955 value |= 0x8; |
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3956 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3957 if (context->regs[REG_MODE_4] & BIT_H40) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3958 if (slot < HBLANK_END_H40 || slot > HBLANK_START_H40) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3959 value |= 0x4; |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3960 } |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3961 } else { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3962 if (slot < HBLANK_END_H32 || slot > HBLANK_START_H32) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3963 value |= 0x4; |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3964 } |
318
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3965 } |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3966 if (context->cd & 0x20) { |
141
576f55711d8d
Fix DMA in progress flag in VDP status register
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
3967 value |= 0x2; |
75 | 3968 } |
714
e29bc2918f69
Fix VDP status register PAL bit based on observations of the Titan Overdrive demo
Michael Pavone <pavone@retrodev.com>
parents:
711
diff
changeset
|
3969 if (context->flags2 & FLAG2_REGION_PAL) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3970 value |= 0x1; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3971 } |
459
c49ecf575784
Revert change to VBLANK flag timing based on new direct color DMA test
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3972 //printf("status read at cycle %d returned %X\n", context->cycles, value); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3973 return value; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3974 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3975 |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3976 uint16_t vdp_data_port_read(vdp_context * context) |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3977 { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3978 if (context->flags & FLAG_PENDING) { |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
3979 clear_pending(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3980 //Should these be cleared here? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3981 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3982 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3983 } |
138 | 3984 if (context->cd & 1) { |
991
f9ee6f746cb4
Properly emulate machine freeze when reading from VDP while configured for writes
Michael Pavone <pavone@retrodev.com>
parents:
984
diff
changeset
|
3985 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd); |
1998
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3986 context->system->enter_debugger = 1; |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3987 return context->prefetch; |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3988 } |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3989 switch (context->cd) |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3990 { |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3991 case VRAM_READ: |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3992 case VSRAM_READ: |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3993 case CRAM_READ: |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3994 case VRAM_READ8: |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3995 break; |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3996 default: |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3997 warning("Read from VDP data port with invalid source, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd); |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3998 context->system->enter_debugger = 1; |
0740d90812ee
Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents:
1997
diff
changeset
|
3999 return context->prefetch; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
4000 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
4001 while (!(context->flags & FLAG_READ_FETCHED)) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
4002 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
4003 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
4004 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
4005 return context->prefetch; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
4006 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
4007 |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
4008 uint8_t vdp_data_port_read_pbc(vdp_context * context) |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
4009 { |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4010 if (context->flags & FLAG_PENDING) { |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4011 clear_pending(context); |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4012 } |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4013 context->flags &= ~FLAG_READ_FETCHED; |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
4014 context->flags2 &= ~FLAG2_BYTE_PENDING; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
4015 |
1152
ddbb61be6119
Fix to pass a couple more tests in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1151
diff
changeset
|
4016 context->cd = VRAM_READ8; |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
4017 return context->prefetch; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
4018 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
4019 |
65
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
4020 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction) |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
4021 { |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
4022 context->cycles -= deduction; |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4023 if (context->pending_vint_start >= deduction) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4024 context->pending_vint_start -= deduction; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4025 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4026 context->pending_vint_start = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4027 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4028 if (context->pending_hint_start >= deduction) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4029 context->pending_hint_start -= deduction; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4030 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4031 context->pending_hint_start = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4032 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4033 if (context->fifo_read >= 0) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4034 int32_t idx = context->fifo_read; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4035 do { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4036 if (context->fifo[idx].cycle >= deduction) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4037 context->fifo[idx].cycle -= deduction; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4038 } else { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4039 context->fifo[idx].cycle = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4040 } |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4041 idx = (idx+1) & (FIFO_SIZE-1); |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
4042 } while(idx != context->fifo_write); |
65
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
4043 } |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
4044 } |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
4045 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
4046 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context) |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4047 { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4048 if (context->hslot < 183) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4049 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4050 } else if (context->hslot < HSYNC_END_H40) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4051 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4052 uint32_t hsync = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4053 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++) |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4054 { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4055 hsync += h40_hsync_cycles[i]; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4056 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4057 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4058 return before_hsync + hsync + after_hsync; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4059 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4060 return (256-context->hslot) * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4061 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4062 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4063 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
4064 static uint32_t vdp_cycles_next_line(vdp_context * context) |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4065 { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4066 if (context->regs[REG_MODE_4] & BIT_H40) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4067 //TODO: Handle "illegal" Mode 4/H40 combo |
647
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
4068 if (context->hslot < LINE_CHANGE_H40) { |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
680
diff
changeset
|
4069 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4070 } else { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4071 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4072 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4073 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4074 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4075 if (context->hslot < LINE_CHANGE_H32) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4076 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4077 } else if (context->hslot < 148) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4078 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4079 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4080 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4081 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4082 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4083 if (context->hslot < 148) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4084 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4085 } else if (context->hslot < LINE_CHANGE_MODE4) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4086 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4087 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4088 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4089 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4090 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4091 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4092 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4093 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4094 static void get_jump_params(vdp_context *context, uint32_t *jump_start, uint32_t *jump_dst) |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4095 { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4096 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4097 if (context->flags2 & FLAG2_REGION_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4098 if (context->regs[REG_MODE_2] & BIT_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4099 *jump_start = 0x10B; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4100 *jump_dst = 0x1D2; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4101 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4102 *jump_start = 0x103; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4103 *jump_dst = 0x1CA; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4104 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4105 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4106 if (context->regs[REG_MODE_2] & BIT_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4107 *jump_start = 0x100; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4108 *jump_dst = 0x1FA; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4109 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4110 *jump_start = 0xEB; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4111 *jump_dst = 0x1E5; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4112 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4113 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4114 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4115 *jump_start = 0xDB; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4116 *jump_dst = 0x1D5; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4117 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4118 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4119 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
4120 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target) |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4121 { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4122 uint32_t jump_start, jump_dst; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4123 get_jump_params(context, &jump_start, &jump_dst); |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4124 uint32_t lines; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4125 if (context->vcounter < target) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4126 if (target < jump_start || context->vcounter > jump_start) { |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4127 lines = target - context->vcounter; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4128 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4129 lines = jump_start - context->vcounter + target - jump_dst; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4130 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4131 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4132 if (context->vcounter < jump_start) { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
4133 lines = jump_start - context->vcounter + 512 - jump_dst; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4134 } else { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
4135 lines = 512 - context->vcounter; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4136 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4137 if (target < jump_start) { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4138 lines += target; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4139 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4140 lines += jump_start + target - jump_dst; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4141 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4142 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4143 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context); |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4144 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4145 |
680
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4146 uint32_t vdp_cycles_to_frame_end(vdp_context * context) |
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4147 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
4148 return context->cycles + vdp_cycles_to_line(context, context->inactive_start); |
680
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4149 } |
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
4150 |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4151 uint32_t vdp_next_hint(vdp_context * context) |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4152 { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
4153 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4154 return 0xFFFFFFFF; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4155 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4156 if (context->flags2 & FLAG2_HINT_PENDING) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
4157 return context->pending_hint_start; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4158 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4159 uint32_t hint_line; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4160 if (context->state != ACTIVE) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4161 hint_line = context->regs[REG_HINT]; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4162 if (hint_line > context->inactive_start) { |
724
2174f92c5f9b
Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents:
722
diff
changeset
|
4163 return 0xFFFFFFFF; |
2174f92c5f9b
Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents:
722
diff
changeset
|
4164 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4165 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4166 hint_line = context->vcounter + context->hint_counter + 1; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4167 if (context->vcounter < context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4168 if (hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4169 hint_line = context->regs[REG_HINT]; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4170 if (hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4171 return 0xFFFFFFFF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4172 } |
1366
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4173 if (hint_line >= context->vcounter) { |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4174 //Next interrupt is for a line in the next frame that |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4175 //is higher than the line we're on now so just passing |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4176 //that line number to vdp_cycles_to_line will yield the wrong |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4177 //result |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
4178 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE; |
1366
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
4179 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4180 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4181 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4182 uint32_t jump_start, jump_dst; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4183 get_jump_params(context, &jump_start, &jump_dst); |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4184 if (hint_line >= jump_start && context->vcounter < jump_dst) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4185 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4186 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4187 if (hint_line < context->vcounter && hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4188 return 0xFFFFFFFF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4189 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
4190 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4191 } |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
4192 return context->cycles + vdp_cycles_to_line(context, hint_line); |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4193 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4194 |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4195 static uint32_t vdp_next_vint_real(vdp_context * context) |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4196 { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
4197 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4198 return 0xFFFFFFFF; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4199 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4200 if (context->flags2 & FLAG2_VINT_PENDING) { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
4201 return context->pending_vint_start; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4202 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4203 |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4204 |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4205 return vdp_next_vint_z80(context); |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4206 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4207 |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4208 uint32_t vdp_next_vint(vdp_context *context) |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4209 { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4210 uint32_t ret = vdp_next_vint_real(context); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4211 #ifdef TIMING_DEBUG |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4212 static uint32_t last = 0xFFFFFFFF; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4213 if (last != ret) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4214 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4215 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4216 last = ret; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4217 #endif |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4218 return ret; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4219 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
4220 |
333 | 4221 uint32_t vdp_next_vint_z80(vdp_context * context) |
4222 { | |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
4223 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
4224 if (context->vcounter == vint_line) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4225 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4226 if (context->regs[REG_MODE_4] & BIT_H40) { |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4227 if (context->hslot >= LINE_CHANGE_H40 || context->hslot <= VINT_SLOT_H40) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4228 uint32_t cycles = context->cycles; |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4229 if (context->hslot >= LINE_CHANGE_H40) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4230 if (context->hslot < 183) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4231 cycles += (183 - context->hslot) * MCLKS_SLOT_H40; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4232 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4233 |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4234 if (context->hslot < HSYNC_SLOT_H40) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4235 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4236 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4237 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ ) |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4238 { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4239 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40]; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4240 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4241 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4242 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4243 |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4244 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4245 return cycles; |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
4246 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4247 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4248 if (context->hslot >= LINE_CHANGE_H32 || context->hslot <= VINT_SLOT_H32) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4249 if (context->hslot <= VINT_SLOT_H32) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4250 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32; |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4251 } else if (context->hslot < 233) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4252 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4253 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4254 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4255 } |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
4256 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4257 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4258 } else { |
1177
67e0462c30ce
Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents:
1175
diff
changeset
|
4259 if (context->hslot >= LINE_CHANGE_MODE4) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4260 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4261 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4262 if (context->hslot <= VINT_SLOT_MODE4) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4263 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4264 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4265 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4266 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
4267 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4268 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4269 if (context->regs[REG_MODE_4] & BIT_H40) { |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
4270 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4271 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
4272 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4273 } |
333 | 4274 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4275 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32; |
333 | 4276 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
4277 return context->cycles + cycles_to_vint; |
333 | 4278 } |
4279 | |
1377
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4280 uint32_t vdp_next_nmi(vdp_context *context) |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4281 { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4282 if (!(context->flags2 & FLAG2_PAUSE)) { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4283 return 0xFFFFFFFF; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4284 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4285 return context->cycles + vdp_cycles_to_line(context, 0x1FF); |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4286 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4287 |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4288 void vdp_pbc_pause(vdp_context *context) |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4289 { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4290 context->flags2 |= FLAG2_PAUSE; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4291 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
4292 |
953
08346262990b
Remove the int number argument to vdp_int_ack since it is no longer used
Michael Pavone <pavone@retrodev.com>
parents:
952
diff
changeset
|
4293 void vdp_int_ack(vdp_context * context) |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4294 { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4295 //CPU interrupt acknowledge is only used in Mode 5 |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4296 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4297 //Apparently the VDP interrupt controller is not very smart |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4298 //Instead of paying attention to what interrupt is being acknowledged it just |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4299 //clears the pending flag for whatever interrupt it is currently asserted |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4300 //which may be different from the interrupt it was asserting when the 68k |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4301 //started the interrupt process. The window for this is narrow and depends |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4302 //on the latency between the int enable register write and the interrupt being |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4303 //asserted, but Fatal Rewind depends on this due to some buggy code |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4304 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4305 context->flags2 &= ~FLAG2_VINT_PENDING; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4306 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4307 context->flags2 &= ~FLAG2_HINT_PENDING; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
4308 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4309 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4310 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
4311 |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4312 #define VDP_STATE_VERSION 3 |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4313 void vdp_serialize(vdp_context *context, serialize_buffer *buf) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4314 { |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4315 save_int8(buf, VDP_STATE_VERSION); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4316 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4317 save_buffer8(buf, context->vdpmem, VRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4318 save_buffer16(buf, context->cram, CRAM_SIZE); |
1906
2d462aa78349
Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents:
1899
diff
changeset
|
4319 save_buffer16(buf, context->vsram, MAX_VSRAM_SIZE); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4320 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4321 for (int i = 0; i <= REG_DMASRC_H; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4322 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4323 save_int8(buf, context->regs[i]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4324 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4325 save_int32(buf, context->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4326 save_int32(buf, context->serial_address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4327 save_int8(buf, context->cd); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4328 uint8_t fifo_size; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4329 if (context->fifo_read < 0) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4330 fifo_size = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4331 } else if (context->fifo_write > context->fifo_read) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4332 fifo_size = context->fifo_write - context->fifo_read; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4333 } else { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4334 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4335 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4336 save_int8(buf, fifo_size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4337 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4338 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4339 fifo_entry *entry = context->fifo + cur; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4340 cur = (cur + 1) & (FIFO_SIZE - 1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4341 save_int32(buf, entry->cycle); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4342 save_int32(buf, entry->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4343 save_int16(buf, entry->value); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4344 save_int8(buf, entry->cd); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4345 save_int8(buf, entry->partial); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4346 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4347 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4348 save_int16(buf, context->flags2 << 8 | context->flags); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4349 save_int32(buf, context->frame); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4350 save_int16(buf, context->vcounter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4351 save_int8(buf, context->hslot); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4352 save_int16(buf, context->hv_latch); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4353 save_int8(buf, context->state); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4354 save_int16(buf, context->hscroll_a); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4355 save_int16(buf, context->hscroll_b); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4356 save_int16(buf, context->vscroll_latch[0]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4357 save_int16(buf, context->vscroll_latch[1]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4358 save_int16(buf, context->col_1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4359 save_int16(buf, context->col_2); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4360 save_int16(buf, context->test_port); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4361 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4362 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4363 save_int8(buf, context->buf_a_off); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4364 save_int8(buf, context->buf_b_off); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4365 //FIXME: Sprite rendering state is currently a mess |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4366 save_int8(buf, context->sprite_index); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4367 save_int8(buf, context->sprite_draws); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4368 save_int8(buf, context->slot_counter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4369 save_int8(buf, context->cur_slot); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4370 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4371 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4372 sprite_draw *draw = context->sprite_draw_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4373 save_int16(buf, draw->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4374 save_int16(buf, draw->x_pos); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4375 save_int8(buf, draw->pal_priority); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4376 save_int8(buf, draw->h_flip); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4377 save_int8(buf, draw->width); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4378 save_int8(buf, draw->height); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4379 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4380 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4381 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4382 sprite_info *info = context->sprite_info_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4383 save_int8(buf, info->size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4384 save_int8(buf, info->index); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4385 save_int16(buf, info->y); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4386 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4387 save_buffer8(buf, context->linebuf, LINEBUF_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4388 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4389 save_int32(buf, context->cycles); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4390 save_int32(buf, context->pending_vint_start); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4391 save_int32(buf, context->pending_hint_start); |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4392 save_int32(buf, context->address_latch); |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4393 save_int8(buf, context->cd_latch); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4394 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4395 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4396 void vdp_deserialize(deserialize_buffer *buf, void *vcontext) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4397 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4398 vdp_context *context = vcontext; |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4399 uint8_t version = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4400 uint8_t vramk; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4401 if (version == 64) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4402 vramk = version; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4403 version = 0; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4404 } else { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4405 vramk = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4406 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4407 if (version > VDP_STATE_VERSION) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4408 warning("Save state has VDP version %d, but this build only understands versions %d and lower", version, VDP_STATE_VERSION); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4409 } |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4410 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4411 if ((vramk * 1024) > VRAM_SIZE) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4412 buf->cur_pos += (vramk * 1024) - VRAM_SIZE; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4413 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4414 load_buffer16(buf, context->cram, CRAM_SIZE); |
1431
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4415 for (int i = 0; i < CRAM_SIZE; i++) |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4416 { |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4417 update_color_map(context, i, context->cram[i]); |
030b40139de9
Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents:
1428
diff
changeset
|
4418 } |
1906
2d462aa78349
Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents:
1899
diff
changeset
|
4419 load_buffer16(buf, context->vsram, version > 1 ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4420 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4421 for (int i = 0; i <= REG_DMASRC_H; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4422 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4423 context->regs[i] = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4424 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4425 context->address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4426 context->serial_address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4427 context->cd = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4428 uint8_t fifo_size = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4429 if (fifo_size > FIFO_SIZE) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4430 fatal_error("Invalid fifo size %d", fifo_size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4431 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4432 if (fifo_size) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4433 context->fifo_read = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4434 context->fifo_write = fifo_size & (FIFO_SIZE - 1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4435 for (int i = 0; i < fifo_size; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4436 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4437 fifo_entry *entry = context->fifo + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4438 entry->cycle = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4439 entry->address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4440 entry->value = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4441 entry->cd = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4442 entry->partial = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4443 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4444 } else { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4445 context->fifo_read = -1; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4446 context->fifo_write = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4447 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4448 uint16_t flags = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4449 context->flags2 = flags >> 8; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4450 context->flags = flags; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4451 context->frame = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4452 context->vcounter = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4453 context->hslot = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4454 context->hv_latch = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4455 context->state = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4456 context->hscroll_a = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4457 context->hscroll_b = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4458 context->vscroll_latch[0] = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4459 context->vscroll_latch[1] = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4460 context->col_1 = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4461 context->col_2 = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4462 context->test_port = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4463 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4464 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4465 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4466 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4467 context->sprite_index = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4468 context->sprite_draws = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4469 context->slot_counter = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4470 context->cur_slot = load_int8(buf); |
1866
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4471 if (version == 0) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4472 int cur_draw = 0; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4473 for (int i = 0; i < MAX_SPRITES_LINE * 2; i++) |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4474 { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4475 if (cur_draw < MAX_SPRITES_LINE) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4476 sprite_draw *last = cur_draw ? context->sprite_draw_list + cur_draw - 1 : NULL; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4477 sprite_draw *draw = context->sprite_draw_list + cur_draw++; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4478 draw->address = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4479 draw->x_pos = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4480 draw->pal_priority = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4481 draw->h_flip = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4482 draw->width = 1; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4483 draw->height = 8; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4484 |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4485 if (last && last->width < 4 && last->h_flip == draw->h_flip && last->pal_priority == draw->pal_priority) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4486 int adjust_x = draw->x_pos + draw->h_flip ? -8 : 8; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4487 int height = draw->address - last->address /4; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4488 if (last->x_pos == adjust_x && ( |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4489 (last->width > 1 && height == last->height) || |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4490 (last->width == 1 && (height == 8 || height == 16 || height == 24 || height == 32)) |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4491 )) { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4492 //current draw appears to be part of the same sprite as the last one, combine it |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4493 cur_draw--; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4494 last->width++; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4495 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4496 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4497 } else { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4498 load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4499 load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4500 load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4501 load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4502 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4503 } |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4504 } else { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4505 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4506 { |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4507 sprite_draw *draw = context->sprite_draw_list + i; |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4508 draw->address = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4509 draw->x_pos = load_int16(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4510 draw->pal_priority = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4511 draw->h_flip = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4512 draw->width = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4513 draw->height = load_int8(buf); |
84f16a804ce5
Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents:
1834
diff
changeset
|
4514 } |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4515 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4516 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4517 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4518 sprite_info *info = context->sprite_info_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4519 info->size = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4520 info->index = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4521 info->y = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4522 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4523 load_buffer8(buf, context->linebuf, LINEBUF_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4524 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4525 context->cycles = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4526 context->pending_vint_start = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4527 context->pending_hint_start = load_int32(buf); |
1925
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4528 if (version > 2) { |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4529 context->address_latch = load_int32(buf); |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4530 context->cd_latch = load_int8(buf); |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4531 } else { |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4532 context->address_latch = context->address; |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4533 context->cd_latch = context->cd; |
039553703c20
Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents:
1917
diff
changeset
|
4534 } |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4535 update_video_params(context); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
4536 } |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4537 |
1649
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4538 static vdp_context *current_vdp; |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4539 static void vdp_debug_window_close(uint8_t which) |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4540 { |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4541 //TODO: remove need for current_vdp global, and find the VDP via current_system instead |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4542 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++) |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4543 { |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4544 if (current_vdp->enabled_debuggers & (1 << i) && which == current_vdp->debug_fb_indices[i]) { |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4545 vdp_toggle_debug_view(current_vdp, i); |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4546 break; |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4547 } |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4548 } |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4549 } |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4550 |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4551 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4552 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4553 if (context->enabled_debuggers & 1 << debug_type) { |
1642
c6b2c0f8cc61
Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents:
1641
diff
changeset
|
4554 render_destroy_window(context->debug_fb_indices[debug_type]); |
c6b2c0f8cc61
Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents:
1641
diff
changeset
|
4555 context->enabled_debuggers &= ~(1 << debug_type); |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4556 } else { |
1634
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4557 uint32_t width,height; |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4558 uint8_t fetch_immediately = 0; |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4559 char *caption; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4560 switch(debug_type) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4561 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4562 case VDP_DEBUG_PLANE: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4563 caption = "BlastEm - VDP Plane Debugger"; |
1634
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4564 width = height = 1024; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4565 break; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4566 case VDP_DEBUG_VRAM: |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4567 caption = "BlastEm - VDP VRAM Debugger"; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4568 width = 1024; |
e397766c3028
Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents:
1632
diff
changeset
|
4569 height = 512; |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4570 break; |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4571 case VDP_DEBUG_CRAM: |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4572 caption = "BlastEm - VDP CRAM Debugger"; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4573 width = 512; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4574 height = 512; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4575 fetch_immediately = 1; |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4576 break; |
1641
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4577 case VDP_DEBUG_COMPOSITE: |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4578 caption = "BlastEm - VDP Plane Composition Debugger"; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4579 width = LINEBUF_SIZE; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4580 height = context->inactive_start + context->border_top + context->border_bot; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4581 fetch_immediately = 1; |
bc9bb4e5856f
Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents:
1640
diff
changeset
|
4582 break; |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4583 default: |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4584 return; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4585 } |
1649
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4586 current_vdp = context; |
b500e971da75
Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents:
1644
diff
changeset
|
4587 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height, vdp_debug_window_close); |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4588 if (context->debug_fb_indices[debug_type]) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4589 context->enabled_debuggers |= 1 << debug_type; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4590 } |
1638
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4591 if (fetch_immediately) { |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4592 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]); |
f27142c48567
Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents:
1637
diff
changeset
|
4593 } |
1631
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4594 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4595 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4596 |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4597 void vdp_inc_debug_mode(vdp_context *context) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4598 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4599 uint8_t active = render_get_active_framebuffer(); |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4600 if (active < FRAMEBUFFER_USER_START) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4601 return; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4602 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4603 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++) |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4604 { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4605 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) { |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4606 context->debug_modes[i]++; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4607 return; |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4608 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4609 } |
c4ba3177b72d
WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents:
1629
diff
changeset
|
4610 } |
1946 | 4611 |
4612 void vdp_replay_event(vdp_context *context, uint8_t event, event_reader *reader) | |
4613 { | |
4614 uint32_t address; | |
4615 deserialize_buffer *buffer = &reader->buffer; | |
4616 switch (event) | |
4617 { | |
4618 case EVENT_VRAM_BYTE: | |
1957 | 4619 reader_ensure_data(reader, 3); |
1946 | 4620 address = load_int16(buffer); |
4621 break; | |
4622 case EVENT_VRAM_BYTE_DELTA: | |
1957 | 4623 reader_ensure_data(reader, 2); |
1946 | 4624 address = reader->last_byte_address + load_int8(buffer); |
4625 break; | |
4626 case EVENT_VRAM_BYTE_ONE: | |
1957 | 4627 reader_ensure_data(reader, 1); |
1946 | 4628 address = reader->last_byte_address + 1; |
4629 break; | |
4630 case EVENT_VRAM_BYTE_AUTO: | |
1957 | 4631 reader_ensure_data(reader, 1); |
1946 | 4632 address = reader->last_byte_address + context->regs[REG_AUTOINC]; |
4633 break; | |
4634 case EVENT_VRAM_WORD: | |
1957 | 4635 reader_ensure_data(reader, 4); |
1946 | 4636 address = load_int8(buffer) << 16; |
4637 address |= load_int16(buffer); | |
4638 break; | |
4639 case EVENT_VRAM_WORD_DELTA: | |
1957 | 4640 reader_ensure_data(reader, 3); |
1946 | 4641 address = reader->last_word_address + load_int8(buffer); |
4642 break; | |
4643 case EVENT_VDP_REG: | |
1956
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
4644 case EVENT_VDP_INTRAM: |
1957 | 4645 reader_ensure_data(reader, event == EVENT_VDP_REG ? 2 : 3); |
1946 | 4646 address = load_int8(buffer); |
4647 break; | |
4648 } | |
4649 | |
4650 switch (event) | |
4651 { | |
4652 case EVENT_VDP_REG: { | |
4653 uint8_t value = load_int8(buffer); | |
4654 context->regs[address] = value; | |
4655 if (address == REG_MODE_4) { | |
4656 context->double_res = (value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES); | |
4657 if (!context->double_res) { | |
4658 context->flags2 &= ~FLAG2_EVEN_FIELD; | |
4659 } | |
4660 } | |
4661 if (address == REG_MODE_1 || address == REG_MODE_2 || address == REG_MODE_4) { | |
4662 update_video_params(context); | |
4663 } | |
4664 break; | |
4665 } | |
4666 case EVENT_VRAM_BYTE: | |
4667 case EVENT_VRAM_BYTE_DELTA: | |
4668 case EVENT_VRAM_BYTE_ONE: | |
4669 case EVENT_VRAM_BYTE_AUTO: { | |
4670 uint8_t byte = load_int8(buffer); | |
4671 reader->last_byte_address = address; | |
4672 vdp_check_update_sat_byte(context, address ^ 1, byte); | |
4673 write_vram_byte(context, address ^ 1, byte); | |
4674 break; | |
4675 } | |
4676 case EVENT_VRAM_WORD: | |
4677 case EVENT_VRAM_WORD_DELTA: { | |
4678 uint16_t value = load_int16(buffer); | |
4679 reader->last_word_address = address; | |
4680 vdp_check_update_sat(context, address, value); | |
4681 write_vram_word(context, address, value); | |
4682 break; | |
4683 } | |
1956
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
4684 case EVENT_VDP_INTRAM: |
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
4685 if (address < 128) { |
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
4686 write_cram(context, address, load_int16(buffer)); |
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
4687 } else { |
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
4688 context->vsram[address&63] = load_int16(buffer); |
275f1c4bdb25
Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
changeset
|
4689 } |
1946 | 4690 break; |
4691 } | |
4692 } |