Mercurial > repos > blastem
annotate runtime.S @ 149:139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
author | Mike Pavone <pavone@retrodev.com> |
---|---|
date | Tue, 01 Jan 2013 07:06:57 -0800 |
parents | 15b8dce19cf4 |
children | 3e68e517cc01 |
rev | line source |
---|---|
17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
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1 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
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2 .global handle_cycle_limit |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
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3 handle_cycle_limit: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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4 cmp 84(%rsi), %eax |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
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5 jb skip_sync |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
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53
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6 call m68k_save_context |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
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7 mov %rsi, %rdi |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
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8 call sync_components |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
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9 mov %rax, %rsi |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
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10 call m68k_load_context |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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11 skip_sync: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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12 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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13 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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14 .global handle_cycle_limit_int |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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15 handle_cycle_limit_int: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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16 cmp 88(%rsi), %eax |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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17 jb skip_int |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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18 push %rcx |
87
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
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19 /* call print_int_dbg */ |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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20 /* swap USP and SSP if not already in supervisor mode */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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21 bt $5, 5(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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22 jc already_supervisor |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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23 mov 72(%rsi), %edi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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24 mov %r15d, 72(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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25 mov %edi, %r15d |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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26 already_supervisor: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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27 /* save status register on stack */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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28 sub $2, %r15d |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
29 mov %r15d, %edi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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30 call get_sr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
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72
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31 call m68k_write_word |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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32 /* update status register */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
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33 andb $0xF8, 5(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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34 mov 92(%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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35 or $0x20, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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36 or %cl, 5(%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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37 /* save PC */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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38 sub $4, %r15d |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
39 mov %r15d, %edi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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40 pop %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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41 call m68k_write_long_lowfirst |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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42 /* calculate interrupt vector address */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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43 mov 92(%rsi), %ecx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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44 shl $2, %ecx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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45 add $0x60, %ecx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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46 call m68k_read_long_scratch1 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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47 call m68k_native_addr_and_sync |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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48 add $24, %eax |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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49 /* discard function return address */ |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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50 pop %rdi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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51 jmp *%rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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52 skip_int: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
53 ret |
87
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
54 |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
55 int_dbg_msg: |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
56 .asciz "Executing Interrupt!" |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
57 print_int_dbg: |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
58 call m68k_save_context |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
59 push %rsi |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
60 lea int_dbg_msg(%rip), %rdi |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
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61 call puts |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
62 pop %rsi |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
63 call m68k_load_context |
60b5c9e2f4e0
vertical interrupts now work
Mike Pavone <pavone@retrodev.com>
parents:
86
diff
changeset
|
64 ret |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
65 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
66 .global get_sr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
67 get_sr: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
68 mov 5(%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
69 shl $8, %cx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
70 mov (%rsi), %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
71 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
72 or %bl, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
73 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
74 or %dl, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
75 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
76 or %bh, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
77 shl $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
78 or %dh, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
79 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
80 |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
81 .global set_sr |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
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82 set_sr: |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
83 mov %cl, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
84 and $1, %dh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
85 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
86 mov %cl, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
87 and $1, %bh |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
88 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
89 mov %cl, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
90 and $1, %dl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
91 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
92 mov %cl, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
93 and $1, %bl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
94 shr $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
95 and $1, %cl |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
96 mov %cl, (%rsi) |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
97 shr $8, %cx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
98 mov %cl, 5(%rsi) |
6331ddec228f
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99 ret |
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100 |
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101 .global set_ccr |
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102 set_ccr: |
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103 mov %cl, %dh |
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104 and $1, %dh |
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105 shr $1, %cl |
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106 mov %cl, %bh |
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107 and $1, %bh |
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108 shr $1, %cl |
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109 mov %cl, %dl |
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110 and $1, %dl |
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111 shr $1, %cl |
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112 mov %cl, %bl |
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113 and $1, %bl |
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114 shr $1, %cl |
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115 and $1, %cl |
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116 mov %cl, (%rsi) |
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117 ret |
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118 |
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119 do_vdp_port_write: |
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120 call m68k_save_context |
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121 mov %rcx, %rdx |
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122 call vdp_port_write |
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123 mov %rax, %rsi |
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124 call m68k_load_context |
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125 ret |
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126 |
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127 do_vdp_port_read: |
57
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128 mov %ecx, %edi |
54
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129 call m68k_save_context |
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130 call vdp_port_read |
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131 mov %rax, %rsi |
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132 call m68k_load_context |
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133 mov 136(%rsi), %cx |
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134 ret |
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135 |
66 | 136 do_io_write: |
137 call m68k_save_context | |
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138 and $0x1FFF, %edi |
83
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139 mov %ecx, %edx |
66 | 140 call io_write |
141 mov %rax, %rsi | |
142 call m68k_load_context | |
143 ret | |
144 do_io_read: | |
145 mov %ecx, %edi | |
85
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146 and $0x1FFF, %edi |
66 | 147 call m68k_save_context |
148 call io_read | |
149 mov %rax, %rsi | |
150 call m68k_load_context | |
82
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151 mov 136(%rsi), %cl |
66 | 152 ret |
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153 |
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154 do_io_write_w: |
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155 call m68k_save_context |
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156 and $0x1FFF, %edi |
83
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157 mov %ecx, %edx |
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158 call io_write_w |
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159 mov %rax, %rsi |
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160 call m68k_load_context |
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161 ret |
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162 do_io_read_w: |
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163 mov %ecx, %edi |
85
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164 and $0x1FFF, %edi |
83
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165 call m68k_save_context |
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166 call io_read_w |
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167 mov %rax, %rsi |
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168 call m68k_load_context |
84
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169 mov 136(%rsi), %cx |
83
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170 ret |
66 | 171 |
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172 bad_access_msg: |
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173 .asciz "Program tried to access illegal 68K address %X\n" |
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174 |
18
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175 .global m68k_write_word |
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176 .global try_fifo_write |
18
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177 m68k_write_word: |
64
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178 call inccycles |
18
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179 and $0xFFFFFF, %rdi |
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180 cmp $0x400000, %edi |
104
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181 jbe cart_w |
18
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182 cmp $0xE00000, %edi |
104
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183 jae workram_w |
54
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184 cmp $0xC00000, %edi |
104
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|
185 jae vdp_psg_w |
85
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186 cmp $0xA10000, %edi |
104
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|
187 jb not_io_w |
85
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188 cmp $0xA12000, %edi |
104
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|
189 jae not_io_w |
85
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|
190 jmp do_io_write_w |
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191 not_io_w: |
64
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|
192 ret |
18
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193 workram_w: |
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194 and $0xFFFF, %rdi |
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195 mov %cx, (%r9, %rdi) |
64
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|
196 ret |
18
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197 cart_w: |
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198 mov %cx, (%r8, %rdi) |
64
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|
199 ret |
54
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|
200 vdp_psg_w: |
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|
201 test $0x2700E0, %edi |
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202 jnz crash |
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203 and $0x1F, %edi |
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|
204 cmp $4, %edi |
104
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|
205 jb try_fifo_write |
54
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|
206 jmp do_vdp_port_write |
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207 try_fifo_write: |
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|
208 push %rdx |
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|
209 push %rbx |
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|
210 /* fetch VDP context pointer from 68K context */ |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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|
211 mov 128(%rsi), %rdx |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
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145
diff
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|
212 /* check DMA flag */ |
139e5dcd6aa3
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145
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|
213 bt $6, 19(%rdx) |
139e5dcd6aa3
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|
214 jc fifo_fallback |
54
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|
215 /* get fifo_cur and compare it to fifo_end */ |
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|
216 mov (%rdx), %rbx |
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|
217 cmp %rbx, 8(%rdx) |
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|
218 /* bail out if fifo is full */ |
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|
219 je fifo_fallback |
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|
220 /* populate FIFO entry */ |
138 | 221 mov %cx, 6(%rbx) /* value */ |
222 mov 16(%rdx), %cx | |
223 mov %cx, 4(%rbx) /* address */ | |
224 mov 18(%rdx), %cl | |
225 mov %cl, 8(%rbx) /* cd */ | |
226 movb $0, 9(%rbx) /* partial */ | |
54
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227 mov %eax, %ecx |
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228 shl $3, %ecx /* multiply by 68K cycle by 7 to get MCLK cycle */ |
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229 sub %eax, %ecx |
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230 mov %ecx, (%rbx) /* cycle */ |
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231 /* update fifo_cur and store back in 68K context */ |
138 | 232 add $12, %rbx |
54
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233 mov %rbx, (%rdx) |
138 | 234 /* update address register */ |
235 movzbw 35(%rdx), %bx | |
236 add %bx, 16(%rdx) | |
54
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|
237 /* clear pending flag */ |
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238 andb $0xEF, 19(%rdx) |
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239 pop %rbx |
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240 pop %rdx |
64
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241 ret |
54
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242 fifo_fallback: |
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243 pop %rbx |
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244 pop %rdx |
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245 jmp do_vdp_port_write |
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246 crash: |
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247 mov %edi, %esi |
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248 lea bad_access_msg(%rip), %rdi |
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249 call printf |
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250 mov $1, %rdi |
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251 call exit |
18
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252 |
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253 .global m68k_write_byte |
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254 m68k_write_byte: |
64
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255 call inccycles |
18
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256 and $0xFFFFFF, %rdi |
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257 cmp $0x400000, %edi |
104
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258 jbe cart_wb |
18
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259 cmp $0xE00000, %edi |
104
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260 jae workram_wb |
66 | 261 cmp $0xC00000, %edi |
104
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262 jae vdp_psg_wb |
66 | 263 cmp $0xA10000, %edi |
104
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|
264 jb not_io_wb |
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
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265 cmp $0xA12000, %edi |
104
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266 jae not_io_wb |
66 | 267 jmp do_io_write |
268 not_io_wb: | |
64
2b1a65f4b85d
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269 ret |
18
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270 workram_wb: |
83
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271 /* deal with byte swapping */ |
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272 xor $1, %edi |
18
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273 and $0xFFFF, %rdi |
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274 mov %cl, (%r9, %rdi) |
64
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275 ret |
18
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276 cart_wb: |
83
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277 /* deal with byte swapping */ |
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278 xor $1, %edi |
18
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279 mov %cl, (%r8, %rdi) |
64
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280 ret |
66 | 281 vdp_psg_wb: |
282 push %rdx | |
283 mov %cl, %dl | |
284 and $0xFF, %cx | |
285 shl $8, %dx | |
286 or %dx, %cx | |
287 pop %rdx | |
288 jmp vdp_psg_w | |
18
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289 |
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290 .global m68k_write_long_lowfirst |
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291 m68k_write_long_lowfirst: |
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292 push %rdi |
86
3d3966c254b2
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293 push %rcx |
18
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294 add $2, %edi |
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295 call m68k_write_word |
86
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diff
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296 pop %rcx |
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297 pop %rdi |
18
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298 shr $16, %ecx |
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299 jmp m68k_write_word |
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300 |
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301 .global m68k_write_long_highfirst |
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302 m68k_write_long_highfirst: |
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303 push %rdi |
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304 push %rcx |
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305 shr $16, %ecx |
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|
306 call m68k_write_word |
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|
307 pop %rcx |
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|
308 pop %rdi |
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|
309 add $2, %rdi |
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|
310 jmp m68k_write_word |
64
2b1a65f4b85d
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59
diff
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|
311 |
2b1a65f4b85d
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59
diff
changeset
|
312 inccycles: |
2b1a65f4b85d
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59
diff
changeset
|
313 cmp %rbp, %rax |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
314 jnb do_limit |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
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59
diff
changeset
|
315 add $4, %rax |
2b1a65f4b85d
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59
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changeset
|
316 ret |
2b1a65f4b85d
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59
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changeset
|
317 do_limit: |
2b1a65f4b85d
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59
diff
changeset
|
318 push %rcx |
2b1a65f4b85d
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59
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changeset
|
319 push %rdi |
2b1a65f4b85d
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59
diff
changeset
|
320 call handle_cycle_limit |
2b1a65f4b85d
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Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
321 pop %rdi |
2b1a65f4b85d
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Mike Pavone <pavone@retrodev.com>
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59
diff
changeset
|
322 pop %rcx |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
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59
diff
changeset
|
323 add $4, %rax |
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
324 ret |
17
de0085d4ea40
Add asssembly runtime code stub
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
325 |
18
3e7bfde7606e
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326 .global m68k_read_word_scratch1 |
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|
327 m68k_read_word_scratch1: |
64
2b1a65f4b85d
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|
328 call inccycles |
18
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|
329 and $0xFFFFFF, %rcx |
3e7bfde7606e
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changeset
|
330 cmp $0x400000, %ecx |
104
a0fdaa134964
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diff
changeset
|
331 jbe cart |
18
3e7bfde7606e
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diff
changeset
|
332 cmp $0xE00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
333 jae workram |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
334 cmp $0xC00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
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95
diff
changeset
|
335 jae vdp_psg |
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
336 cmp $0xA10000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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95
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changeset
|
337 jb not_io |
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
338 cmp $0xA12000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
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95
diff
changeset
|
339 jae not_io |
83
2c7267617d71
Implement Z80 reset and bus request registers.
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82
diff
changeset
|
340 call do_io_read_w |
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
341 ret |
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
342 not_io: |
18
3e7bfde7606e
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changeset
|
343 xor %cx, %cx |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
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53
diff
changeset
|
344 dec %cx |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
345 ret |
18
3e7bfde7606e
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diff
changeset
|
346 workram: |
3e7bfde7606e
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diff
changeset
|
347 and $0xFFFF, %rcx |
3e7bfde7606e
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17
diff
changeset
|
348 mov (%r9, %rcx), %cx |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
349 ret |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
350 vdp_psg: |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
351 test $0x2700E0, %ecx |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
352 jnz crash |
57
bc3bc7a60c4e
Code in runtime for checking for VDP reads was using the wrong register. This is now fixed.
Mike Pavone <pavone@retrodev.com>
parents:
54
diff
changeset
|
353 and $0x1F, %ecx |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
354 jmp do_vdp_port_read |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
355 cart: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
17
diff
changeset
|
356 mov (%r8, %rcx), %cx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
357 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
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|
358 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
359 .global m68k_read_long_scratch1 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
360 m68k_read_long_scratch1: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
17
diff
changeset
|
361 push %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
362 call m68k_read_word_scratch1 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
17
diff
changeset
|
363 mov %cx, %di |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
364 pop %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
365 add $2, %ecx |
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
366 push %rdi |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
17
diff
changeset
|
367 call m68k_read_word_scratch1 |
84
2d1ae596db7a
Fix long reads from IO ports or long reads that trigger sync cycles by saving rdi. Possibly fix word wide IO reads.
Mike Pavone <pavone@retrodev.com>
parents:
83
diff
changeset
|
368 pop %rdi |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
17
diff
changeset
|
369 and $0xFFFF, %ecx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
370 shl $16, %edi |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
371 or %edi, %ecx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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17
diff
changeset
|
372 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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17
diff
changeset
|
373 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
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17
diff
changeset
|
374 .global m68k_read_byte_scratch1 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
375 m68k_read_byte_scratch1: |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
376 call inccycles |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
377 and $0xFFFFFF, %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
378 cmp $0x400000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
379 jbe cart_b |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
380 cmp $0xE00000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
381 jae workram_b |
137 | 382 cmp $0xC00000, %ecx |
383 jae vdp_psg_b | |
66 | 384 cmp $0xA10000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
385 jb not_io_b |
85
1db2a0b655d1
Fix Z80 BUSREQ/RESET implementation.
Mike Pavone <pavone@retrodev.com>
parents:
84
diff
changeset
|
386 cmp $0xA12000, %ecx |
104
a0fdaa134964
Use unsigned comparisons for address decoding, exit when we hit an unhandled addressing mode for jmp
Mike Pavone <pavone@retrodev.com>
parents:
95
diff
changeset
|
387 jae not_io_b |
66 | 388 jmp do_io_read |
389 not_io_b: | |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
390 xor %cl, %cl |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
391 dec %cl |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
392 ret |
137 | 393 vdp_psg_b: |
394 test $0x2700E0, %ecx | |
395 jnz crash | |
396 and $0x1F, %ecx | |
397 bt $0, %ecx | |
398 jnc vdp_swap | |
399 jmp do_vdp_port_read | |
400 vdp_swap: | |
401 call do_vdp_port_read | |
402 shr $8, %cx | |
403 ret | |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
404 workram_b: |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
405 /* deal with byte swapping */ |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
406 xor $1, %ecx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
407 and $0xFFFF, %rcx |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
408 mov (%r9, %rcx), %cl |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
409 ret |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
410 cart_b: |
83
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
411 /* deal with byte swapping */ |
2c7267617d71
Implement Z80 reset and bus request registers.
Mike Pavone <pavone@retrodev.com>
parents:
82
diff
changeset
|
412 xor $1, %ecx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
413 mov (%r8, %rcx), %cl |
64
2b1a65f4b85d
Cleanup 68K timing code. Temporarily omment out fFPS counter as it was causing segfaults
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
414 ret |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
415 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
416 .global m68k_modified_ret_addr |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
417 m68k_modified_ret_addr: |
145
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
418 add $16, %rsp |
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
419 call m68k_native_addr |
15b8dce19cf4
Implement m68k_modified_ret_addr
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
420 jmp *%rcx |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
421 |
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
422 dyn_addr_msg: |
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
423 .asciz "Program needs dynamically calculated native address\n" |
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
424 |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
425 .global m68k_native_addr_and_sync |
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
426 m68k_native_addr_and_sync: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
427 call m68k_save_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
428 push %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
429 mov %rsi, %rdi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
430 call sync_components |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
431 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
432 push %rax |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
433 mov %rax, %rdi |
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
434 call get_native_address_trans |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
435 mov %rax, %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
436 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
437 call m68k_load_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
438 ret |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
439 |
86
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
440 .global m68k_native_addr |
3d3966c254b2
RTE doesn't crash the emulator anymore
Mike Pavone <pavone@retrodev.com>
parents:
85
diff
changeset
|
441 m68k_native_addr: |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
442 call m68k_save_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
443 push %rsi |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
444 mov %rsi, %rdi |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
445 mov %ecx, %esi |
95
dd3c680c618c
Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
446 call get_native_address_trans |
82
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
447 mov %rax, %rcx |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
448 pop %rsi |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
449 call m68k_load_context |
6331ddec228f
Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
Mike Pavone <pavone@retrodev.com>
parents:
72
diff
changeset
|
450 ret |
53
44e661913a51
Add preliminary support for JMP
Mike Pavone <pavone@retrodev.com>
parents:
18
diff
changeset
|
451 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
452 .global m68k_save_context |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
453 m68k_save_context: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
454 mov %bl, 1(%rsi) /* N Flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
455 mov %bh, 2(%rsi) /* V flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
456 mov %dl, 3(%rsi) /* Z flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
457 mov %dh, 4(%rsi) /* C flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
458 mov %r10d, 8(%rsi) /* d0 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
459 mov %r11d, 12(%rsi) /* d1 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
460 mov %r12d, 16(%rsi) /* d2 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
461 mov %r13d, 40(%rsi) /* a0 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
462 mov %r14d, 44(%rsi) /* a1 */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
463 mov %r15d, 68(%rsi) /* a7 */ |
72
7935cd64d5c8
Implement word wide access to IO area
Mike Pavone <pavone@retrodev.com>
parents:
66
diff
changeset
|
464 mov %eax, 80(%rsi) /* current cycle count */ |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
465 ret |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
466 |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
467 .global m68k_load_context |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
468 m68k_load_context: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
17
diff
changeset
|
469 mov 1(%rsi), %bl /* N Flag */ |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
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470 mov 2(%rsi), %bh /* V flag */ |
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471 mov 3(%rsi), %dl /* Z flag */ |
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472 mov 4(%rsi), %dh /* C flag */ |
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473 mov 8(%rsi), %r10d /* d0 */ |
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474 mov 12(%rsi), %r11d /* d1 */ |
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475 mov 16(%rsi), %r12d /* d2 */ |
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476 mov 40(%rsi), %r13d /* a0 */ |
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477 mov 44(%rsi), %r14d /* a1 */ |
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478 mov 68(%rsi), %r15d /* a7 */ |
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Implement word wide access to IO area
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479 mov 76(%rsi), %ebp /* target cycle count */ |
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480 mov 80(%rsi), %eax /* current cycle count */ |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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481 mov 96(%rsi), %r8d /* cartridge address */ |
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Initial stab at interrupt support. Make native code offsets bigger so I don't have to worry about overflowing the offset. Implement neg and not (untested).
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482 mov 104(%rsi), %r9d /* work ram address */ |
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483 ret |
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484 |
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485 .global m68k_start_context |
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486 m68k_start_context: |
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487 call m68k_load_context |
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488 jmp *%rdi |