Mercurial > repos > blastem
annotate backend_x86.c @ 895:13388ab6d78a
Get Z80 core sort of working again post alignment change
author | Michael Pavone <pavone@retrodev.com> |
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date | Wed, 25 Nov 2015 20:18:34 -0800 |
parents | a7774fc2de4b |
children | 1f09994e92c5 |
rev | line source |
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567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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1 #include "backend.h" |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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2 #include "gen_x86.h" |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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3 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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4 void cycles(cpu_options *opts, uint32_t num) |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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5 { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
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6 add_ir(&opts->code, num*opts->clock_divider, opts->cycles, SZ_D); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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7 } |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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8 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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9 void check_cycles_int(cpu_options *opts, uint32_t address) |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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10 { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
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11 code_info *code = &opts->code; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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12 cmp_rr(code, opts->cycles, opts->limit, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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parents:
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13 code_ptr jmp_off = code->cur+1; |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
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14 jcc(code, CC_A, jmp_off+1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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15 mov_ir(code, address, opts->scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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16 call(code, opts->handle_cycle_limit_int); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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17 *jmp_off = code->cur - (jmp_off+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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18 } |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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19 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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20 void check_cycles(cpu_options * opts) |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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21 { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
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22 code_info *code = &opts->code; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
changeset
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23 cmp_rr(code, opts->cycles, opts->limit, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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24 check_alloc_code(code, MAX_INST_LEN*2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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25 code_ptr jmp_off = code->cur+1; |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
692
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26 jcc(code, CC_A, jmp_off+1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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27 call(code, opts->handle_cycle_limit); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
diff
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28 *jmp_off = code->cur - (jmp_off+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
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29 } |
589
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
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567
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30 |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
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31 void log_address(cpu_options *opts, uint32_t address, char * format) |
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32 { |
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33 code_info *code = &opts->code; |
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34 call(code, opts->save_context); |
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35 push_r(code, opts->context_reg); |
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36 mov_rr(code, opts->cycles, RDX, SZ_D); |
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37 mov_ir(code, (int64_t)format, RDI, SZ_PTR); |
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38 mov_ir(code, address, RSI, SZ_D); |
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39 call_args_abi(code, (code_ptr)printf, 3, RDI, RSI, RDX); |
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40 pop_r(code, opts->context_reg); |
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41 call(code, opts->load_context); |
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42 } |
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Sync fixes and logging to fix more sync issues
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43 |
601
f0061e3d2ad9
Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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44 void check_code_prologue(code_info *code) |
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45 { |
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Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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46 check_alloc_code(code, MAX_INST_LEN*4); |
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Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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47 } |
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Fix a few bugs introduced in the Z80 core from the adjustments to fit with the code gen refactor
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48 |
593
5ef3fe516da9
Z80 core is sort of working again
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590
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49 code_ptr gen_mem_fun(cpu_options * opts, memmap_chunk const * memmap, uint32_t num_chunks, ftype fun_type, code_ptr *after_inc) |
589
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Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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50 { |
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Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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51 code_info *code = &opts->code; |
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52 code_ptr start = code->cur; |
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53 check_cycles(opts); |
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54 cycles(opts, opts->bus_cycles); |
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55 if (after_inc) { |
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56 *after_inc = code->cur; |
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57 } |
750
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Fix handling of address mask in gen_mem_fun
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58 uint8_t is_write = fun_type == WRITE_16 || fun_type == WRITE_8; |
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59 uint8_t adr_reg = is_write ? opts->scratch2 : opts->scratch1; |
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60 if (opts->address_size == SZ_D && opts->address_mask != 0xFFFFFFFF) { |
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61 and_ir(code, opts->address_mask, adr_reg, SZ_D); |
589
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62 } |
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63 code_ptr lb_jcc = NULL, ub_jcc = NULL; |
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64 uint16_t access_flag = is_write ? MMAP_WRITE : MMAP_READ; |
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65 uint8_t size = (fun_type == READ_16 || fun_type == WRITE_16) ? SZ_W : SZ_B; |
690
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66 uint32_t ram_flags_off = opts->ram_flags_off; |
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67 for (uint32_t chunk = 0; chunk < num_chunks; chunk++) |
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68 { |
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69 if (memmap[chunk].start > 0) { |
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70 cmp_ir(code, memmap[chunk].start, adr_reg, opts->address_size); |
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71 lb_jcc = code->cur + 1; |
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72 jcc(code, CC_C, code->cur + 2); |
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73 } |
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74 if (memmap[chunk].end < opts->max_address) { |
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75 cmp_ir(code, memmap[chunk].end, adr_reg, opts->address_size); |
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Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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76 ub_jcc = code->cur + 1; |
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77 jcc(code, CC_NC, code->cur + 2); |
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Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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78 } |
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Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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79 |
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Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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80 if (memmap[chunk].mask != opts->address_mask) { |
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
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parents:
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81 and_ir(code, memmap[chunk].mask, adr_reg, opts->address_size); |
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82 } |
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83 void * cfun; |
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84 switch (fun_type) |
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85 { |
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86 case READ_16: |
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87 cfun = memmap[chunk].read_16; |
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88 break; |
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89 case READ_8: |
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90 cfun = memmap[chunk].read_8; |
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91 break; |
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92 case WRITE_16: |
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93 cfun = memmap[chunk].write_16; |
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94 break; |
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95 case WRITE_8: |
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96 cfun = memmap[chunk].write_8; |
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97 break; |
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98 default: |
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99 cfun = NULL; |
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100 } |
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101 if(memmap[chunk].flags & access_flag) { |
589
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102 if (memmap[chunk].flags & MMAP_PTR_IDX) { |
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103 if (memmap[chunk].flags & MMAP_FUNC_NULL) { |
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104 cmp_irdisp(code, 0, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, SZ_PTR); |
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105 code_ptr not_null = code->cur + 1; |
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106 jcc(code, CC_NZ, code->cur + 2); |
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107 call(code, opts->save_context); |
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108 if (is_write) { |
658
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109 call_args_abi(code, cfun, 3, opts->scratch2, opts->context_reg, opts->scratch1); |
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110 mov_rr(code, RAX, opts->context_reg, SZ_PTR); |
589
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111 } else { |
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112 push_r(code, opts->context_reg); |
658
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113 call_args_abi(code, cfun, 2, opts->scratch1, opts->context_reg); |
589
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114 pop_r(code, opts->context_reg); |
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115 mov_rr(code, RAX, opts->scratch1, size); |
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116 } |
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117 jmp(code, opts->load_context); |
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118 |
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119 *not_null = code->cur - (not_null + 1); |
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120 } |
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121 if ((opts->byte_swap || memmap[chunk].flags & MMAP_BYTESWAP) && size == SZ_B) { |
589
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122 xor_ir(code, 1, adr_reg, opts->address_size); |
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123 } |
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124 if (opts->address_size != SZ_D) { |
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125 movzx_rr(code, adr_reg, adr_reg, opts->address_size, SZ_D); |
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126 } |
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127 add_rdispr(code, opts->context_reg, opts->mem_ptr_off + sizeof(void*) * memmap[chunk].ptr_index, adr_reg, SZ_PTR); |
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128 if (is_write) { |
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129 mov_rrind(code, opts->scratch1, opts->scratch2, size); |
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130 |
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131 } else { |
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132 mov_rindr(code, opts->scratch1, opts->scratch1, size); |
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133 } |
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134 } else { |
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135 uint8_t tmp_size = size; |
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136 if (size == SZ_B) { |
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137 if ((memmap[chunk].flags & MMAP_ONLY_ODD) || (memmap[chunk].flags & MMAP_ONLY_EVEN)) { |
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138 bt_ir(code, 0, adr_reg, opts->address_size); |
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139 code_ptr good_addr = code->cur + 1; |
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140 jcc(code, (memmap[chunk].flags & MMAP_ONLY_ODD) ? CC_C : CC_NC, code->cur + 2); |
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141 if (!is_write) { |
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142 mov_ir(code, 0xFF, opts->scratch1, SZ_B); |
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143 } |
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144 retn(code); |
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145 *good_addr = code->cur - (good_addr + 1); |
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146 shr_ir(code, 1, adr_reg, opts->address_size); |
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147 } else if (opts->byte_swap || memmap[chunk].flags & MMAP_BYTESWAP) { |
589
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148 xor_ir(code, 1, adr_reg, opts->address_size); |
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149 } |
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150 } else if ((memmap[chunk].flags & MMAP_ONLY_ODD) || (memmap[chunk].flags & MMAP_ONLY_EVEN)) { |
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151 tmp_size = SZ_B; |
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152 shr_ir(code, 1, adr_reg, opts->address_size); |
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153 if ((memmap[chunk].flags & MMAP_ONLY_EVEN) && is_write) { |
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154 shr_ir(code, 8, opts->scratch1, SZ_W); |
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155 } |
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156 } |
595
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157 if (opts->address_size != SZ_D) { |
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158 movzx_rr(code, adr_reg, adr_reg, opts->address_size, SZ_D); |
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159 } |
589
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160 if ((intptr_t)memmap[chunk].buffer <= 0x7FFFFFFF && (intptr_t)memmap[chunk].buffer >= -2147483648) { |
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161 if (is_write) { |
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162 mov_rrdisp(code, opts->scratch1, opts->scratch2, (intptr_t)memmap[chunk].buffer, tmp_size); |
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163 } else { |
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164 mov_rdispr(code, opts->scratch1, (intptr_t)memmap[chunk].buffer, opts->scratch1, tmp_size); |
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165 } |
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166 } else { |
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167 if (is_write) { |
760
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168 push_r(code, opts->scratch2); |
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169 mov_ir(code, (intptr_t)memmap[chunk].buffer, opts->scratch2, SZ_PTR); |
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170 add_rdispr(code, RSP, 0, opts->scratch2, SZ_PTR); |
589
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171 mov_rrind(code, opts->scratch1, opts->scratch2, tmp_size); |
760
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172 if (is_write && (memmap[chunk].flags & MMAP_CODE)) { |
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173 pop_r(code, opts->scratch2); |
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174 } else { |
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175 add_ir(code, sizeof(void*), RSP, SZ_D); |
894
a7774fc2de4b
Partially working change to do proper stack alignment rather than doing a lame alignment check when calling a C compile dfunction. 68K core seems okay, but Z80 is busted.
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176 code->stack_off -= sizeof(void *); |
760
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177 } |
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178 } else { |
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179 push_r(code, opts->scratch2); |
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180 mov_ir(code, (intptr_t)memmap[chunk].buffer, opts->scratch2, SZ_PTR); |
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181 mov_rindexr(code, opts->scratch2, opts->scratch1, 1, opts->scratch1, tmp_size); |
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182 pop_r(code, opts->scratch2); |
589
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183 } |
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184 } |
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185 if (size != tmp_size && !is_write) { |
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186 if (memmap[chunk].flags & MMAP_ONLY_EVEN) { |
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187 shl_ir(code, 8, opts->scratch1, SZ_W); |
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188 mov_ir(code, 0xFF, opts->scratch1, SZ_B); |
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189 } else { |
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190 or_ir(code, 0xFF00, opts->scratch1, SZ_W); |
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191 } |
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192 } |
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193 } |
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194 if (is_write && (memmap[chunk].flags & MMAP_CODE)) { |
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195 mov_rr(code, opts->scratch2, opts->scratch1, opts->address_size); |
620
9d6fed6501ba
Fix handling of code writes for Z80 core. This seems to get things close to being back to where they were before the big refactor that broke the Z80 core. Some problems remain. Notably the sound driver in Sonic 2 is still quite broken.
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196 shr_ir(code, opts->ram_flags_shift, opts->scratch1, opts->address_size); |
690
fc04781f4d28
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197 bt_rrdisp(code, opts->scratch1, opts->context_reg, ram_flags_off, opts->address_size); |
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198 if (memmap[chunk].mask == opts->address_mask) { |
892
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199 ram_flags_off += (memmap[chunk].end - memmap[chunk].start) / (1 << opts->ram_flags_shift) / 8; ; |
690
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200 } else { |
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201 ram_flags_off += (memmap[chunk].mask + 1) / (1 << opts->ram_flags_shift) / 8;; |
690
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202 } |
589
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203 code_ptr not_code = code->cur + 1; |
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204 jcc(code, CC_NC, code->cur + 2); |
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205 call(code, opts->save_context); |
658
6aa29ac33f1a
Use call_args and call_args_abi inside gen_mem_fun
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206 call_args(code, opts->handle_code_write, 2, opts->scratch2, opts->context_reg); |
589
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207 mov_rr(code, RAX, opts->context_reg, SZ_PTR); |
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208 call(code, opts->load_context); |
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209 *not_code = code->cur - (not_code+1); |
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210 } |
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211 retn(code); |
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212 } else if (cfun) { |
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213 call(code, opts->save_context); |
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214 if (is_write) { |
658
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215 call_args_abi(code, cfun, 3, opts->scratch2, opts->context_reg, opts->scratch1); |
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216 mov_rr(code, RAX, opts->context_reg, SZ_PTR); |
589
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217 } else { |
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218 push_r(code, opts->context_reg); |
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219 call_args_abi(code, cfun, 2, opts->scratch1, opts->context_reg); |
589
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220 pop_r(code, opts->context_reg); |
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221 mov_rr(code, RAX, opts->scratch1, size); |
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222 } |
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223 jmp(code, opts->load_context); |
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224 } else { |
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225 //Not sure the best course of action here |
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226 if (!is_write) { |
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227 mov_ir(code, size == SZ_B ? 0xFF : 0xFFFF, opts->scratch1, size); |
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228 } |
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229 retn(code); |
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230 } |
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231 if (lb_jcc) { |
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232 *lb_jcc = code->cur - (lb_jcc+1); |
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233 lb_jcc = NULL; |
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234 } |
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235 if (ub_jcc) { |
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236 *ub_jcc = code->cur - (ub_jcc+1); |
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237 ub_jcc = NULL; |
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238 } |
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239 } |
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240 if (!is_write) { |
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241 mov_ir(code, size == SZ_B ? 0xFF : 0xFFFF, opts->scratch1, size); |
2dde38c1744f
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242 } |
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243 retn(code); |
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244 return start; |
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245 } |