Mercurial > repos > blastem
annotate rf5c164.c @ 2468:0ca78837e4d2
Implement ext instruction in new 68K core
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 24 Feb 2024 22:54:36 -0800 |
parents | c76c81c21ae5 |
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rev | line source |
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1 #include <stdio.h> |
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2 #include "rf5c164.h" |
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3 |
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4 enum { |
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5 ENV, |
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6 PAN, |
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7 FDL, |
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8 FDH, |
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9 LSL, |
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10 LSH, |
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11 ST, |
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12 CTRL, |
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13 CHAN_ENABLE |
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14 }; |
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15 |
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16 enum { |
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17 START, |
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18 NORMAL, |
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19 LOOP |
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20 }; |
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21 |
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22 #define FLAG_SOUNDING 0x80 |
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23 #define FLAG_PENDING 0x01 |
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24 |
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25 void rf5c164_init(rf5c164* pcm, uint32_t mclks, uint32_t divider) |
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26 { |
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27 pcm->audio = render_audio_source("rf5c164", mclks, divider * 384, 2); |
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28 pcm->clock_step = divider * 4; |
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29 } |
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30 |
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31 void rf5c164_deinit(rf5c164* pcm) |
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32 { |
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33 render_free_source(pcm->audio); |
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34 } |
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35 |
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36 void rf5c164_adjust_master_clock(rf5c164* pcm, uint32_t mclks) |
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37 { |
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38 render_audio_adjust_clock(pcm->audio, mclks, pcm->clock_step * 96); |
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39 } |
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40 |
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41 //48 cycles per channel |
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42 //1 external write per 16 cycles |
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43 //3 external writes per channel/sample |
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44 // TCE pulse width is 200ns @ 10Mhz aka 2 cycles |
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45 // total cycle is longer than TCE pulse, guessing 4 cycles |
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46 // 12 memory access slots per channel sample |
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47 // 3 for external memory writes |
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48 // 1 for internal register writes? |
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49 // 1 for refresh? |
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50 // 6 for register reads? |
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51 // or maybe 7 for register reads and writes happen when register is read? |
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52 |
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53 #define CHECK pcm->cycle += pcm->clock_step; pcm->step++; if (pcm->cycle >= cycle) break |
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54 #define CHECK_LOOP pcm->cycle += pcm->clock_step; pcm->step = 0; if (pcm->cycle >= cycle) break |
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55 |
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56 static void write_if_not_sounding(rf5c164* pcm) |
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57 { |
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58 if (!(pcm->flags & FLAG_SOUNDING) && (pcm->flags & FLAG_PENDING) |
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59 && pcm->pending_address >= 0x1000) { |
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60 pcm->ram[(pcm->pending_address & 0xFFF) | pcm->ram_bank] = pcm->pending_byte; |
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61 pcm->flags &= ~FLAG_PENDING; |
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62 } |
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63 } |
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64 |
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65 static void write_always(rf5c164* pcm) |
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66 { |
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67 if ((pcm->flags & FLAG_PENDING) && pcm->pending_address >= 0x1000) { |
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68 pcm->ram[(pcm->pending_address & 0xFFF) | pcm->ram_bank] = pcm->pending_byte; |
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69 pcm->flags &= ~FLAG_PENDING; |
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70 } |
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71 } |
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72 |
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73 void rf5c164_run(rf5c164* pcm, uint32_t cycle) |
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74 { |
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75 //TODO: Timing of this is all educated guesses based on documentation, do some real measurements |
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76 while (pcm->cycle < cycle) |
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77 { |
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78 switch (pcm->step) |
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79 { |
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80 case 0: |
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81 //handle internal memory write |
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82 // RF5C164 datasheet seems to suggest only 1 "internal memory" write every 48 cycles when the chip is not sounding (globally) |
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83 // and 1 write every 384 cycles when the chip is sounding (globally). However, games seem to expect to be able to write faster than that |
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84 // RF5C68 datasheet suggests internal memory writes are unrestricted regardless of sounding status |
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85 /*if ((pcm->cur_channel == pcm->selected_channel || !(pcm->flags & FLAG_SOUNDING)) && (pcm->flags & FLAG_PENDING) |
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86 && pcm->pending_address <= ST |
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87 ) { |
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88 printf("pcm_write commit chan %d, %X - %X @ %u\n", pcm->selected_channel, pcm->pending_address, pcm->pending_byte, pcm->cycle); |
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89 pcm->channels[pcm->selected_channel].regs[pcm->pending_address] = pcm->pending_byte; |
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90 pcm->flags &= ~FLAG_PENDING; |
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91 }*/ |
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92 write_if_not_sounding(pcm); |
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93 CHECK; |
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94 case 1: |
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95 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) { |
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96 if (pcm->channels[pcm->cur_channel].state == START) { |
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97 pcm->channels[pcm->cur_channel].cur_ptr = pcm->channels[pcm->cur_channel].regs[ST] << 19; |
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98 //printf("chan %d START %X (%X raw)\n", pcm->cur_channel, pcm->channels[pcm->cur_channel].cur_ptr >> 11, pcm->channels[pcm->cur_channel].cur_ptr); |
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99 pcm->channels[pcm->cur_channel].state = NORMAL; |
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100 pcm->channels[pcm->cur_channel].trigger = 1; |
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101 } else if (pcm->channels[pcm->cur_channel].state == LOOP) { |
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102 uint32_t old_ptr = pcm->channels[pcm->cur_channel].cur_ptr; |
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103 pcm->channels[pcm->cur_channel].cur_ptr = (pcm->channels[pcm->cur_channel].regs[LSH] << 19) | (pcm->channels[pcm->cur_channel].regs[LSL] << 11); |
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104 //printf("chan %d LOOP %X (%X raw)\n", pcm->cur_channel, pcm->channels[pcm->cur_channel].cur_ptr >> 11, pcm->channels[pcm->cur_channel].cur_ptr); |
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105 pcm->channels[pcm->cur_channel].state = NORMAL; |
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106 pcm->channels[pcm->cur_channel].trigger = old_ptr != pcm->channels[pcm->cur_channel].cur_ptr; |
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107 } else { |
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108 pcm->channels[pcm->cur_channel].trigger = 0; |
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109 } |
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110 } |
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111 write_if_not_sounding(pcm); |
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112 CHECK; |
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113 case 2: { |
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114 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) { |
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115 uint8_t byte = pcm->ram[pcm->channels[pcm->cur_channel].cur_ptr >> 11]; |
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116 if (byte == 0xFF) { |
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117 pcm->channels[pcm->cur_channel].state = LOOP; |
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118 } else { |
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119 pcm->channels[pcm->cur_channel].sample = byte; |
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120 } |
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121 } |
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122 write_if_not_sounding(pcm); |
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123 CHECK; |
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124 } |
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125 case 3: |
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126 write_always(pcm); |
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127 CHECK; |
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128 case 4: |
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129 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) { |
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130 pcm->channels[pcm->cur_channel].cur_ptr += (pcm->channels[pcm->cur_channel].regs[FDH] << 8) | pcm->channels[pcm->cur_channel].regs[FDL]; |
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131 pcm->channels[pcm->cur_channel].cur_ptr &= 0x7FFFFFF; |
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132 } |
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133 write_if_not_sounding(pcm); |
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134 CHECK; |
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135 case 5: |
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136 write_if_not_sounding(pcm); |
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137 CHECK; |
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138 case 6: |
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139 write_if_not_sounding(pcm); |
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140 CHECK; |
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141 case 7: |
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142 write_always(pcm); |
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143 CHECK; |
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144 case 8: |
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145 write_if_not_sounding(pcm); |
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146 CHECK; |
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147 case 9: |
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148 if ((pcm->flags & FLAG_SOUNDING) && !(pcm->channel_enable & (1 << pcm->cur_channel))) { |
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149 int16_t sample = pcm->channels[pcm->cur_channel].sample & 0x7F; |
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150 if (!(pcm->channels[pcm->cur_channel].sample & 0x80)) { |
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151 sample = -sample; |
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152 } |
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153 sample *= pcm->channels[pcm->cur_channel].regs[ENV]; |
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154 int16_t left = (sample * (pcm->channels[pcm->cur_channel].regs[PAN] >> 4)) >> 5; |
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155 int16_t right = (sample * (pcm->channels[pcm->cur_channel].regs[PAN] & 0xF)) >> 5; |
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156 //printf("chan %d, raw %X, sample %d, left %d, right %d, ptr %X (raw %X)\n", pcm->cur_channel, pcm->channels[pcm->cur_channel].sample, sample, left, right, pcm->channels[pcm->cur_channel].cur_ptr >> 11, pcm->channels[pcm->cur_channel].cur_ptr); |
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157 #ifndef IS_LIB |
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158 if (pcm->scope) { |
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159 scope_add_sample(pcm->scope, pcm->channels[pcm->cur_channel].scope_channel, sample, pcm->channels[pcm->cur_channel].trigger); |
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160 } |
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161 #endif |
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162 pcm->left += left; |
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163 pcm->right += right; |
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164 #ifdef IS_LIB |
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165 } |
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166 #else |
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167 } else if (pcm->scope) { |
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168 scope_add_sample(pcm->scope, pcm->channels[pcm->cur_channel].scope_channel, 0, 0); |
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169 } |
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170 #endif |
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171 write_if_not_sounding(pcm); |
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172 CHECK; |
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173 case 10: |
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174 //refresh? |
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175 //does refresh happen at the same rate when sounding disabled? warning in sega docs suggests maybe not |
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176 write_if_not_sounding(pcm); |
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177 CHECK; |
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178 case 11: |
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179 write_always(pcm); |
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180 pcm->cur_channel++; |
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181 pcm->cur_channel &= 7; |
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182 if (!pcm->cur_channel) { |
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183 if (pcm->left > INT16_MAX) { |
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184 pcm->left = INT16_MAX; |
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185 } else if (pcm->left < INT16_MIN) { |
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186 pcm->left = INT16_MIN; |
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187 } |
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188 if (pcm->right > INT16_MAX) { |
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189 pcm->right = INT16_MAX; |
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190 } else if (pcm->right < INT16_MIN) { |
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191 pcm->right = INT16_MIN; |
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192 } |
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193 render_put_stereo_sample(pcm->audio, pcm->left, pcm->right); |
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194 pcm->left = pcm->right = 0; |
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195 } |
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196 CHECK_LOOP; |
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197 } |
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198 } |
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199 } |
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200 |
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201 void rf5c164_write(rf5c164* pcm, uint16_t address, uint8_t value) |
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202 { |
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203 //printf("pcm_write %X - %X @ %u\n", address, value, pcm->cycle); |
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204 if (address == CTRL) { |
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205 pcm->flags &= ~FLAG_SOUNDING; |
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206 pcm->flags |= value & FLAG_SOUNDING; |
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207 if (value & 0x40) { |
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208 pcm->selected_channel = value & 0x7; |
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209 //printf("selected channel %d\n", pcm->selected_channel); |
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210 } else { |
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211 pcm->ram_bank = value << 12 & 0xF000; |
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212 //printf("selected RAM bank %X\n", pcm->ram_bank); |
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213 } |
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214 if (!(pcm->flags & FLAG_SOUNDING)) { |
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215 pcm->left = pcm->right = 0; |
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216 } |
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217 } else if (address == CHAN_ENABLE) { |
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218 uint8_t changed = pcm->channel_enable ^ value; |
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219 pcm->channel_enable = value; |
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220 for (int i = 0; i < 8; i++) |
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221 { |
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222 int mask = 1 << i; |
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223 if ((changed & mask) && !(mask & value)) { |
2082
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224 pcm->channels[i].state = START; |
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225 } |
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226 } |
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227 } else if (address <= ST) { |
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228 //See note in first step of rf5c164_run |
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|
229 pcm->channels[pcm->selected_channel].regs[address] = value; |
2345
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|
230 } else if (address >= 0x1000){ |
2082
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231 pcm->pending_address = address; |
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232 pcm->pending_byte = value; |
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|
233 pcm->flags |= FLAG_PENDING; |
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234 } |
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235 } |
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|
236 |
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|
237 uint8_t rf5c164_read(rf5c164* pcm, uint16_t address) |
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|
238 { |
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|
239 if (address >= 0x10 && address < 0x20) { |
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|
240 uint16_t chan = address >> 1 & 0x7; |
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|
241 if (address & 1) { |
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|
242 return pcm->channels[chan].cur_ptr >> 19; |
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|
243 } else { |
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|
244 return pcm->channels[chan].cur_ptr >> 11; |
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245 } |
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246 } else if (address >= 0x1000 && !(pcm->flags & FLAG_SOUNDING)) { |
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247 return pcm->ram[pcm->ram_bank | (address & 0xFFF)]; |
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248 } else { |
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249 return 0xFF; |
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250 } |
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251 } |
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252 |
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253 void rf5c164_enable_scope(rf5c164* pcm, oscilloscope *scope) |
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254 { |
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255 #ifndef IS_LIB |
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256 static const char *names[] = { |
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257 "Richo #1", |
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258 "Richo #2", |
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259 "Richo #3", |
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260 "Richo #4", |
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261 "Richo #5", |
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262 "Richo #6", |
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263 "Richo #7", |
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264 "Richo #8", |
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265 }; |
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266 pcm->scope = scope; |
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267 for (int i = 0; i < 8; i ++) |
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268 { |
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269 pcm->channels[i].scope_channel = scope_add_channel(scope, names[i], 50000000 / (pcm->clock_step * 96)); |
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270 } |
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271 #endif |
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272 } |
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273 |
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274 void rf5c164_serialize(rf5c164* pcm, serialize_buffer *buf) |
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275 { |
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276 save_int32(buf, pcm->cycle); |
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277 save_buffer16(buf, pcm->ram, sizeof(pcm->ram)/sizeof(*pcm->ram)); |
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278 save_int16(buf, pcm->ram_bank); |
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279 save_int16(buf, pcm->pending_address); |
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280 save_int32(buf, pcm->left); |
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281 save_int32(buf, pcm->right); |
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282 for (int i = 0; i < 8; i++) |
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283 { |
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284 rf5c164_channel *chan = pcm->channels + i; |
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285 save_int32(buf, chan->cur_ptr); |
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286 save_buffer8(buf, chan->regs, sizeof(chan->regs)); |
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287 save_int8(buf, chan->sample); |
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288 } |
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289 save_int8(buf, pcm->pending_byte); |
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290 save_int8(buf, pcm->channel_enable); |
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291 save_int8(buf, pcm->selected_channel); |
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292 save_int8(buf, pcm->cur_channel); |
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293 save_int8(buf, pcm->step); |
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294 save_int8(buf, pcm->flags); |
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295 } |
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296 |
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297 void rf5c164_deserialize(deserialize_buffer *buf, void *vpcm) |
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298 { |
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299 rf5c164 *pcm = vpcm; |
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300 pcm->cycle = load_int32(buf); |
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301 load_buffer16(buf, pcm->ram, sizeof(pcm->ram)/sizeof(*pcm->ram)); |
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302 pcm->ram_bank = load_int16(buf); |
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303 pcm->pending_address = load_int16(buf); |
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304 pcm->left = load_int32(buf); |
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305 pcm->right = load_int32(buf); |
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306 for (int i = 0; i < 8; i++) |
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307 { |
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308 rf5c164_channel *chan = pcm->channels + i; |
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309 chan->cur_ptr = load_int32(buf); |
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310 load_buffer8(buf, chan->regs, sizeof(chan->regs)); |
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311 chan->sample = load_int8(buf); |
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312 } |
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313 pcm->pending_byte = load_int8(buf); |
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314 pcm->channel_enable = load_int8(buf); |
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315 pcm->selected_channel = load_int8(buf); |
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316 pcm->cur_channel = load_int8(buf); |
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317 pcm->step = load_int8(buf); |
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318 pcm->flags = load_int8(buf); |
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319 } |